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i965/vec4_nir: Use partial SSA form rather than full non-SSA

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We made this switch in the FS backend some time ago and it seems to make a
number of things a bit easier.  In particular, supporting SSA values takes
very little work in the backend and allows us to take advantage of the
majority of the SSA information even after we've gotten rid of Phi nodes.

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
This commit is contained in:
Jason Ekstrand 2015-09-09 13:55:39 -07:00
parent c3f8cde964
commit c951bb8305
3 changed files with 20 additions and 4 deletions
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2
src/mesa/drivers/dri/i965/brw_nir.c
View file

@ -183,7 +183,7 @@ brw_create_nir(struct brw_context *brw,
nir_print_shader(nir, stderr);
}
nir_convert_from_ssa(nir, is_scalar);
nir_convert_from_ssa(nir, true);
nir_validate_shader(nir);
if (!is_scalar) {

1
src/mesa/drivers/dri/i965/brw_vec4.h
View file

@ -423,6 +423,7 @@ public:
virtual void nir_emit_alu(nir_alu_instr *instr);
virtual void nir_emit_jump(nir_jump_instr *instr);
virtual void nir_emit_texture(nir_tex_instr *instr);
virtual void nir_emit_undef(nir_ssa_undef_instr *instr);
dst_reg get_nir_dest(nir_dest dest, enum brw_reg_type type);
dst_reg get_nir_dest(nir_dest dest, nir_alu_type type);

21
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
View file

@ -367,6 +367,10 @@ vec4_visitor::nir_emit_instr(nir_instr *instr)
nir_emit_texture(nir_instr_as_tex(instr));
break;
case nir_instr_type_ssa_undef:
nir_emit_undef(nir_instr_as_ssa_undef(instr));
break;
default:
fprintf(stderr, "VS instruction not yet implemented by NIR->vec4\n");
break;
@ -393,9 +397,14 @@ dst_reg_for_nir_reg(vec4_visitor *v, nir_register *nir_reg,
dst_reg
vec4_visitor::get_nir_dest(nir_dest dest)
{
assert(!dest.is_ssa);
return dst_reg_for_nir_reg(this, dest.reg.reg, dest.reg.base_offset,
dest.reg.indirect);
if (dest.is_ssa) {
dst_reg dst = dst_reg(GRF, alloc.allocate(1));
nir_ssa_values[dest.ssa.index] = dst;
return dst;
} else {
return dst_reg_for_nir_reg(this, dest.reg.reg, dest.reg.base_offset,
dest.reg.indirect);
}
}
dst_reg
@ -1529,4 +1538,10 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
mcs, is_cube_array, sampler, sampler_reg);
}
void
vec4_visitor::nir_emit_undef(nir_ssa_undef_instr *instr)
{
nir_ssa_values[instr->def.index] = dst_reg(GRF, alloc.allocate(1));
}
}