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ac/gpu_info: always retile DCC on gfx10 and newer chips

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Unaligned DCC doesn't work there.

Fixes: f8cf5ea982 - amd: add support for gfx1036 and gfx1037 chips

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16726>
This commit is contained in:
Marek Olšák 2022-05-26 11:55:08 -04:00 • committed by Dylan Baker
parent dc28a8fd88
commit 2a835a2da3
3 changed files with 3 additions and 15 deletions
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2
.pick_status.json
View file

@ -4783,7 +4783,7 @@
"description": "ac/gpu_info: always retile DCC on gfx10 and newer chips",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 3,
"main_sha": null,
"because_sha": "f8cf5ea982adc4e1d5b6a531f83eea938583c830"
},

3
src/amd/common/ac_gpu_info.c
View file

@ -1173,7 +1173,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
if ((info->drm_minor >= 31 && (info->family == CHIP_RAVEN || info->family == CHIP_RAVEN2 ||
info->family == CHIP_RENOIR)) ||
info->chip_class >= GFX10_3) {
if (info->max_render_backends == 1)
/* GFX10+ requires retiling in all cases. */
if (info->max_render_backends == 1 && info->chip_class == GFX9)
info->use_display_dcc_unaligned = true;
else
info->use_display_dcc_with_retile_blit = true;

13
src/amd/common/ac_surface.c
View file

@ -355,12 +355,6 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B))
if (info->chip_class >= GFX10_3) {
if (info->max_render_backends == 1) {
ADD_MOD(AMD_FMT_MOD | common_dcc |
AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B))
}
ADD_MOD(AMD_FMT_MOD | common_dcc |
AMD_FMT_MOD_SET(DCC_RETILE, 1) |
AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
@ -370,13 +364,6 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
if (info->family == CHIP_NAVI12 || info->family == CHIP_NAVI14 || info->chip_class >= GFX10_3) {
bool independent_128b = info->chip_class >= GFX10_3;
if (info->max_render_backends == 1) {
ADD_MOD(AMD_FMT_MOD | common_dcc |
AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, independent_128b) |
AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B))
}
ADD_MOD(AMD_FMT_MOD | common_dcc |
AMD_FMT_MOD_SET(DCC_RETILE, 1) |
AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |