nir: make use_interpolated_input_intrinsics a nir_lower_io parameter

This will need to be set to true when the GLSL linker lowers IO, which
can later be unlowered by st/mesa, and then drivers can lower it again
without load_interpolated_input. Therefore, it can't be a global
immutable option.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32229>

src/amd/common/ac_shader_util.c

@@ -87,7 +87,6 @@ void ac_set_nir_options(struct radeon_info *info, bool use_llvm,
    options->has_fmulz = true;
    options->has_msad = true;
    options->has_shfr32 = true;
-   options->use_interpolated_input_intrinsics = true;
    options->lower_int64_options = nir_lower_imul64 | nir_lower_imul_high64 | nir_lower_imul_2x32_64 | nir_lower_divmod64 |
                                   nir_lower_minmax64 | nir_lower_iabs64 | nir_lower_iadd_sat64 | nir_lower_conv64;
    options->divergence_analysis_options = nir_divergence_view_index_uniform;

src/amd/vulkan/nir/radv_nir_lower_io.c

@@ -63,7 +63,7 @@ radv_nir_lower_io(struct radv_device *device, nir_shader *nir)
       NIR_PASS(_, nir, nir_lower_io, nir_var_shader_out, type_size_vec4, nir_lower_io_lower_64bit_to_32);
    } else {
       NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out, type_size_vec4,
-               nir_lower_io_lower_64bit_to_32);
+               nir_lower_io_lower_64bit_to_32 | nir_lower_io_use_interpolated_input_intrinsics);
    }
 
    /* This pass needs actual constants */

src/asahi/compiler/agx_compile.h

@@ -320,7 +320,6 @@ static const nir_shader_compiler_options agx_nir_options = {
    .lower_device_index_to_zero = true,
    .lower_hadd = true,
    .vectorize_io = true,
-   .use_interpolated_input_intrinsics = true,
    .has_amul = true,
    .has_isub = true,
    .support_16bit_alu = true,

src/asahi/vulkan/hk_shader.c

@@ -715,7 +715,8 @@ hk_lower_nir(struct hk_device *dev, nir_shader *nir,
             UINT32_MAX);
 
    NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-            glsl_type_size, nir_lower_io_lower_64bit_to_32);
+            glsl_type_size, nir_lower_io_lower_64bit_to_32 |
+            nir_lower_io_use_interpolated_input_intrinsics);
 
    if (nir->info.stage == MESA_SHADER_FRAGMENT) {
       NIR_PASS(_, nir, nir_shader_intrinsics_pass, lower_viewport_fs,

src/broadcom/compiler/vir.c

@@ -1175,7 +1175,7 @@ v3d_nir_lower_fs_late(struct v3d_compile *c)
          * are using.
          */
         if (c->key->ucp_enables)
-                NIR_PASS(_, c->s, nir_lower_clip_fs, c->key->ucp_enables, true);
+                NIR_PASS(_, c->s, nir_lower_clip_fs, c->key->ucp_enables, true, false);
 
         NIR_PASS_V(c->s, nir_lower_io_to_scalar, nir_var_shader_in, NULL, NULL);
 }

src/compiler/nir/nir.h

@@ -4173,20 +4173,12 @@ typedef struct nir_shader_compiler_options {
     */
    bool unify_interfaces;
 
-   /**
-    * Should nir_lower_io() create load_interpolated_input intrinsics?
-    *
-    * If not, it generates regular load_input intrinsics and interpolation
-    * information must be inferred from the list of input nir_variables.
-    */
-   bool use_interpolated_input_intrinsics;
-
    /**
     * Whether nir_lower_io() will lower interpolateAt functions to
     * load_interpolated_input intrinsics.
     *
-    * Unlike use_interpolated_input_intrinsics this will only lower these
+    * Unlike nir_lower_io_use_interpolated_input_intrinsics this will only
-    * functions and leave input load intrinsics untouched.
+    * lower these functions and leave input load intrinsics untouched.
     */
    bool lower_interpolate_at;
 
@@ -5753,6 +5745,14 @@ typedef enum {
     * dvec4 can be DCE'd independently without affecting the other half.
     */
    nir_lower_io_lower_64bit_to_32_new = (1 << 2),
+
+   /**
+    * Should nir_lower_io() create load_interpolated_input intrinsics?
+    *
+    * If not, it generates regular load_input intrinsics and interpolation
+    * information must be inferred from the list of input nir_variables.
+    */
+   nir_lower_io_use_interpolated_input_intrinsics = (1 << 3),
 } nir_lower_io_options;
 bool nir_lower_io(nir_shader *shader,
                   nir_variable_mode modes,
@@ -6579,7 +6579,7 @@ bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
                        bool use_clipdist_array,
                        const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
-                       bool use_clipdist_array);
+                       bool use_clipdist_array, bool use_load_interp);
 
 bool nir_lower_clip_cull_distance_to_vec4s(nir_shader *shader);
 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);

src/compiler/nir/nir_lower_clip.c

@@ -122,7 +122,7 @@ store_clipdist_output(nir_builder *b, nir_variable *out, int location, int locat
 
 static void
 load_clipdist_input(nir_builder *b, nir_variable *in, int location_offset,
-                    nir_def **val)
+                    nir_def **val, bool use_load_interp)
 {
    nir_io_semantics semantics = {
       .location = in->data.location,
@@ -130,7 +130,7 @@ load_clipdist_input(nir_builder *b, nir_variable *in, int location_offset,
    };
 
    nir_def *load;
-   if (b->shader->options->use_interpolated_input_intrinsics) {
+   if (use_load_interp) {
       /* TODO: use sample when per-sample shading? */
       nir_def *barycentric = nir_load_barycentric(
          b, nir_intrinsic_load_barycentric_pixel, INTERP_MODE_NONE);
@@ -468,21 +468,21 @@ nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
 
 static void
 lower_clip_fs(nir_function_impl *impl, unsigned ucp_enables,
-              nir_variable **in, bool use_clipdist_array)
+              nir_variable **in, bool use_clipdist_array, bool use_load_interp)
 {
    nir_def *clipdist[MAX_CLIP_PLANES];
    nir_builder b = nir_builder_at(nir_before_impl(impl));
 
    if (!use_clipdist_array) {
       if (ucp_enables & 0x0f)
-         load_clipdist_input(&b, in[0], 0, &clipdist[0]);
+         load_clipdist_input(&b, in[0], 0, &clipdist[0], use_load_interp);
       if (ucp_enables & 0xf0)
-         load_clipdist_input(&b, in[1], 0, &clipdist[4]);
+         load_clipdist_input(&b, in[1], 0, &clipdist[4], use_load_interp);
    } else {
       if (ucp_enables & 0x0f)
-         load_clipdist_input(&b, in[0], 0, &clipdist[0]);
+         load_clipdist_input(&b, in[0], 0, &clipdist[0], use_load_interp);
       if (ucp_enables & 0xf0)
-         load_clipdist_input(&b, in[0], 1, &clipdist[4]);
+         load_clipdist_input(&b, in[0], 1, &clipdist[4], use_load_interp);
    }
    b.shader->info.inputs_read |= update_mask(ucp_enables);
 
@@ -528,7 +528,7 @@ fs_has_clip_dist_input_var(nir_shader *shader, nir_variable **io_vars,
  */
 bool
 nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
-                  bool use_clipdist_array)
+                  bool use_clipdist_array, bool use_load_interp)
 {
    nir_variable *in[2] = { 0 };
 
@@ -548,8 +548,10 @@ nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
       assert(use_clipdist_array);
 
    nir_foreach_function_with_impl(function, impl, shader) {
-      if (!strcmp(function->name, "main"))
+      if (!strcmp(function->name, "main")) {
-         lower_clip_fs(impl, ucp_enables, in, use_clipdist_array);
+         lower_clip_fs(impl, ucp_enables, in, use_clipdist_array,
+                       use_load_interp);
+      }
    }
 
    return true;

src/compiler/nir/nir_lower_io.c

@@ -320,7 +320,7 @@ emit_load(struct lower_io_state *state,
    switch (mode) {
    case nir_var_shader_in:
       if (nir->info.stage == MESA_SHADER_FRAGMENT &&
-          nir->options->use_interpolated_input_intrinsics &&
+          state->options & nir_lower_io_use_interpolated_input_intrinsics &&
           var->data.interpolation != INTERP_MODE_FLAT &&
           !var->data.per_primitive) {
          if (var->data.interpolation == INTERP_MODE_EXPLICIT ||
@@ -708,7 +708,7 @@ nir_lower_io_block(nir_block *block,
       case nir_intrinsic_interp_deref_at_offset:
       case nir_intrinsic_interp_deref_at_vertex:
          /* We can optionally lower these to load_interpolated_input */
-         if (options->use_interpolated_input_intrinsics ||
+         if (state->options & nir_lower_io_use_interpolated_input_intrinsics ||
              options->lower_interpolate_at)
             break;
          FALLTHROUGH;
@@ -3306,8 +3306,9 @@ nir_lower_io_passes(nir_shader *nir, bool renumber_vs_inputs)
     */
    NIR_PASS_V(nir, nir_lower_io, nir_var_shader_out | nir_var_shader_in,
               type_size_vec4,
-              renumber_vs_inputs ? nir_lower_io_lower_64bit_to_32_new :
+              (renumber_vs_inputs ? nir_lower_io_lower_64bit_to_32_new :
-                                   nir_lower_io_lower_64bit_to_32);
+                                    nir_lower_io_lower_64bit_to_32) |
+              nir_lower_io_use_interpolated_input_intrinsics);
 
    /* nir_io_add_const_offset_to_base needs actual constants. */
    NIR_PASS_V(nir, nir_opt_constant_folding);

src/freedreno/ir3/ir3_compiler.c

@@ -96,7 +96,6 @@ static const nir_shader_compiler_options ir3_base_options = {
    .lower_unpack_unorm_4x8 = true,
    .lower_unpack_unorm_2x16 = true,
    .lower_pack_split = true,
-   .use_interpolated_input_intrinsics = true,
    .lower_to_scalar = true,
    .has_imul24 = true,
    .has_fsub = true,

src/freedreno/ir3/ir3_nir.c

@@ -752,7 +752,8 @@ ir3_nir_post_finalize(struct ir3_shader *shader)
    MESA_TRACE_FUNC();
 
    NIR_PASS_V(s, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-              ir3_glsl_type_size, nir_lower_io_lower_64bit_to_32);
+              ir3_glsl_type_size, nir_lower_io_lower_64bit_to_32 |
+              nir_lower_io_use_interpolated_input_intrinsics);
 
    if (s->info.stage == MESA_SHADER_FRAGMENT) {
       /* NOTE: lower load_barycentric_at_sample first, since it
@@ -1066,7 +1067,7 @@ ir3_nir_lower_variant(struct ir3_shader_variant *so,
       progress |= OPT(s, nir_lower_clip_vs, so->key.ucp_enables, false, true, NULL);
    } else if (s->info.stage == MESA_SHADER_FRAGMENT) {
       if (so->key.ucp_enables && !so->compiler->has_clip_cull)
-         progress |= OPT(s, nir_lower_clip_fs, so->key.ucp_enables, true);
+         progress |= OPT(s, nir_lower_clip_fs, so->key.ucp_enables, true, true);
    }
 
    /* Move large constant variables to the constants attached to the NIR

src/gallium/auxiliary/nir/nir_to_tgsi.c

@@ -3920,7 +3920,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
    }
 
    NIR_PASS_V(s, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-              type_size, (nir_lower_io_options)0);
+              type_size, nir_lower_io_use_interpolated_input_intrinsics);
 
    nir_to_tgsi_lower_txp(s);
    NIR_PASS_V(s, nir_to_tgsi_lower_tex);
@@ -4081,7 +4081,6 @@ static const nir_shader_compiler_options nir_to_tgsi_compiler_options = {
    .lower_usub_sat = true,
    .lower_vector_cmp = true,
    .lower_int64_options = nir_lower_imul_2x32_64,
-   .use_interpolated_input_intrinsics = true,
 
    /* TGSI doesn't have a semantic for local or global index, just local and
     * workgroup id.

src/gallium/drivers/asahi/agx_state.c

@@ -1832,7 +1832,8 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
    so->info.nr_bindful_images = BITSET_LAST_BIT(nir->info.images_used);
 
    NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-            glsl_type_size, nir_lower_io_lower_64bit_to_32);
+            glsl_type_size, nir_lower_io_lower_64bit_to_32 |
+            nir_lower_io_use_interpolated_input_intrinsics);
 
    if (nir->info.stage == MESA_SHADER_FRAGMENT) {
       struct agx_interp_info interp = agx_gather_interp_info(nir);

src/gallium/drivers/freedreno/a2xx/fd2_program.c

@@ -84,7 +84,8 @@ fd2_fp_state_create(struct pipe_context *pctx,
                 : tgsi_to_nir(cso->tokens, pctx->screen, false);
 
    NIR_PASS_V(so->nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-              ir2_glsl_type_size, (nir_lower_io_options)0);
+              ir2_glsl_type_size,
+              nir_lower_io_use_interpolated_input_intrinsics);
 
    if (ir2_optimize_nir(so->nir, true))
       goto fail;

src/gallium/drivers/freedreno/ir3/ir3_cmdline.c

@@ -166,7 +166,8 @@ load_glsl(unsigned num_files, char *const *files, gl_shader_stage stage)
    NIR_PASS_V(nir, nir_lower_frexp);
    NIR_PASS_V(nir, nir_lower_io,
               nir_var_shader_in | nir_var_shader_out | nir_var_uniform,
-              ir3_glsl_type_size, (nir_lower_io_options)0);
+              ir3_glsl_type_size,
+              nir_lower_io_use_interpolated_input_intrinsics);
    NIR_PASS_V(nir, gl_nir_lower_samplers, prog);
 
    return nir;
@@ -384,7 +385,8 @@ main(int argc, char **argv)
       nir = load_spirv(filenames[0], spirv_entry, stage);
 
       NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-                 ir3_glsl_type_size, (nir_lower_io_options)0);
+                 ir3_glsl_type_size,
+                 nir_lower_io_use_interpolated_input_intrinsics);
 
       /* TODO do this somewhere else */
       nir_lower_int64(nir);

src/gallium/drivers/i915/i915_screen.c

@@ -120,7 +120,6 @@ static const nir_shader_compiler_options i915_compiler_options = {
    .lower_sincos = true,
    .lower_uniforms_to_ubo = true,
    .lower_vector_cmp = true,
-   .use_interpolated_input_intrinsics = true,
    .force_indirect_unrolling = nir_var_all,
    .force_indirect_unrolling_sampler = true,
    .max_unroll_iterations = 32,
@@ -165,7 +164,6 @@ static const struct nir_shader_compiler_options gallivm_nir_options = {
    .lower_mul_2x32_64 = true,
    .lower_ifind_msb = true,
    .max_unroll_iterations = 32,
-   .use_interpolated_input_intrinsics = true,
    .lower_cs_local_index_to_id = true,
    .lower_uniforms_to_ubo = true,
    .lower_vector_cmp = true,

src/gallium/drivers/llvmpipe/lp_screen.c

@@ -663,7 +663,6 @@ static const struct nir_shader_compiler_options gallivm_nir_options = {
    .lower_int64_options = nir_lower_imul_2x32_64,
    .lower_doubles_options = nir_lower_dround_even,
    .max_unroll_iterations = 32,
-   .use_interpolated_input_intrinsics = true,
    .lower_to_scalar = true,
    .lower_uniforms_to_ubo = true,
    .lower_vector_cmp = true,

src/gallium/drivers/nouveau/nv30/nv30_screen.c

@@ -480,8 +480,6 @@ static const nir_shader_compiler_options nv30_base_compiler_options = {
    .force_indirect_unrolling_sampler = true,
    .max_unroll_iterations = 32,
    .no_integers = true,
-
-   .use_interpolated_input_intrinsics = true,
 };
 
 static const void *

src/gallium/drivers/panfrost/pan_shader.c

@@ -148,7 +148,8 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
       }
 
       if (key->fs.clip_plane_enable) {
-         NIR_PASS_V(s, nir_lower_clip_fs, key->fs.clip_plane_enable, false);
+         NIR_PASS_V(s, nir_lower_clip_fs, key->fs.clip_plane_enable, false,
+                    true);
       }
 
       if (key->fs.line_smooth) {

src/gallium/drivers/r300/compiler/nir_to_rc.c

@@ -2272,7 +2272,7 @@ nir_to_rc(struct nir_shader *s, struct pipe_screen *screen)
    }
 
    NIR_PASS_V(s, nir_lower_io, nir_var_shader_in | nir_var_shader_out, type_size,
-              (nir_lower_io_options)0);
+              nir_lower_io_use_interpolated_input_intrinsics);
 
    nir_to_rc_lower_txp(s);
    NIR_PASS_V(s, nir_to_rc_lower_tex);

src/gallium/drivers/r300/r300_screen.c

@@ -488,8 +488,7 @@ static int r300_get_video_param(struct pipe_screen *screen,
    .lower_insert_word = true,                 \
    .lower_uniforms_to_ubo = true,             \
    .lower_vector_cmp = true,                  \
-   .no_integers = true,                       \
+   .no_integers = true
-   .use_interpolated_input_intrinsics = true
 
 static const nir_shader_compiler_options r500_vs_compiler_options = {
    COMMON_NIR_OPTIONS,

src/gallium/drivers/r600/r600_pipe_common.c

@@ -1385,7 +1385,6 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 		.has_umad24 = true,
 		.has_umul24 = true,
 		.has_fmulz = true,
-		.use_interpolated_input_intrinsics = true,
 		.has_fsub = true,
 		.has_isub = true,
 		.has_find_msb_rev = true,

src/gallium/drivers/r600/sfn/sfn_nir.cpp

@@ -761,7 +761,9 @@ r600_lower_and_optimize_nir(nir_shader *sh,
               nir_lower_io,
               io_modes,
               r600_glsl_type_size,
-              nir_lower_io_lower_64bit_to_32);
+              (nir_lower_io_options)
+              (nir_lower_io_lower_64bit_to_32 |
+               nir_lower_io_use_interpolated_input_intrinsics));
 
    if (sh->info.stage == MESA_SHADER_FRAGMENT)
       NIR_PASS_V(sh, r600_lower_fs_pos_input);

src/gallium/drivers/softpipe/sp_screen.c

@@ -89,7 +89,6 @@ static const nir_shader_compiler_options sp_compiler_options = {
    .lower_vector_cmp = true,
    .lower_int64_options = nir_lower_imul_2x32_64,
    .max_unroll_iterations = 32,
-   .use_interpolated_input_intrinsics = true,
 
    /* TGSI doesn't have a semantic for local or global index, just local and
     * workgroup id.

src/gallium/drivers/svga/svga_screen.c

@@ -717,8 +717,7 @@ vgpu10_get_shader_param(struct pipe_screen *screen,
    .lower_uniforms_to_ubo = true,                                             \
    .lower_vector_cmp = true,                                                  \
    .lower_cs_local_index_to_id = true,                                        \
-   .max_unroll_iterations = 32,                                               \
+   .max_unroll_iterations = 32
-   .use_interpolated_input_intrinsics = true
 
 #define VGPU10_OPTIONS                                                        \
    .lower_doubles_options = nir_lower_dfloor | nir_lower_dsign | nir_lower_dceil | nir_lower_dtrunc | nir_lower_dround_even, \

src/gallium/drivers/vc4/vc4_program.c

@@ -2289,7 +2289,7 @@ vc4_shader_ntq(struct vc4_context *vc4, enum qstage stage,
         if (c->key->ucp_enables) {
                 if (stage == QSTAGE_FRAG) {
                         NIR_PASS_V(c->s, nir_lower_clip_fs,
-                                   c->key->ucp_enables, false);
+                                   c->key->ucp_enables, false, false);
                 } else {
                         NIR_PASS_V(c->s, nir_lower_clip_vs,
                                    c->key->ucp_enables, false, false, NULL);

src/gallium/drivers/zink/zink_compiler.c

@@ -1383,7 +1383,6 @@ zink_screen_init_compiler(struct zink_screen *screen)
       .support_indirect_inputs = BITFIELD_MASK(MESA_SHADER_COMPUTE),
       .support_indirect_outputs = BITFIELD_MASK(MESA_SHADER_COMPUTE),
       .max_unroll_iterations = 0,
-      .use_interpolated_input_intrinsics = true,
    };
 
    screen->nir_options = default_options;

src/intel/compiler/brw_compiler.c

@@ -75,7 +75,6 @@ const struct nir_shader_compiler_options brw_scalar_nir_options = {
    .lower_usub_borrow = true,
    .max_unroll_iterations = 32,
    .support_16bit_alu = true,
-   .use_interpolated_input_intrinsics = true,
    .vectorize_io = true,
    .vectorize_tess_levels = true,
    .vertex_id_zero_based = true,

src/intel/compiler/brw_nir.c

@@ -607,7 +607,8 @@ brw_nir_lower_fs_inputs(nir_shader *nir,
    }
 
    nir_lower_io(nir, nir_var_shader_in, type_size_vec4,
-                nir_lower_io_lower_64bit_to_32);
+                nir_lower_io_lower_64bit_to_32 |
+                nir_lower_io_use_interpolated_input_intrinsics);
    if (devinfo->ver >= 11)
       nir_lower_interpolation(nir, ~0);
 

src/intel/compiler/elk/elk_nir.c

@@ -521,7 +521,8 @@ elk_nir_lower_fs_inputs(nir_shader *nir,
    }
 
    nir_lower_io(nir, nir_var_shader_in, elk_type_size_vec4,
-                nir_lower_io_lower_64bit_to_32);
+                nir_lower_io_lower_64bit_to_32 |
+                nir_lower_io_use_interpolated_input_intrinsics);
 
    if (key->multisample_fbo == ELK_NEVER) {
       nir_lower_single_sampled(nir);

src/intel/compiler/elk/elk_nir_options.c

@@ -25,7 +25,6 @@
    .lower_device_index_to_zero = true,                                        \
    .vectorize_io = true,                                                      \
    .vectorize_tess_levels = true,                                             \
-   .use_interpolated_input_intrinsics = true,                                 \
    .scalarize_ddx = true,                                                     \
    .lower_insert_byte = true,                                                 \
    .lower_insert_word = true,                                                 \

src/mesa/state_tracker/st_program.c

@@ -660,7 +660,6 @@ static const struct nir_shader_compiler_options draw_nir_options = {
    .lower_int64_options = nir_lower_imul_2x32_64,
    .lower_doubles_options = nir_lower_dround_even,
    .max_unroll_iterations = 32,
-   .use_interpolated_input_intrinsics = true,
    .lower_to_scalar = true,
    .lower_uniforms_to_ubo = true,
    .lower_vector_cmp = true,

src/nouveau/codegen/nv50_ir_from_nir.cpp

@@ -3430,7 +3430,7 @@ Converter::run()
    NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 
    NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-              type_size, (nir_lower_io_options)0);
+              type_size, nir_lower_io_use_interpolated_input_intrinsics);
 
    NIR_PASS_V(nir, nir_lower_subgroups, &subgroup_options);
 
@@ -3630,7 +3630,6 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
    op.vectorize_io = false;
    op.lower_to_scalar = false;
    op.unify_interfaces = false;
-   op.use_interpolated_input_intrinsics = true;
    op.lower_mul_2x32_64 = true; // TODO
    op.has_rotate32 = (chipset >= NVISA_GV100_CHIPSET);
    op.has_imul24 = false;

src/nouveau/compiler/nak/api.rs

@@ -123,7 +123,6 @@ fn nir_options(dev: &nv_device_info) -> nir_shader_compiler_options {
     op.lower_uadd_sat = dev.sm < 70;
     op.lower_usub_sat = dev.sm < 70;
     op.lower_iadd_sat = true; // TODO
-    op.use_interpolated_input_intrinsics = true;
     op.lower_doubles_options = nir_lower_drcp
         | nir_lower_dsqrt
         | nir_lower_drsq

src/nouveau/compiler/nak_nir.c

@@ -1002,7 +1002,8 @@ nak_postprocess_nir(nir_shader *nir,
       OPT(nir, nir_lower_indirect_derefs,
           nir_var_shader_in | nir_var_shader_out, UINT32_MAX);
       OPT(nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-          type_size_vec4, nir_lower_io_lower_64bit_to_32_new);
+          type_size_vec4, nir_lower_io_lower_64bit_to_32_new |
+          nir_lower_io_use_interpolated_input_intrinsics);
       OPT(nir, nir_opt_constant_folding);
       OPT(nir, nak_nir_lower_fs_inputs, nak, fs_key);
       OPT(nir, nak_nir_lower_fs_outputs);

src/panfrost/compiler/bifrost_compile.c

@@ -5221,7 +5221,7 @@ bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id)
    NIR_PASS_V(nir, nir_lower_var_copies);
    NIR_PASS_V(nir, nir_lower_vars_to_ssa);
    NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-              glsl_type_size, 0);
+              glsl_type_size, nir_lower_io_use_interpolated_input_intrinsics);
 
    /* nir_lower[_explicit]_io is lazy and emits mul+add chains even for
     * offsets it could figure out are constant.  Do some constant folding

src/panfrost/compiler/bifrost_compile.h

@@ -89,7 +89,6 @@ void bifrost_compile_shader_nir(nir_shader *nir,
       .fuse_ffma16 = true,                                                     \
       .fuse_ffma32 = true,                                                     \
       .fuse_ffma64 = true,                                                     \
-      .use_interpolated_input_intrinsics = true,                               \
                                                                                \
       .lower_uniforms_to_ubo = true,                                           \
                                                                                \

src/panfrost/midgard/midgard_compile.c

@@ -409,7 +409,7 @@ midgard_preprocess_nir(nir_shader *nir, unsigned gpu_id)
    NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 
    NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
-              glsl_type_size, 0);
+              glsl_type_size, nir_lower_io_use_interpolated_input_intrinsics);
 
    if (nir->info.stage == MESA_SHADER_VERTEX) {
       /* nir_lower[_explicit]_io is lazy and emits mul+add chains even

src/panfrost/midgard/midgard_compile.h

@@ -97,7 +97,6 @@ static const nir_shader_compiler_options midgard_nir_options = {
    .has_fsub = true,
    .has_isub = true,
    .vectorize_io = true,
-   .use_interpolated_input_intrinsics = true,
 
    .vertex_id_zero_based = true,
    .has_cs_global_id = true,