From 25d26a89e35ef93ed6fa73155f385c657fd990dd Mon Sep 17 00:00:00 2001
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Wed, 17 Sep 2025 09:47:59 -0700
Subject: [PATCH] isl: allow sparse with STC_CCS on DG2

Thanks to Nanley Chery for pointing out this possibility.

v2: Make it simpler (Nanley).

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37419>
---
 src/intel/isl/isl.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index a416fb5da02..7c729ca8416 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -3880,8 +3880,15 @@ _isl_surf_info_supports_ccs(const struct isl_device *dev,
    /* Xe2 and newer don't require additional space to be allocated by the
     * driver for plain CCS, so we can trivially allow sparse.
     */
-   if (ISL_GFX_VER(dev) < 20 && (usage & ISL_SURF_USAGE_SPARSE_BIT))
-      return false;
+   if (ISL_GFX_VER(dev) < 20 && (usage & ISL_SURF_USAGE_SPARSE_BIT)) {
+      if (dev->info->has_flat_ccs) {
+         /* Here we can allow STC_CCS for the same reason. */
+         if (!isl_surf_usage_is_stencil(usage))
+            return false;
+      } else {
+         return false;
+      }
+   }
 
    if (usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)
       return false;