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r600: Fix reading back from a temp array immediately after writing on RV770.

Browse source 
KHR-GL33.shaders.indexing.tmp_array.vertexid regressed with the switch to
NIR-to-TGSI because the shader got optimized enough to emit a read just
after writing to the array (the kind of situation where a non-rel write
would have been followed by a PV/PS read).  The R600 and EG docs say you
always need to do this, but apparently some hardware gives you the right
answer anyway so we don't flag it on all of them.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14319>
This commit is contained in:
Emma Anholt 2022-04-02 22:19:59 -07:00 • committed by Marge Bot
parent 26189cdb1d
commit 25836895f3
1 changed files with 11 additions and 0 deletions
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11
src/gallium/drivers/r600/r600_asm.c
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@ -148,6 +148,17 @@ void r600_bytecode_init(struct r600_bytecode *bc,
if ((chip_class == R600) &&
(family != CHIP_RV670 && family != CHIP_RS780 && family != CHIP_RS880)) {
bc->ar_handling = AR_HANDLE_RV6XX;
/* Insert a nop after a relative temp write so that a read in
* the following instruction group gets the right value. The
* r600 and EG ISA specs both say that read-after-rel-write of a
* register in the next instr group is illegal, but apparently
* that's not true on all chips (see commit
* c96b9834032952492efbd2d1f5511fe225704918).
*/
bc->r6xx_nop_after_rel_dst = 1;
} else if (family == CHIP_RV770) {
bc->ar_handling = AR_HANDLE_NORMAL;
bc->r6xx_nop_after_rel_dst = 1;
} else {
bc->ar_handling = AR_HANDLE_NORMAL;