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i965/vs: Fix Gen4/5 VUE map inconsistency with gl_ClipVertex

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This is roughly a backport of Eric's commit 0967c362.

We avoided assigning a slot in the VUE map for gl_ClipVertex, but left
the bit set in outputs_written, producing horrible confusion further
down the pipe.

Mostly fixes rendering in source games, and probably in Freespace 2 SCP.

No Piglit regressions on Ironlake.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

V2: Mask out the bit, not its index. Strangely, the game still worked
with that wrong, but rendering of pretty much anything else was
completely trashed.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Chris Forbes 2013-04-27 21:56:18 +12:00
parent 3cff41c7e4
commit 251c87d884
1 changed files with 5 additions and 3 deletions
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8
src/mesa/drivers/dri/i965/brw_vs.c
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@ -62,9 +62,13 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
{
const struct intel_context *intel = &brw->intel;
struct brw_vue_map *vue_map = &c->prog_data.vue_map;
GLbitfield64 outputs_written = c->prog_data.outputs_written;
GLbitfield64 outputs_written;
int i;
if (intel->gen < 6)
c->prog_data.outputs_written &= ~BITFIELD64_BIT(VERT_RESULT_CLIP_VERTEX);
outputs_written = c->prog_data.outputs_written;
vue_map->num_slots = 0;
for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
vue_map->vert_result_to_slot[i] = -1;
@ -150,8 +154,6 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
* feedback is enabled or disabled, just go ahead and assign a slot for it.
*/
for (int i = 0; i < VERT_RESULT_MAX; ++i) {
if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
continue;
if ((outputs_written & BITFIELD64_BIT(i)) &&
vue_map->vert_result_to_slot[i] == -1) {
assign_vue_slot(vue_map, i);