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freedreno/ir3: Don't use isam for coherent image loads on a6xx.
If the coherent flag is present, then we need to not have an incoherent cache between us and previous stores to the image that were also decorated as coherent. isam apparently (unsurprisingly) goes through a texture cache. Use ldib instead, so that we don't get the wrong result. We need a similar fix for pre-a6xx, but we don't have emit_intrinsic_load_image for those (yet). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>
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2 changed files with 8 additions and 6 deletions
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@ -20,17 +20,11 @@ KHR-GLES31.core.gpu_shader5.fma_precision_vec2,Fail
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KHR-GLES31.core.gpu_shader5.fma_precision_vec3,Fail
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KHR-GLES31.core.gpu_shader5.fma_precision_vec4,Fail
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# "Got red: 1, expected 0.00392157, at (1, 0)"
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KHR-GLES31.core.compute_shader.resource-image,Fail
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# Lots of errors like "[279] Check failed. Received: [3,0,0,2] instead of: [5,0,0,2]"
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KHR-GLES31.core.geometry_shader.layered_framebuffer.depth_support,Fail
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KHR-GLES31.core.geometry_shader.layered_framebuffer.stencil_support,Fail
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# " [31] Check failed. Received: [3,0,0,2] instead of: [5,0,0,2]"
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KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-fs,Fail
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# " Pixel data comparison failed; expected: (0.1, 0.2, 0.3, 0.4) rendered: (0, 0, 0, 0) epsilon: 0.00392157
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# Pixel data comparison failed at esextcTessellationShaderPoints.cpp:597"
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KHR-GLES31.core.tessellation_shader.tessellation_shader_point_mode.point_rendering,Fail
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@ -1209,6 +1209,14 @@ static void
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emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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struct ir3_instruction **dst)
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{
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/* Coherent accesses have to go directly to memory, rather than through
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* ISAM's texture cache (which isn't coherent with image stores).
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*/
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if (nir_intrinsic_access(intr) & ACCESS_COHERENT && ctx->compiler->gen >= 6) {
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ctx->funcs->emit_intrinsic_load_image(ctx, intr, dst);
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return;
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}
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struct ir3_block *b = ctx->block;
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struct tex_src_info info = get_image_samp_tex_src(ctx, intr);
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struct ir3_instruction *sam;
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