panfrost: Blit with the RUN_FULLSCREEN instruction (v13)

Extend RUN_FULLSCREEN support to architecture v13.

Draw call descriptor flags must now be copied to input staging
registers for the tiler to avoid dereferences in the fragment
pre-pass.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40124>
This commit is contained in:
Loïc Molinari 2026-03-31 18:33:22 +02:00 committed by Marge Bot
parent 712f2534b9
commit 23ab18e9e3
3 changed files with 32 additions and 16 deletions

View file

@ -25,8 +25,7 @@ panfrost_blitter_draw_rectangle(struct blitter_context *blitter,
struct panfrost_context *pctx = pan_context(ctx);
struct panfrost_screen *scr = pan_screen(ctx->screen);
if (scr->dev.arch <= 8 || scr->dev.arch >= 13 || depth != 0.0f ||
num_instances > 1)
if (scr->dev.arch <= 8 || depth != 0.0f || num_instances > 1)
goto fallback;
/* Map viewport to the dest rect of the framebuffer. The tiler will then be

View file

@ -1476,23 +1476,21 @@ GENX(csf_launch_draw_indirect)(struct panfrost_batch *batch,
}
}
#if PAN_ARCH <= 12
static struct pan_ptr
csf_emit_fullscreen_dcd(struct panfrost_batch *batch,
struct pan_ptr vertex_array, uint64_t resources)
struct pan_ptr vertex_array, uint64_t resources,
struct MALI_DCD_FLAGS_0 *dcd_flags0,
struct MALI_DCD_FLAGS_1 *dcd_flags1)
{
struct panfrost_context *ctx = batch->ctx;
struct pan_ptr dcd = pan_pool_alloc_desc(&batch->pool.base, DRAW);
struct MALI_DCD_FLAGS_0 dcd_flags0_unpacked = { 0, };
struct MALI_DCD_FLAGS_1 dcd_flags1_unpacked = { 0, };
csf_emit_draw_flags(ctx, MESA_PRIM_QUADS, true, &dcd_flags0_unpacked,
&dcd_flags1_unpacked);
csf_emit_draw_flags(ctx, MESA_PRIM_QUADS, true, dcd_flags0, dcd_flags1);
pan_cast_and_pack(dcd.cpu, DRAW, cfg) {
/* Flags */
cfg.flags_0 = dcd_flags0_unpacked;
cfg.flags_1 = dcd_flags1_unpacked;
cfg.flags_0 = *dcd_flags0;
cfg.flags_1 = *dcd_flags1;
/* Vertex descriptor */
if (vertex_array.cpu) {
@ -1538,17 +1536,17 @@ csf_emit_fullscreen_dcd(struct panfrost_batch *batch,
return dcd;
}
#endif
void
GENX(csf_launch_draw_fullscreen)(struct panfrost_batch *batch,
enum blitter_attrib_type type,
const struct blitter_attrib *attrib)
{
#if PAN_ARCH <= 12
PAN_TRACE_FUNC(PAN_TRACE_GL_CSF);
struct cs_builder *b = batch->csf.cs.builder;
struct MALI_DCD_FLAGS_0 dcd_flags0_unpacked = { 0, };
struct MALI_DCD_FLAGS_1 dcd_flags1_unpacked = { 0, };
if (batch->draw_count == 0) {
emit_tiler_oom_context(b, batch);
@ -1559,7 +1557,9 @@ GENX(csf_launch_draw_fullscreen)(struct panfrost_batch *batch,
struct pan_ptr array = panfrost_emit_fullscreen_vertex_array(batch, type,
attrib);
uint64_t resources = panfrost_emit_resources(batch, MESA_SHADER_FRAGMENT);
struct pan_ptr dcd = csf_emit_fullscreen_dcd(batch, array, resources);
struct pan_ptr dcd = csf_emit_fullscreen_dcd(batch, array, resources,
&dcd_flags0_unpacked,
&dcd_flags1_unpacked);
struct mali_primitive_flags_packed primitive_flags;
pan_pack(&primitive_flags, PRIMITIVE_FLAGS, cfg) {
@ -1574,14 +1574,22 @@ GENX(csf_launch_draw_fullscreen)(struct panfrost_batch *batch,
cs_move64_to(b, cs_sr_reg64(b, FULLSCREEN, SCISSOR_BOX), *sbd);
cs_move32_to(b, cs_sr_reg32(b, FULLSCREEN, TILER_FLAGS),
primitive_flags.opaque[0]);
#if PAN_ARCH >= 13
struct mali_dcd_flags_0_packed dcd_flags0;
struct mali_dcd_flags_1_packed dcd_flags1;
MALI_DCD_FLAGS_0_pack(&dcd_flags0, &dcd_flags0_unpacked);
MALI_DCD_FLAGS_1_pack(&dcd_flags1, &dcd_flags1_unpacked);
cs_move32_to(b, cs_sr_reg32(b, FULLSCREEN, TILER_DCD_FLAGS0),
dcd_flags0.opaque[0]);
cs_move32_to(b, cs_sr_reg32(b, FULLSCREEN, TILER_DCD_FLAGS1),
dcd_flags1.opaque[0]);
cs_move32_to(b, cs_sr_reg32(b, FULLSCREEN, TILER_DCD_FLAGS2), 0);
#endif
/* Emit RUN_FULLSCREEN. */
struct cs_index dcd_pointer = cs_reg64(b, 64);
cs_move64_to(b, dcd_pointer, dcd.gpu);
cs_run_fullscreen(b, 0, dcd_pointer);
#else
UNREACHABLE("Unsupported architecture!");
#endif
}
#define POSITION_FIFO_SIZE (64 * 1024)

View file

@ -1464,6 +1464,15 @@
<value name="OQ" value="64"/>
</enum>
<enum name="FULLSCREEN SR">
<value name="TILER_CTX" value="40"/>
<value name="SCISSOR_BOX" value="42"/>
<value name="TILER_FLAGS" value="56"/>
<value name="TILER_DCD_FLAGS0" value="61"/>
<value name="TILER_DCD_FLAGS1" value="62"/>
<value name="TILER_DCD_FLAGS2" value="63"/>
</enum>
<enum name="FRAGMENT SR">
<value name="FBD_POINTER" value="40"/>
<value name="BBOX_MIN" value="42"/>