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radv: Implement barriers for transfer queues.

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The current flush flags in RADV don't really match the SDMA HW,
so just always emit a NOP packet, for now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26580>
This commit is contained in:
Timur Kristóf 2023-10-05 11:01:14 +02:00 • committed by Marge Bot
parent 4f2b4b81d1
commit 23590a4e98
1 changed files with 11 additions and 1 deletions
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12
src/amd/vulkan/radv_cmd_buffer.c
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@ -10489,7 +10489,17 @@ radv_barrier(struct radv_cmd_buffer *cmd_buffer, const VkDependencyInfo *dep_inf
}
radv_gang_barrier(cmd_buffer, 0, dst_stage_mask);
radv_cp_dma_wait_for_stages(cmd_buffer, src_stage_mask);
if (cmd_buffer->qf == RADV_QUEUE_TRANSFER) {
/* SDMA NOP packet waits for all pending SDMA operations to complete.
* Note that GFX9+ is supposed to have RAW dependency tracking, but it's buggy
* so we can't rely on it fow now.
*/
radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 1);
radeon_emit(cmd_buffer->cs, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0));
} else {
radv_cp_dma_wait_for_stages(cmd_buffer, src_stage_mask);
}
cmd_buffer->state.flush_bits |= dst_flush_bits;