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panfrost: add panfrost_init_screen_caps
It's one-one map of panfrost_get_param() and panfrost_get_paramf(). Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32955>
This commit is contained in:
Qiang Yu
Marge Bot
parent
aa239fd52d
commit
205669e3a9
1 changed files with 249 additions and 0 deletions
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@ -880,6 +880,253 @@ panfrost_get_compute_param(struct pipe_screen *pscreen,
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return 0;
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}
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static void
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panfrost_init_screen_caps(struct panfrost_screen *screen)
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{
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struct pipe_caps *caps = (struct pipe_caps *)&screen->base.caps;
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u_init_pipe_screen_caps(&screen->base, 1);
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struct panfrost_device *dev = &screen->dev;
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/* Our GL 3.x implementation is WIP */
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bool is_gl3 = dev->debug & PAN_DBG_GL3;
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/* Native MRT is introduced with v5 */
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bool has_mrt = (dev->arch >= 5);
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caps->npot_textures = true;
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caps->mixed_color_depth_bits = true;
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caps->fragment_shader_texture_lod = true;
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caps->vertex_color_unclamped = true;
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caps->depth_clip_disable = true;
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caps->mixed_framebuffer_sizes = true;
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caps->frontend_noop = true;
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caps->sample_shading = true;
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caps->fragment_shader_derivatives = true;
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caps->framebuffer_no_attachment = true;
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caps->quads_follow_provoking_vertex_convention = true;
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caps->shader_pack_half_float = true;
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caps->has_const_bw = true;
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/* Removed in v9 (Valhall) */
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caps->depth_clip_disable_separate = dev->arch < 9;
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caps->max_render_targets =
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caps->fbfetch = has_mrt ? 8 : 1;
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caps->fbfetch_coherent = true;
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caps->max_dual_source_render_targets = 1;
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caps->occlusion_query = true;
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caps->primitive_restart = true;
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caps->primitive_restart_fixed_index = true;
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caps->anisotropic_filter =
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panfrost_device_gpu_rev(dev) >= dev->model->min_rev_anisotropic;
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/* Compile side is done for Bifrost, Midgard TODO. Needs some kernel
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* work to turn on, since CYCLE_COUNT_START needs to be issued. In
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* kbase, userspace requests this via BASE_JD_REQ_PERMON. There is not
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* yet way to request this with mainline TODO */
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caps->shader_clock = false;
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caps->vs_instanceid = true;
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caps->texture_multisample = true;
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caps->surface_sample_count = true;
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caps->sampler_view_target = true;
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caps->clip_halfz = true;
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caps->polygon_offset_clamp = true;
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caps->texture_swizzle = true;
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caps->texture_mirror_clamp_to_edge = true;
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caps->vertex_element_instance_divisor = true;
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caps->blend_equation_separate = true;
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caps->indep_blend_enable = true;
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caps->indep_blend_func = true;
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caps->generate_mipmap = true;
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caps->uma = true;
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caps->texture_float_linear = true;
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caps->texture_half_float_linear = true;
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caps->shader_array_components = true;
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caps->texture_buffer_objects = true;
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caps->packed_uniforms = true;
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caps->image_load_formatted = true;
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caps->cube_map_array = true;
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caps->compute = true;
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caps->int64 = true;
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caps->copy_between_compressed_and_plain_formats = true;
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caps->max_stream_output_buffers = PIPE_MAX_SO_BUFFERS;
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caps->max_stream_output_separate_components =
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caps->max_stream_output_interleaved_components = PIPE_MAX_SO_OUTPUTS;
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caps->stream_output_pause_resume = true;
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caps->stream_output_interleave_buffers = true;
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caps->max_texture_array_layers = 2048;
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caps->glsl_feature_level =
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caps->glsl_feature_level_compatibility = is_gl3 ? 330 : 140;
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caps->essl_feature_level = dev->arch >= 6 ? 320 : 310;
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caps->constant_buffer_offset_alignment = 16;
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/* v7 (only) restricts component orders with AFBC. To workaround, we
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* compose format swizzles with texture swizzles. pan_texture.c motsly
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* handles this but we need to fix up the border colour.
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*/
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caps->texture_border_color_quirk = dev->arch == 7 || dev->arch >= 10 ?
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PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO : 0;
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caps->max_texel_buffer_elements_uint = PAN_MAX_TEXEL_BUFFER_ELEMENTS;
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/* Must be at least 64 for correct behaviour */
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caps->texture_buffer_offset_alignment = 64;
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caps->query_time_elapsed =
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caps->query_timestamp =
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dev->kmod.props.gpu_can_query_timestamp &&
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dev->kmod.props.timestamp_frequency != 0;
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caps->timer_resolution = pan_gpu_time_to_ns(dev, 1);
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/* The hardware requires element alignment for data conversion to work
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* as expected. If data conversion is not required, this restriction is
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* lifted on Midgard at a performance penalty. We conservatively
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* require element alignment for vertex buffers, using u_vbuf to
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* translate to match the hardware requirement.
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*
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* This is less heavy-handed than PIPE_VERTEX_INPUT_ALIGNMENT_4BYTE, which
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* would needlessly require alignment even for 8-bit formats.
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*/
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caps->vertex_input_alignment = PIPE_VERTEX_INPUT_ALIGNMENT_ELEMENT;
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caps->max_texture_2d_size = 1 << (PAN_MAX_MIP_LEVELS - 1);
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caps->max_texture_3d_levels =
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caps->max_texture_cube_levels = PAN_MAX_MIP_LEVELS;
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/* pixel coord is in integer sysval on bifrost. */
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caps->fs_coord_pixel_center_integer = dev->arch >= 6;
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caps->fs_coord_pixel_center_half_integer = dev->arch < 6;
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/* Hardware is upper left */
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caps->fs_coord_origin_lower_left = false;
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caps->fs_coord_origin_upper_left = true;
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caps->tgsi_texcoord = true;
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/* We would prefer varyings on Midgard, but proper sysvals on Bifrost */
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caps->fs_face_is_integer_sysval =
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caps->fs_position_is_sysval =
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caps->fs_point_is_sysval = dev->arch >= 6;
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caps->seamless_cube_map = true;
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caps->seamless_cube_map_per_texture = true;
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caps->max_vertex_element_src_offset = 0xffff;
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caps->texture_transfer_modes = 0;
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caps->endianness = PIPE_ENDIAN_NATIVE;
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caps->max_texture_gather_components = 4;
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caps->min_texture_gather_offset = -8;
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caps->max_texture_gather_offset = 7;
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uint64_t system_memory;
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caps->video_memory = os_get_total_physical_memory(&system_memory) ?
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system_memory >> 20 : 0;
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caps->shader_stencil_export = true;
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caps->conditional_render = true;
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caps->conditional_render_inverted = true;
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caps->shader_buffer_offset_alignment = 4;
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caps->max_varyings = dev->arch >= 9 ? 16 : 32;
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/* Removed in v6 (Bifrost) */
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caps->gl_clamp =
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caps->texture_mirror_clamp =
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caps->alpha_test = dev->arch <= 5;
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/* Removed in v9 (Valhall). PRIMTIIVE_RESTART_FIXED_INDEX is of course
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* still supported as it is core GLES3.0 functionality
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*/
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caps->emulate_nonfixed_primitive_restart = dev->arch >= 9;
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caps->flatshade = false;
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caps->two_sided_color = false;
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caps->clip_planes = 0;
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caps->packed_stream_output = false;
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caps->viewport_transform_lowered = true;
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caps->psiz_clamped = true;
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caps->nir_images_as_deref = false;
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caps->draw_indirect = true;
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caps->multi_draw_indirect = dev->arch >= 10;
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caps->start_instance =
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caps->draw_parameters = pan_is_bifrost(dev);
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/* Mali supports GLES and QUADS. Midgard and v6 Bifrost
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* support more */
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uint32_t modes = BITFIELD_MASK(MESA_PRIM_QUADS + 1);
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if (dev->arch <= 6) {
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modes |= BITFIELD_BIT(MESA_PRIM_QUAD_STRIP);
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modes |= BITFIELD_BIT(MESA_PRIM_POLYGON);
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}
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if (dev->arch >= 9) {
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/* Although Valhall is supposed to support quads, they
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* don't seem to work correctly. Disable to fix
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* arb-provoking-vertex-render.
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*/
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modes &= ~BITFIELD_BIT(MESA_PRIM_QUADS);
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}
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caps->supported_prim_modes =
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caps->supported_prim_modes_with_restart = modes;
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caps->image_store_formatted = true;
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caps->native_fence_fd = true;
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caps->context_priority_mask =
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from_kmod_group_allow_priority_flags(
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dev->kmod.props.allowed_group_priorities_mask);
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caps->astc_decode_mode = dev->arch >= 9 && (dev->compressed_formats & (1 << 30));
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caps->min_line_width =
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caps->min_line_width_aa =
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caps->min_point_size =
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caps->min_point_size_aa = 1;
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caps->point_size_granularity =
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caps->line_width_granularity = 0.0625;
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caps->max_line_width =
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caps->max_line_width_aa =
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caps->max_point_size =
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caps->max_point_size_aa = 4095.9375;
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caps->max_texture_anisotropy = 16.0;
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caps->max_texture_lod_bias = 16.0; /* arbitrary */
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}
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static void
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panfrost_destroy_screen(struct pipe_screen *pscreen)
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{
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@ -1040,6 +1287,8 @@ panfrost_create_screen(int fd, const struct pipe_screen_config *config,
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pan_blend_shader_cache_init(&dev->blend_shaders,
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panfrost_device_gpu_id(dev));
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panfrost_init_screen_caps(screen);
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panfrost_disk_cache_init(screen);
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if (panfrost_pool_init(&screen->mempools.bin, NULL, dev, PAN_BO_EXECUTE,
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