freedreno/ir3: output ir3 and nir asm for frameretrace

See: 298dc8195b

Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark 2018-07-09 13:17:12 -04:00
parent e4c225ab6f
commit 1f464d5301
4 changed files with 69 additions and 0 deletions

View file

@ -25,6 +25,17 @@
#define DISASM_H_
#include <stdio.h>
#include <stdbool.h>
#include "util/u_debug.h"
enum fd_shader_debug {
FD_DBG_SHADER_VS = 0x01,
FD_DBG_SHADER_FS = 0x02,
FD_DBG_SHADER_CS = 0x04,
};
extern enum fd_shader_debug fd_shader_debug;
enum shader_t {
SHADER_VERTEX,
@ -36,6 +47,38 @@ enum shader_t {
SHADER_MAX,
};
static inline bool
shader_debug_enabled(enum shader_t type)
{
switch (type) {
case SHADER_VERTEX: return !!(fd_shader_debug & FD_DBG_SHADER_VS);
case SHADER_FRAGMENT: return !!(fd_shader_debug & FD_DBG_SHADER_FS);
case SHADER_COMPUTE: return !!(fd_shader_debug & FD_DBG_SHADER_CS);
default:
debug_assert(0);
return false;
}
}
static inline const char *
shader_stage_name(enum shader_t type)
{
/* NOTE these names are chosen to match the INTEL_DEBUG output
* which frameretrace parses. Hurray accidental ABI!
*/
switch (type) {
case SHADER_VERTEX: return "vertex";
case SHADER_TCS: return "tessellation control";
case SHADER_TES: return "tessellation evaluation";
case SHADER_GEOM: return "geometry";
case SHADER_FRAGMENT: return "fragment";
case SHADER_COMPUTE: return "compute";
default:
debug_assert(0);
return NULL;
}
}
/* bitmask of debug flags */
enum debug_t {
PRINT_RAW = 0x1, /* dump raw hexdump */

View file

@ -93,6 +93,17 @@ int fd_mesa_debug = 0;
bool fd_binning_enabled = true;
static bool glsl120 = false;
static const struct debug_named_value shader_debug_options[] = {
{"vs", FD_DBG_SHADER_VS, "Print shader disasm for vertex shaders"},
{"fs", FD_DBG_SHADER_FS, "Print shader disasm for fragment shaders"},
{"cs", FD_DBG_SHADER_CS, "Print shader disasm for compute shaders"},
DEBUG_NAMED_VALUE_END
};
DEBUG_GET_ONCE_FLAGS_OPTION(fd_shader_debug, "FD_SHADER_DEBUG", shader_debug_options, 0)
enum fd_shader_debug fd_shader_debug = 0;
static const char *
fd_screen_get_name(struct pipe_screen *pscreen)
{
@ -783,6 +794,7 @@ fd_screen_create(struct fd_device *dev)
uint64_t val;
fd_mesa_debug = debug_get_option_fd_mesa_debug();
fd_shader_debug = debug_get_option_fd_shader_debug();
if (fd_mesa_debug & FD_DBG_NOBIN)
fd_binning_enabled = false;

View file

@ -220,6 +220,12 @@ compile_init(struct ir3_compiler *compiler,
nir_print_shader(ctx->s, stdout);
}
if (shader_debug_enabled(so->type)) {
fprintf(stderr, "NIR (final form) for %s shader:\n",
shader_stage_name(so->type));
nir_print_shader(ctx->s, stderr);
}
ir3_nir_scan_driver_consts(ctx->s, &so->const_layout);
so->num_uniforms = ctx->s->num_uniforms;

View file

@ -162,6 +162,14 @@ assemble_variant(struct ir3_shader_variant *v)
ir3_shader_disasm(v, bin, stdout);
}
if (shader_debug_enabled(v->shader->type)) {
fprintf(stderr, "Native code for unnamed %s shader %s:\n",
shader_stage_name(v->shader->type), v->shader->nir->info.name);
if (v->shader->type == SHADER_FRAGMENT)
fprintf(stderr, "SIMD0\n");
ir3_shader_disasm(v, bin, stderr);
}
free(bin);
/* no need to keep the ir around beyond this point: */