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radv: Move radv_nir_lower_intrinsics_early to new file.
Also ran clang-format on the affected code. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21971>
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4 changed files with 82 additions and 50 deletions
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@ -74,6 +74,7 @@ libradv_files = files(
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'nir/radv_nir_apply_pipeline_layout.c',
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'nir/radv_nir_lower_abi.c',
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'nir/radv_nir_lower_fs_intrinsics.c',
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'nir/radv_nir_lower_intrinsics_early.c',
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'nir/radv_nir_lower_primitive_shading_rate.c',
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'nir/radv_nir_lower_ray_queries.c',
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'nir/radv_nir_lower_vs_inputs.c',
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@ -62,6 +62,8 @@ bool radv_nir_lower_primitive_shading_rate(nir_shader *nir, enum amd_gfx_level g
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bool radv_nir_lower_fs_intrinsics(nir_shader *nir, const struct radv_pipeline_stage *fs_stage,
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const struct radv_pipeline_key *key);
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bool radv_nir_lower_intrinsics_early(nir_shader *nir, const struct radv_pipeline_key *key);
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#ifdef __cplusplus
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}
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#endif
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78
src/amd/vulkan/nir/radv_nir_lower_intrinsics_early.c
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78
src/amd/vulkan/nir/radv_nir_lower_intrinsics_early.c
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@ -0,0 +1,78 @@
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/*
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* Copyright © 2016 Red Hat.
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* Copyright © 2016 Bas Nieuwenhuizen
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* Copyright © 2023 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_builder.h"
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#include "radv_nir.h"
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#include "radv_private.h"
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bool
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radv_nir_lower_intrinsics_early(nir_shader *nir, const struct radv_pipeline_key *key)
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{
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nir_function_impl *entry = nir_shader_get_entrypoint(nir);
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bool progress = false;
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nir_builder b;
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nir_builder_init(&b, entry);
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nir_foreach_block (block, entry) {
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nir_foreach_instr_safe (instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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b.cursor = nir_before_instr(&intrin->instr);
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nir_ssa_def *def = NULL;
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switch (intrin->intrinsic) {
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case nir_intrinsic_is_sparse_texels_resident:
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def = nir_ieq_imm(&b, intrin->src[0].ssa, 0);
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break;
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case nir_intrinsic_sparse_residency_code_and:
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def = nir_ior(&b, intrin->src[0].ssa, intrin->src[1].ssa);
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break;
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case nir_intrinsic_load_view_index:
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if (key->has_multiview_view_index)
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continue;
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def = nir_imm_zero(&b, 1, 32);
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break;
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default:
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continue;
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}
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, def);
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nir_instr_remove(instr);
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progress = true;
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}
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}
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if (progress)
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nir_metadata_preserve(entry, nir_metadata_block_index | nir_metadata_dominance);
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else
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nir_metadata_preserve(entry, nir_metadata_all);
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return progress;
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}
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@ -328,55 +328,6 @@ radv_compiler_debug(void *private_data, enum aco_compiler_debug_level level, con
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NULL, 0, 0, "radv", message);
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}
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static bool
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lower_intrinsics(nir_shader *nir, const struct radv_pipeline_key *key)
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{
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nir_function_impl *entry = nir_shader_get_entrypoint(nir);
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bool progress = false;
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nir_builder b;
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nir_builder_init(&b, entry);
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nir_foreach_block (block, entry) {
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nir_foreach_instr_safe (instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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b.cursor = nir_before_instr(&intrin->instr);
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nir_ssa_def *def = NULL;
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switch (intrin->intrinsic) {
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case nir_intrinsic_is_sparse_texels_resident:
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def = nir_ieq_imm(&b, intrin->src[0].ssa, 0);
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break;
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case nir_intrinsic_sparse_residency_code_and:
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def = nir_ior(&b, intrin->src[0].ssa, intrin->src[1].ssa);
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break;
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case nir_intrinsic_load_view_index:
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if (key->has_multiview_view_index)
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continue;
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def = nir_imm_zero(&b, 1, 32);
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break;
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default:
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continue;
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}
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, def);
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nir_instr_remove(instr);
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progress = true;
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}
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}
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if (progress)
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nir_metadata_preserve(entry, nir_metadata_block_index | nir_metadata_dominance);
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else
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nir_metadata_preserve(entry, nir_metadata_all);
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return progress;
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}
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static bool
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is_sincos(const nir_instr *instr, const void *_)
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{
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@ -748,7 +699,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_
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NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ubo | nir_var_mem_ssbo,
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nir_address_format_vec2_index_32bit_offset);
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NIR_PASS(_, nir, lower_intrinsics, key);
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NIR_PASS(_, nir, radv_nir_lower_intrinsics_early, key);
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/* Lower deref operations for compute shared memory. */
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if (nir->info.stage == MESA_SHADER_COMPUTE ||
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