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radeonsi: first bits for non-monolithic shaders
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
0303886b10
commit
19a92886a8
4 changed files with 45 additions and 14 deletions
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@ -601,6 +601,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
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sscreen->b.has_cp_dma = true;
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sscreen->b.has_streamout = true;
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sscreen->use_monolithic_shaders = true;
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if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
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sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
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@ -84,6 +84,9 @@ struct si_compute;
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struct si_screen {
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struct r600_common_screen b;
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unsigned gs_table_depth;
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/* Whether shaders are monolithic (1-part) or separate (3-part). */
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bool use_monolithic_shaders;
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};
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struct si_blend_color {
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@ -70,6 +70,12 @@ struct si_shader_context
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unsigned type; /* TGSI_PROCESSOR_* specifies the type of shader. */
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bool is_gs_copy_shader;
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/* Whether to generate the optimized shader variant compiled as a whole
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* (without a prolog and epilog)
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*/
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bool is_monolithic;
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int param_streamout_config;
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int param_streamout_write_index;
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int param_streamout_offset[4];
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@ -3657,8 +3663,10 @@ static void create_function(struct si_shader_context *ctx)
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struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base;
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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struct si_shader *shader = ctx->shader;
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LLVMTypeRef params[SI_NUM_PARAMS], v2i32, v3i32;
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LLVMTypeRef params[SI_NUM_PARAMS + SI_NUM_VERTEX_BUFFERS], v2i32, v3i32;
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LLVMTypeRef returns[16+32*4];
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unsigned i, last_array_pointer, last_sgpr, num_params;
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unsigned num_returns = 0;
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v2i32 = LLVMVectorType(ctx->i32, 2);
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v3i32 = LLVMVectorType(ctx->i32, 3);
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@ -3785,7 +3793,7 @@ static void create_function(struct si_shader_context *ctx)
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assert(num_params <= Elements(params));
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si_create_function(ctx, NULL, 0, params,
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si_create_function(ctx, returns, num_returns, params,
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num_params, last_array_pointer, last_sgpr);
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shader->num_input_sgprs = 0;
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@ -4499,9 +4507,11 @@ static void si_init_shader_ctx(struct si_shader_context *ctx,
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bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
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}
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int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug)
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static int si_compile_tgsi_shader(struct si_screen *sscreen,
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LLVMTargetMachineRef tm,
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struct si_shader *shader,
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bool is_monolithic,
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struct pipe_debug_callback *debug)
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{
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struct si_shader_selector *sel = shader->selector;
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struct tgsi_token *tokens = sel->tokens;
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@ -4531,6 +4541,7 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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si_init_shader_ctx(&ctx, sscreen, shader, tm,
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poly_stipple ? &stipple_shader_info : &sel->info);
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ctx.is_monolithic = is_monolithic;
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shader->uses_instanceid = sel->info.uses_instanceid;
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@ -4611,14 +4622,6 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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goto out;
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}
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si_shader_dump(sscreen, shader, debug, ctx.type);
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r = si_shader_binary_upload(sscreen, shader);
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if (r) {
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fprintf(stderr, "LLVM failed to upload shader\n");
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goto out;
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}
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radeon_llvm_dispose(&ctx.radeon_bld);
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/* Calculate the number of fragment input VGPRs. */
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@ -4682,6 +4685,30 @@ out:
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return r;
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}
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int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug)
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{
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int r;
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/* Compile TGSI. */
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r = si_compile_tgsi_shader(sscreen, tm, shader,
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sscreen->use_monolithic_shaders, debug);
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if (r)
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return r;
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si_shader_dump(sscreen, shader, debug, shader->selector->info.processor);
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/* Upload. */
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r = si_shader_binary_upload(sscreen, shader);
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if (r) {
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fprintf(stderr, "LLVM failed to upload shader\n");
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return r;
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}
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return 0;
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}
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void si_shader_destroy(struct si_shader *shader)
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{
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if (shader->gs_copy_shader) {
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@ -363,7 +363,7 @@ static inline bool si_vs_exports_prim_id(struct si_shader *shader)
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return false;
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}
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/* radeonsi_shader.c */
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/* si_shader.c */
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int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug);
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