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Merge remote branch 'origin/master' into pipe-video

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This commit is contained in:
Christian König 2010-11-11 21:07:42 +01:00
commit 195bbe8ce2
379 changed files with 24507 additions and 20140 deletions
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123
SConstruct
View file

@ -3,14 +3,14 @@
#
# For example, invoke scons as
#
# scons debug=1 dri=0 machine=x86
# scons build=debug llvm=yes machine=x86
#
# to set configuration variables. Or you can write those options to a file
# named config.py:
#
# # config.py
# debug=1
# dri=0
# build='debug'
# llvm=True
# machine='x86'
#
# Invoke
@ -30,54 +30,8 @@ import common
#######################################################################
# Configuration options
default_statetrackers = 'mesa'
default_targets = 'graw-null'
if common.default_platform in ('linux', 'freebsd', 'darwin'):
default_drivers = 'softpipe,galahad,failover,svga,i915,i965,trace,identity,llvmpipe'
default_winsys = 'xlib'
elif common.default_platform in ('winddk',):
default_drivers = 'softpipe,svga,i915,i965,trace,identity'
default_winsys = 'all'
elif common.default_platform in ('embedded',):
default_drivers = 'softpipe,llvmpipe'
default_winsys = 'xlib'
else:
default_drivers = 'all'
default_winsys = 'all'
opts = Variables('config.py')
common.AddOptions(opts)
opts.Add(ListVariable('statetrackers', 'state trackers to build', default_statetrackers,
['mesa', 'python', 'xorg', 'egl']))
opts.Add(ListVariable('drivers', 'pipe drivers to build', default_drivers,
['softpipe', 'galahad', 'failover', 'svga', 'i915', 'i965', 'trace', 'r300', 'r600', 'identity', 'llvmpipe', 'nouveau', 'nv50', 'nvfx']))
opts.Add(ListVariable('winsys', 'winsys drivers to build', default_winsys,
['xlib', 'vmware', 'i915', 'i965', 'gdi', 'radeon', 'r600', 'graw-xlib']))
opts.Add(ListVariable('targets', 'driver targets to build', default_targets,
['dri-i915',
'dri-i965',
'dri-nouveau',
'dri-radeong',
'dri-swrast',
'dri-vmwgfx',
'egl-i915',
'egl-i965',
'egl-nouveau',
'egl-radeon',
'egl-swrast',
'egl-vmwgfx',
'graw-xlib',
'graw-null',
'libgl-gdi',
'libgl-xlib',
'xorg-i915',
'xorg-i965',
'xorg-nouveau',
'xorg-radeon',
'xorg-vmwgfx']))
opts.Add(EnumVariable('MSVS_VERSION', 'MS Visual C++ version', None, allowed_values=('7.1', '8.0', '9.0')))
env = Environment(
@ -87,61 +41,26 @@ env = Environment(
ENV = os.environ,
)
if os.environ.has_key('CC'):
env['CC'] = os.environ['CC']
if os.environ.has_key('CFLAGS'):
env['CCFLAGS'] += SCons.Util.CLVar(os.environ['CFLAGS'])
if os.environ.has_key('CXX'):
env['CXX'] = os.environ['CXX']
if os.environ.has_key('CXXFLAGS'):
env['CXXFLAGS'] += SCons.Util.CLVar(os.environ['CXXFLAGS'])
if os.environ.has_key('LDFLAGS'):
env['LINKFLAGS'] += SCons.Util.CLVar(os.environ['LDFLAGS'])
# Backwards compatability with old target configuration variable
try:
targets = ARGUMENTS['targets']
except KeyError:
pass
else:
targets = targets.split(',')
print 'scons: warning: targets option is deprecated; pass the targets on their own such as'
print
print ' scons %s' % ' '.join(targets)
print
COMMAND_LINE_TARGETS.append(targets)
Help(opts.GenerateHelpText(env))
# replicate options values in local variables
debug = env['debug']
dri = env['dri']
machine = env['machine']
platform = env['platform']
# derived options
x86 = machine == 'x86'
ppc = machine == 'ppc'
gcc = platform in ('linux', 'freebsd', 'darwin', 'embedded')
msvc = platform in ('windows', 'winddk')
Export([
'debug',
'x86',
'ppc',
'dri',
'platform',
'gcc',
'msvc',
])
#######################################################################
# Environment setup
# Always build trace, rbug, identity, softpipe, and llvmpipe (where possible)
if 'trace' not in env['drivers']:
env['drivers'].append('trace')
if 'rbug' not in env['drivers']:
env['drivers'].append('rbug')
if 'galahad' not in env['drivers']:
env['drivers'].append('galahad')
if 'identity' not in env['drivers']:
env['drivers'].append('identity')
if 'softpipe' not in env['drivers']:
env['drivers'].append('softpipe')
if env['llvm'] and 'llvmpipe' not in env['drivers']:
env['drivers'].append('llvmpipe')
if 'sw' not in env['drivers']:
env['drivers'].append('sw')
# Includes
env.Prepend(CPPPATH = [
'#/include',
@ -157,7 +76,7 @@ if env['msvc']:
env.Append(CPPPATH = ['#include/c99'])
# Embedded
if platform == 'embedded':
if env['platform'] == 'embedded':
env.Append(CPPDEFINES = [
'_POSIX_SOURCE',
('_POSIX_C_SOURCE', '199309L'),
@ -174,7 +93,7 @@ if platform == 'embedded':
])
# Posix
if platform in ('posix', 'linux', 'freebsd', 'darwin'):
if env['platform'] in ('posix', 'linux', 'freebsd', 'darwin'):
env.Append(CPPDEFINES = [
'_POSIX_SOURCE',
('_POSIX_C_SOURCE', '199309L'),
@ -184,9 +103,9 @@ if platform in ('posix', 'linux', 'freebsd', 'darwin'):
'PTHREADS',
'HAVE_POSIX_MEMALIGN',
])
if gcc:
if env['gcc']:
env.Append(CFLAGS = ['-fvisibility=hidden'])
if platform == 'darwin':
if env['platform'] == 'darwin':
env.Append(CPPDEFINES = ['_DARWIN_C_SOURCE'])
env.Append(LIBS = [
'm',
@ -212,5 +131,3 @@ SConscript(
duplicate = 0 # http://www.scons.org/doc/0.97/HTML/scons-user/x2261.html
)
env.Default('src')

40
common.py
View file

@ -8,6 +8,8 @@ import subprocess
import sys
import platform as _platform
import SCons.Script.SConscript
#######################################################################
# Defaults
@ -20,6 +22,15 @@ _platform_map = {
default_platform = sys.platform
default_platform = _platform_map.get(default_platform, default_platform)
# Search sys.argv[] for a "platform=foo" argument since we don't have
# an 'env' variable at this point.
if 'platform' in SCons.Script.ARGUMENTS:
selected_platform = SCons.Script.ARGUMENTS['platform']
else:
selected_platform = default_platform
cross_compiling = selected_platform != default_platform
_machine_map = {
'x86': 'x86',
'i386': 'x86',
@ -37,38 +48,26 @@ if 'PROCESSOR_ARCHITECTURE' in os.environ:
else:
default_machine = _platform.machine()
default_machine = _machine_map.get(default_machine, 'generic')
default_toolchain = 'default'
if selected_platform == 'windows' and cross_compiling:
default_machine = 'x86'
default_toolchain = 'crossmingw'
# find default_llvm value
if 'LLVM' in os.environ:
default_llvm = 'yes'
else:
# Search sys.argv[] for a "platform=foo" argument since we don't have
# an 'env' variable at this point.
platform = default_platform
pattern = re.compile("(platform=)(.*)")
for arg in sys.argv:
m = pattern.match(arg)
if m:
platform = m.group(2)
default_llvm = 'no'
try:
if platform != 'windows' and subprocess.call(['llvm-config', '--version'], stdout=subprocess.PIPE) == 0:
if selected_platform != 'windows' and \
subprocess.call(['llvm-config', '--version'], stdout=subprocess.PIPE) == 0:
default_llvm = 'yes'
except:
pass
# find default_dri value
if default_platform in ('linux', 'freebsd'):
default_dri = 'yes'
elif default_platform in ('winddk', 'windows', 'wince', 'darwin'):
default_dri = 'no'
else:
default_dri = 'no'
#######################################################################
# Common options
@ -88,8 +87,7 @@ def AddOptions(opts):
allowed_values=('generic', 'ppc', 'x86', 'x86_64')))
opts.Add(EnumOption('platform', 'target platform', default_platform,
allowed_values=('linux', 'cell', 'windows', 'winddk', 'wince', 'darwin', 'embedded', 'cygwin', 'sunos5', 'freebsd8')))
opts.Add('toolchain', 'compiler toolchain', 'default')
opts.Add('toolchain', 'compiler toolchain', default_toolchain)
opts.Add(BoolOption('llvm', 'use LLVM', default_llvm))
opts.Add(BoolOption('dri', 'build DRI drivers', default_dri))
opts.Add(BoolOption('debug', 'DEPRECATED: debug build', 'yes'))
opts.Add(BoolOption('profile', 'DEPRECATED: profile build', 'no'))

375
configure.ac
View file

@ -465,6 +465,71 @@ if test "x$enable_selinux" = "xyes"; then
DEFINES="$DEFINES -DMESA_SELINUX"
fi
dnl Determine which APIs to support
AC_ARG_ENABLE([opengl],
[AS_HELP_STRING([--disable-opengl],
[disable support for standard OpenGL API @<:@default=no@:>@])],
[enable_opengl="$enableval"],
[enable_opengl=yes])
AC_ARG_ENABLE([gles1],
[AS_HELP_STRING([--enable-gles1],
[enable support for OpenGL ES 1.x API @<:@default=no@:>@])],
[enable_gles1="$enableval"],
[enable_gles1=no])
AC_ARG_ENABLE([gles2],
[AS_HELP_STRING([--enable-gles2],
[enable support for OpenGL ES 2.x API @<:@default=no@:>@])],
[enable_gles2="$enableval"],
[enable_gles2=no])
AC_ARG_ENABLE([gles-overlay],
[AS_HELP_STRING([--enable-gles-overlay],
[build separate OpenGL ES only libraries @<:@default=no@:>@])],
[enable_gles_overlay="$enableval"],
[enable_gles_overlay=no])
AC_ARG_ENABLE([openvg],
[AS_HELP_STRING([--enable-openvg],
[enable support for OpenVG API @<:@default=no@:>@])],
[enable_openvg="$enableval"],
[enable_openvg=no])
dnl smooth the transition; should be removed eventually
if test "x$enable_openvg" = xno; then
case "x$with_state_trackers" in
x*vega*)
AC_MSG_WARN([vega state tracker is enabled without --enable-openvg])
enable_openvg=yes
;;
esac
fi
if test "x$enable_opengl" = xno -a \
"x$enable_gles1" = xno -a \
"x$enable_gles2" = xno -a \
"x$enable_gles_overlay" = xno -a \
"x$enable_openvg" = xno; then
AC_MSG_ERROR([at least one API should be enabled])
fi
API_DEFINES=""
GLES_OVERLAY=0
if test "x$enable_opengl" = xno; then
API_DEFINES="$API_DEFINES -DFEATURE_GL=0"
else
API_DEFINES="$API_DEFINES -DFEATURE_GL=1"
fi
if test "x$enable_gles1" = xyes; then
API_DEFINES="$API_DEFINES -DFEATURE_ES1=1"
fi
if test "x$enable_gles2" = xyes; then
API_DEFINES="$API_DEFINES -DFEATURE_ES2=1"
fi
if test "x$enable_gles_overlay" = xyes; then
GLES_OVERLAY=1
fi
AC_SUBST([API_DEFINES])
AC_SUBST([GLES_OVERLAY])
dnl
dnl Driver configuration. Options are xlib, dri and osmesa right now.
dnl More later: fbdev, ...
@ -484,6 +549,10 @@ linux*)
;;
esac
if test "x$enable_opengl" = xno; then
default_driver="no"
fi
AC_ARG_WITH([driver],
[AS_HELP_STRING([--with-driver=DRIVER],
[driver for Mesa: xlib,dri,osmesa @<:@default=dri when available, or xlib@:>@])],
@ -492,6 +561,11 @@ AC_ARG_WITH([driver],
dnl Check for valid option
case "x$mesa_driver" in
xxlib|xdri|xosmesa)
if test "x$enable_opengl" = xno; then
AC_MSG_ERROR([Driver '$mesa_driver' requires OpenGL enabled])
fi
;;
xno)
;;
*)
AC_MSG_ERROR([Driver '$mesa_driver' is not a valid option])
@ -507,7 +581,7 @@ dnl Driver specific build directories
dnl
dnl this variable will be prepended to SRC_DIRS and is not exported
CORE_DIRS="mapi/glapi glsl mesa"
CORE_DIRS=""
SRC_DIRS=""
GLU_DIRS="sgi"
@ -517,6 +591,30 @@ GALLIUM_WINSYS_DIRS="sw"
GALLIUM_DRIVERS_DIRS="softpipe failover galahad trace rbug identity"
GALLIUM_STATE_TRACKERS_DIRS=""
# build glapi if OpenGL is enabled
if test "x$enable_opengl" = xyes; then
CORE_DIRS="$CORE_DIRS mapi/glapi"
fi
# build es1api and es2api if OpenGL ES is enabled
case "x$enable_gles1$enable_gles2$enable_gles_overlay" in
x*yes*)
CORE_DIRS="$CORE_DIRS mapi/es1api mapi/es2api"
;;
esac
# build vgapi if OpenVG is enabled
if test "x$enable_openvg" = xyes; then
CORE_DIRS="$CORE_DIRS mapi/vgapi"
fi
# build glsl and mesa if OpenGL or OpenGL ES is enabled
case "x$enable_opengl$enable_gles1$enable_gles2$enable_gles_overlay" in
x*yes*)
CORE_DIRS="$CORE_DIRS glsl mesa"
;;
esac
case "$mesa_driver" in
xlib)
DRIVER_DIRS="x11"
@ -531,6 +629,9 @@ dri)
osmesa)
DRIVER_DIRS="osmesa"
;;
no)
DRIVER_DRIS=""
;;
esac
AC_SUBST([SRC_DIRS])
AC_SUBST([GLU_DIRS])
@ -623,7 +724,7 @@ xlib)
GL_LIB_DEPS=""
fi
;;
dri)
dri|no) # these checks are still desired when there is no mesa_driver
# DRI must be shared, I think
if test "$enable_static" = yes; then
AC_MSG_ERROR([Can't use static libraries for DRI drivers])
@ -748,51 +849,6 @@ if test "x$with_dri_drivers" = x; then
with_dri_drivers=no
fi
dnl Determine which APIs to support
AC_ARG_ENABLE([opengl],
[AS_HELP_STRING([--disable-opengl],
[disable support for standard OpenGL API @<:@default=no@:>@])],
[enable_opengl="$enableval"],
[enable_opengl=yes])
AC_ARG_ENABLE([gles1],
[AS_HELP_STRING([--enable-gles1],
[enable support for OpenGL ES 1.x API @<:@default=no@:>@])],
[enable_gles1="$enableval"],
[enable_gles1=no])
AC_ARG_ENABLE([gles2],
[AS_HELP_STRING([--enable-gles2],
[enable support for OpenGL ES 2.x API @<:@default=no@:>@])],
[enable_gles2="$enableval"],
[enable_gles2=no])
AC_ARG_ENABLE([gles-overlay],
[AS_HELP_STRING([--enable-gles-overlay],
[build separate OpenGL ES only libraries @<:@default=no@:>@])],
[enable_gles_overlay="$enableval"],
[enable_gles_overlay=no])
API_DEFINES=""
GLES_OVERLAY=0
if test "x$enable_opengl" = xno; then
API_DEFINES="$API_DEFINES -DFEATURE_GL=0"
else
API_DEFINES="$API_DEFINES -DFEATURE_GL=1"
fi
if test "x$enable_gles1" = xyes; then
API_DEFINES="$API_DEFINES -DFEATURE_ES1=1"
fi
if test "x$enable_gles2" = xyes; then
API_DEFINES="$API_DEFINES -DFEATURE_ES2=1"
fi
if test "x$enable_gles_overlay" = xyes -o \
"x$enable_gles1" = xyes -o "x$enable_gles2" = xyes; then
CORE_DIRS="mapi/es1api mapi/es2api $CORE_DIRS"
if test "x$enable_gles_overlay" = xyes; then
GLES_OVERLAY=1
fi
fi
AC_SUBST([API_DEFINES])
AC_SUBST([GLES_OVERLAY])
dnl If $with_dri_drivers is yes, directories will be added through
dnl platform checks
DRI_DIRS=""
@ -813,7 +869,7 @@ yes)
esac
dnl Set DRI_DIRS, DEFINES and LIB_DEPS
if test "$mesa_driver" = dri; then
if test "$mesa_driver" = dri -o "$mesa_driver" = no; then
# Use TLS in GLX?
if test "x$GLX_USE_TLS" = xyes; then
DEFINES="$DEFINES -DGLX_USE_TLS -DPTHREADS"
@ -891,19 +947,21 @@ if test "$mesa_driver" = dri; then
DRI_DIRS=`echo "$DRI_DIRS" | $SED 's/ */ /g'`
# Check for expat
EXPAT_INCLUDES=""
EXPAT_LIB=-lexpat
AC_ARG_WITH([expat],
[AS_HELP_STRING([--with-expat=DIR],
[expat install directory])],[
EXPAT_INCLUDES="-I$withval/include"
CPPFLAGS="$CPPFLAGS $EXPAT_INCLUDES"
LDFLAGS="$LDFLAGS -L$withval/$LIB_DIR"
EXPAT_LIB="-L$withval/$LIB_DIR -lexpat"
])
AC_CHECK_HEADER([expat.h],[],[AC_MSG_ERROR([Expat required for DRI.])])
AC_CHECK_LIB([expat],[XML_ParserCreate],[],
[AC_MSG_ERROR([Expat required for DRI.])])
if test "$mesa_driver" = dri; then
EXPAT_INCLUDES=""
EXPAT_LIB=-lexpat
AC_ARG_WITH([expat],
[AS_HELP_STRING([--with-expat=DIR],
[expat install directory])],[
EXPAT_INCLUDES="-I$withval/include"
CPPFLAGS="$CPPFLAGS $EXPAT_INCLUDES"
LDFLAGS="$LDFLAGS -L$withval/$LIB_DIR"
EXPAT_LIB="-L$withval/$LIB_DIR -lexpat"
])
AC_CHECK_HEADER([expat.h],[],[AC_MSG_ERROR([Expat required for DRI.])])
AC_CHECK_LIB([expat],[XML_ParserCreate],[],
[AC_MSG_ERROR([Expat required for DRI.])])
fi
# put all the necessary libs together
DRI_LIB_DEPS="$SELINUX_LIBS $LIBDRM_LIBS $EXPAT_LIB -lm -lpthread $DLOPEN_LIBS $TALLOC_LIBS"
@ -944,6 +1002,9 @@ AC_ARG_ENABLE([gl-osmesa],
[gl_osmesa="$enableval"],
[gl_osmesa="$default_gl_osmesa"])
if test "x$gl_osmesa" = xyes; then
if test "x$enable_opengl" = xno; then
AC_MSG_ERROR([OpenGL is not available for OSMesa driver])
fi
if test "$mesa_driver" = osmesa; then
AC_MSG_ERROR([libGL is not available for OSMesa driver])
else
@ -1000,13 +1061,21 @@ AC_ARG_ENABLE([egl],
[disable EGL library @<:@default=enabled@:>@])],
[enable_egl="$enableval"],
[enable_egl=yes])
if test "x$enable_egl" = xno; then
if test "x$mesa_driver" = xno; then
AC_MSG_ERROR([cannot disable EGL when there is no mesa driver])
fi
if test "x$enable_openvg" = xyes; then
AC_MSG_ERROR([cannot enable OpenVG without EGL])
fi
fi
if test "x$enable_egl" = xyes; then
SRC_DIRS="$SRC_DIRS egl"
EGL_LIB_DEPS="$DLOPEN_LIBS -lpthread"
EGL_DRIVERS_DIRS=""
if test "$enable_static" != yes; then
# build egl_glx when libGL is built
if test "$mesa_driver" != osmesa; then
if test "$mesa_driver" = xlib -o "$mesa_driver" = dri; then
EGL_DRIVERS_DIRS="glx"
fi
@ -1040,6 +1109,12 @@ AC_ARG_ENABLE([glu],
[enable OpenGL Utility library @<:@default=enabled@:>@])],
[enable_glu="$enableval"],
[enable_glu=yes])
if test "x$enable_glu" = xyes -a "x$mesa_driver" = xno; then
AC_MSG_NOTICE([Disabling GLU since there is no OpenGL driver])
enable_glu=no
fi
if test "x$enable_glu" = xyes; then
SRC_DIRS="$SRC_DIRS glu"
@ -1089,9 +1164,13 @@ AC_ARG_ENABLE([glw],
[enable_glw="$enableval"],
[enable_glw=yes])
dnl Don't build GLw on osmesa
if test "x$enable_glw" = xyes && test "$mesa_driver" = osmesa; then
AC_MSG_WARN([Disabling GLw since the driver is OSMesa])
enable_glw=no
if test "x$enable_glw" = xyes; then
case "$mesa_driver" in
osmesa|no)
AC_MSG_NOTICE([Disabling GLw since there is no OpenGL driver])
enable_glw=no
;;
esac
fi
AC_ARG_ENABLE([motif],
[AS_HELP_STRING([--enable-motif],
@ -1165,16 +1244,20 @@ AC_ARG_ENABLE([glut],
[enable_glut="$enableval"],
[enable_glut="$default_glut"])
dnl Don't build glut on osmesa
if test "x$enable_glut" = xyes; then
case "$mesa_driver" in
osmesa|no)
AC_MSG_NOTICE([Disabling glut since there is no OpenGL driver])
enable_glut=no
;;
esac
fi
dnl Can't build glut if GLU not available
if test "x$enable_glu$enable_glut" = xnoyes; then
AC_MSG_WARN([Disabling glut since GLU is disabled])
enable_glut=no
fi
dnl Don't build glut on osmesa
if test "x$enable_glut" = xyes && test "$mesa_driver" = osmesa; then
AC_MSG_WARN([Disabling glut since the driver is OSMesa])
enable_glut=no
fi
if test "x$enable_glut" = xyes; then
SRC_DIRS="$SRC_DIRS glut/glx"
@ -1239,6 +1322,9 @@ AC_ARG_ENABLE([gallium],
[build gallium @<:@default=enabled@:>@])],
[enable_gallium="$enableval"],
[enable_gallium=yes])
if test "x$enable_gallium" = xno -a "x$enable_openvg" = xyes; then
AC_MSG_ERROR([cannot enable OpenVG without Gallium])
fi
if test "x$enable_gallium" = xyes; then
SRC_DIRS="$SRC_DIRS gallium gallium/winsys gallium/targets"
AC_CHECK_HEADER([udis86.h], [HAS_UDIS86="yes"],
@ -1251,15 +1337,30 @@ AC_SUBST([LLVM_LIBS])
AC_SUBST([LLVM_LDFLAGS])
AC_SUBST([LLVM_VERSION])
VG_LIB_DEPS=""
EGL_CLIENT_APIS='$(GL_LIB)'
if test "x$enable_gles_overlay" = xyes; then
EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(GLESv1_CM_LIB) $(GLESv2_LIB)'
fi
dnl
dnl Gallium state trackers configuration
dnl
AC_ARG_ENABLE([gallium-egl],
[AS_HELP_STRING([--enable-gallium-egl],
[enable gallium EGL state tracker @<:@default=auto@:>@])],
[enable_gallium_egl="$enableval"],
[enable_gallium_egl=auto])
if test "x$enable_gallium_egl" = xauto; then
case "$mesa_driver" in
dri|no)
enable_gallium_egl=$enable_egl
;;
*)
enable_gallium_egl=no
;;
esac
fi
case "x$enable_egl$enable_gallium_egl" in
xnoyes)
AC_MSG_ERROR([cannot build Gallium EGL state tracker without EGL])
esac
AC_ARG_WITH([state-trackers],
[AS_HELP_STRING([--with-state-trackers@<:@=DIRS...@:>@],
[comma delimited state_trackers list, e.g.
@ -1280,16 +1381,24 @@ yes)
dri)
GALLIUM_STATE_TRACKERS_DIRS="dri"
HAVE_ST_DRI="yes"
if test "x$enable_egl" = xyes; then
GALLIUM_STATE_TRACKERS_DIRS="$GALLIUM_STATE_TRACKERS_DIRS egl"
HAVE_ST_EGL="yes"
fi
# Have only tested st/xorg on 1.6.0 servers
PKG_CHECK_MODULES(XORG, [xorg-server >= 1.6.0 libdrm >= $LIBDRM_XORG_REQUIRED libkms >= $LIBKMS_XORG_REQUIRED],
HAVE_ST_XORG="yes"; GALLIUM_STATE_TRACKERS_DIRS="$GALLIUM_STATE_TRACKERS_DIRS xorg",
HAVE_ST_XORG="no")
;;
esac
if test "x$enable_egl" = xyes; then
if test "$enable_openvg" = yes; then
GALLIUM_STATE_TRACKERS_DIRS="$GALLIUM_STATE_TRACKERS_DIRS vega"
st_egl="yes"
fi
if test "$enable_gallium_egl" = yes; then
GALLIUM_STATE_TRACKERS_DIRS="$GALLIUM_STATE_TRACKERS_DIRS egl"
HAVE_ST_EGL="yes"
fi
fi
;;
*)
# verify the requested state tracker exist
@ -1315,22 +1424,10 @@ yes)
PKG_CHECK_MODULES([LIBKMS_XORG], [libkms >= $LIBKMS_XORG_REQUIRED])
HAVE_ST_XORG="yes"
;;
es)
AC_MSG_WARN([state tracker 'es' has been replaced by --enable-gles-overlay])
if test "x$enable_gles_overlay" != xyes; then
if test "x$enable_gles1" != xyes -a "x$enable_gles2" != xyes; then
CORE_DIRS="mapi/es1api mapi/es2api $CORE_DIRS"
fi
GLES_OVERLAY=1
EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(GLESv1_CM_LIB) $(GLESv2_LIB)'
fi
tracker=""
;;
vega)
CORE_DIRS="$CORE_DIRS mapi/vgapi"
VG_LIB_DEPS="$VG_LIB_DEPS -lpthread"
EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(VG_LIB)'
if test "x$enable_openvg" != xyes; then
AC_MSG_ERROR([cannot build vega state tracker without --enable-openvg])
fi
;;
xorg/xvmc)
# Check for libXvMC?
@ -1355,6 +1452,23 @@ yes)
;;
esac
EGL_CLIENT_APIS=""
VG_LIB_DEPS=""
case "x$enable_opengl$enable_gles1$enable_gles2" in
x*yes*)
EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(GL_LIB)'
;;
esac
if test "x$enable_gles_overlay" = xyes; then
EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(GLESv1_CM_LIB) $(GLESv2_LIB)'
fi
if test "x$enable_openvg" = xyes; then
EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(VG_LIB)'
VG_LIB_DEPS="$VG_LIB_DEPS -lpthread"
fi
AC_SUBST([VG_LIB_DEPS])
AC_SUBST([EGL_CLIENT_APIS])
@ -1652,25 +1766,56 @@ echo " exec_prefix: $exec_prefix"
echo " libdir: $libdir"
echo " includedir: $includedir"
dnl API info
echo ""
echo " OpenGL: $enable_opengl (ES1: $enable_gles1 ES2: $enable_gles2)"
echo " GLES overlay: $enable_gles_overlay"
echo " OpenVG: $enable_openvg"
dnl Driver info
echo ""
echo " Driver: $mesa_driver"
if echo "$DRIVER_DIRS" | grep 'osmesa' >/dev/null 2>&1; then
echo " OSMesa: lib$OSMESA_LIB"
else
echo " OSMesa: no"
if test "$mesa_driver" != no; then
if echo "$DRIVER_DIRS" | grep 'osmesa' >/dev/null 2>&1; then
echo " OSMesa: lib$OSMESA_LIB"
else
echo " OSMesa: no"
fi
if test "$mesa_driver" = dri; then
# cleanup the drivers var
dri_dirs=`echo $DRI_DIRS | $SED 's/^ *//;s/ */ /;s/ *$//'`
if test "x$DRI_DIRS" = x; then
echo " DRI drivers: no"
else
echo " DRI drivers: $dri_dirs"
fi
echo " DRI driver dir: $DRI_DRIVER_INSTALL_DIR"
echo " Use XCB: $enable_xcb"
fi
fi
if test "$mesa_driver" = dri; then
# cleanup the drivers var
dri_dirs=`echo $DRI_DIRS | $SED 's/^ *//;s/ */ /;s/ *$//'`
if test "x$DRI_DIRS" = x; then
echo " DRI drivers: no"
else
echo " DRI drivers: $dri_dirs"
echo ""
echo " GLU: $enable_glu"
echo " GLw: $enable_glw (Motif: $enable_motif)"
echo " glut: $enable_glut"
dnl EGL
echo ""
echo " EGL: $enable_egl"
if test "$enable_egl" = yes; then
echo " EGL platforms: $EGL_PLATFORMS"
egl_drivers=""
for d in $EGL_DRIVERS_DIRS; do
egl_drivers="$egl_drivers egl_$d"
done
if test "$enable_gallium" = yes -a "$HAVE_ST_EGL" = yes; then
echo " EGL drivers: ${egl_drivers} egl_gallium"
echo " EGL Gallium STs:$EGL_CLIENT_APIS"
else
echo " EGL drivers: $egl_drivers"
fi
fi
echo " DRI driver dir: $DRI_DRIVER_INSTALL_DIR"
fi
echo " Use XCB: $enable_xcb"
echo ""
if test "x$MESA_LLVM" = x1; then
@ -1689,9 +1834,6 @@ if echo "$SRC_DIRS" | grep 'gallium' >/dev/null 2>&1; then
echo " Winsys dirs: $GALLIUM_WINSYS_DIRS"
echo " Driver dirs: $GALLIUM_DRIVERS_DIRS"
echo " Trackers dirs: $GALLIUM_STATE_TRACKERS_DIRS"
if test "x$HAVE_ST_EGL" = xyes; then
echo " EGL client APIs: $EGL_CLIENT_APIS"
fi
else
echo " Gallium: no"
fi
@ -1700,15 +1842,6 @@ dnl Libraries
echo ""
echo " Shared libs: $enable_shared"
echo " Static libs: $enable_static"
if test "$enable_egl" = yes; then
echo " EGL: $EGL_DRIVERS_DIRS"
echo " EGL platforms: $EGL_PLATFORMS"
else
echo " EGL: no"
fi
echo " GLU: $enable_glu"
echo " GLw: $enable_glw (Motif: $enable_motif)"
echo " glut: $enable_glut"
dnl Compiler options
# cleanup the CFLAGS/CXXFLAGS/DEFINES vars

96
docs/egl.html
View file

@ -28,18 +28,17 @@ cards.</p>
<ol>
<li>
<p>Run <code>configure</code> with the desired state trackers and enable
the Gallium driver for your hardware. For example</p>
<p>Run <code>configure</code> with the desired client APIs and enable
the driver for your hardware. For example</p>
<pre>
$ ./configure --enable-gles-overlay --with-state-trackers=egl,vega --enable-gallium-intel
$ ./configure --enable-gles2 --enable-openvg --enable-gallium-nouveau
</pre>
<p>The main library and OpenGL is enabled by default. The first option enables
<a href="opengles.html">OpenGL ES 1.x and 2.x</a>. The <code>egl</code> state
tracker is needed by a number of EGL drivers. EGL drivers will be covered
later. The <a href="openvg.html">vega state tracker</a> provides OpenVG
1.x.</p>
<p>The main library and OpenGL is enabled by default. The first option above
enables <a href="opengles.html">OpenGL ES 2.x</a>. The second option enables
<a href="openvg.html">OpenVG</a>.</p>
</li>
<li>Build and install Mesa as usual.</li>
@ -80,34 +79,38 @@ types such as <code>EGLNativeDisplayType</code> or
<p>The available platforms are <code>x11</code>, <code>drm</code>,
<code>fbdev</code>, and <code>gdi</code>. The <code>gdi</code> platform can
only be built with SCons.</p>
</li>
<li><code>--with-state-trackers</code>
<p>The argument is a comma separated string. It is usually used to specify the
rendering APIs, such as OpenVG, to build. But it is also used to specify
<code>egl</code> state tracker that <code>egl_gallium</code> depends on.</p>
</li>
<li><code>--enable-gles-overlay</code>
<p>OpenGL and OpenGL ES are not controlled by
<code>--with-state-trackers</code>. OpenGL is always built. To build OpenGL
ES, this option must be explicitly given.</p>
only be built with SCons. Unless for special needs, the build system should
select the right platforms automatically.</p>
</li>
<li><code>--enable-gles1</code> and <code>--enable-gles2</code>
<p>Unlike <code>--enable-gles-overlay</code>, which builds one library for each
rendering API, these options enable OpenGL ES support in OpenGL. The result is
<p>These options enable OpenGL ES support in OpenGL. The result is
one big library that supports multiple APIs.</p>
</li>
<li><code>--enable-gles-overlay</code>
<p>This option enables OpenGL ES as separate libraries. This is an alternative
approach to enable OpenGL ES. It is only supported by
<code>egl_gallium</code>.</p>
</li>
<li><code>--enable-openvg</code>
<p>OpenVG must be explicitly enabled by this option.</p>
</li>
<li><code>--enable-gallium-egl</code>
<p>Explicitly enable or disable <code>egl_gallium</code>.</p>
</li>
</ul>
<h2>Use EGL</h2>
@ -139,10 +142,6 @@ binaries.</p>
specified EGL driver to be loaded. It comes in handy when one wants to test a
specific driver. This variable is ignored for setuid/setgid binaries.</p>
<p><code>egl_gallium</code> dynamically loads hardware drivers and client API
modules found in <code>EGL_DRIVERS_PATH</code>. Thus, specifying this variable
alone is not sufficient for <code>egl_gallium</code> for uninstalled build.</p>
</li>
<li><code>EGL_PLATFORM</code>
@ -150,7 +149,12 @@ alone is not sufficient for <code>egl_gallium</code> for uninstalled build.</p>
<p>This variable specifies the native platform. The valid values are the same
as those for <code>--with-egl-platforms</code>. When the variable is not set,
the main library uses the first platform listed in
<code>--with-egl-platforms</code> as the native platform</p>
<code>--with-egl-platforms</code> as the native platform.</p>
<p>Extensions like <code>EGL_MESA_drm_display</code> define new functions to
create displays for non-native platforms. These extensions are usually used by
applications that support non-native platforms. Setting this variable is
probably required only for some of the demos found in mesa/demo repository.</p>
</li>
@ -173,11 +177,19 @@ variable to true forces the use of software rendering.</p>
<h2>EGL Drivers</h2>
<ul>
<li><code>egl_dri2</code>
<p>This driver supports both <code>x11</code> and <code>drm</code> platforms.
It functions as a DRI2 driver loader. For <code>x11</code> support, it talks
to the X server directly using (XCB-)DRI2 protocol.</p>
</li>
<li><code>egl_gallium</code>
<p>This driver is based on Gallium3D. It supports all rendering APIs and
hardwares supported by Gallium3D. It is the only driver that supports OpenVG.
The supported platforms are X11, KMS, FBDEV, and GDI.</p>
The supported platforms are X11, DRM, FBDEV, and GDI.</p>
</li>
@ -187,23 +199,6 @@ The supported platforms are X11, KMS, FBDEV, and GDI.</p>
the EGL API. It supports both direct and indirect rendering when the GLX does.
It is accelerated when the GLX is. As such, it cannot provide functions that
is not available in GLX or GLX extensions.</p>
</li>
<li><code>egl_dri2</code>
<p>This driver supports the X Window System as its window system. It functions
as a DRI2 driver loader. Unlike <code>egl_glx</code>, it has no dependency on
<code>libGL</code>. It talks to the X server directly using DRI2 protocol.</p>
</li>
<li><code>egl_dri</code>
<p>This driver lacks maintenance and does <em>not</em> build. It is similiar
to <code>egl_dri2</code> in that it functions as a DRI(1) driver loader. But
unlike <code>egl_dri2</code>, it supports Linux framebuffer devices as its
window system and supports EGL_MESA_screen_surface extension. As DRI1 drivers
are phasing out, it might eventually be replaced by <code>egl_dri2</code>.</p>
</li>
</ul>
@ -295,7 +290,6 @@ should as well lock the display before using it.
<ul>
<li>Pass the conformance tests</li>
<li>Reference counting in main library?</li>
<li>Mixed use of OpenGL, OpenGL ES 1.1, and OpenGL ES 2.0 is supported. But
which one of <code>libGL.so</code>, <code>libGLESv1_CM.so</code>, and
<code>libGLESv2.so</code> should an application link to? Bad things may happen

29
docs/openvg.html
View file

@ -26,36 +26,27 @@ Please refer to <a href="egl.html">Mesa EGL</a> for more information about EGL.
<h2>Building the library</h2>
<ol>
<li>Build Mesa3D with Gallium3D. Any build that builds Gallium3D libraries, EGL, and Gallium EGL drivers will suffice</li>
<li>cd src/gallium/state_trackers/vega; make</li>
<li>The last step will build libOpenVG library. You can add the libdir to LD_LIBRARY_PATH or install libOpenVG</li>
<li>Run <code>configure</code> with <code>--enable-openvg</code>. If you do
not need OpenGL, you can add <code>--disable-opengl</code> to save the
compilation time.</li>
<li>Build and install Mesa as usual.</li>
</ol>
<h3>Sample build</h3>
A sample build looks as follows:
<pre>
$ ./configure --with-state-trackers=egl,vega --enable-gallium-intel
$ ./configure --disable-opengl --enable-openvg
$ make
$ make install
</pre>
<p>It will install <code>libOpenVG.so</code>, <code>libEGL.so</code>, and one
or more EGL drivers.</p>
<h2>OpenVG Demos</h2>
<p>
To build the OpenVG demos:
</p>
<pre>
cd progs/openvg
make
</pre>
<p>
To run a demo:
</p>
<pre>
cd openvg/demos
./lion
</pre>
<p>OpenVG demos can be found in mesa/demos repository.</p>
</body>
</html>

109
scons/gallium.py
View file

@ -50,29 +50,34 @@ def symlink(target, source, env):
def install(env, source, subdir):
target_dir = os.path.join(env.Dir('#.').srcnode().abspath, env['build_dir'], subdir)
env.Install(target_dir, source)
return env.Install(target_dir, source)
def install_program(env, source):
install(env, source, 'bin')
return install(env, source, 'bin')
def install_shared_library(env, sources, version = ()):
targets = []
install_dir = os.path.join(env.Dir('#.').srcnode().abspath, env['build_dir'])
version = tuple(map(str, version))
if env['SHLIBSUFFIX'] == '.dll':
dlls = env.FindIxes(sources, 'SHLIBPREFIX', 'SHLIBSUFFIX')
install(env, dlls, 'bin')
targets += install(env, dlls, 'bin')
libs = env.FindIxes(sources, 'LIBPREFIX', 'LIBSUFFIX')
install(env, libs, 'lib')
targets += install(env, libs, 'lib')
else:
for source in sources:
target_dir = os.path.join(install_dir, 'lib')
target_name = '.'.join((str(source),) + version)
last = env.InstallAs(os.path.join(target_dir, target_name), source)
targets += last
while len(version):
version = version[:-1]
target_name = '.'.join((str(source),) + version)
action = SCons.Action.Action(symlink, "$TARGET -> $SOURCE")
last = env.Command(os.path.join(target_dir, target_name), last, action)
targets += last
return targets
def createInstallMethods(env):
env.AddMethod(install_program, 'InstallProgram')
@ -98,6 +103,41 @@ def num_jobs():
return 1
def pkg_config_modules(env, name, modules):
'''Simple wrapper for pkg-config.'''
env[name] = False
if env['platform'] == 'windows':
return
if not env.Detect('pkg-config'):
return
if subprocess.call(["pkg-config", "--exists", ' '.join(modules)]) != 0:
return
# Put -I and -L flags directly into the environment, as these don't affect
# the compilation of targets that do not use them
try:
env.ParseConfig('pkg-config --cflags-only-I --libs-only-L ' + ' '.join(modules))
except OSError:
return
# Other flags may affect the compilation of unrelated targets, so store
# them with a prefix, (e.g., XXX_CFLAGS, XXX_LIBS, etc)
try:
flags = env.ParseFlags('!pkg-config --cflags-only-other --libs-only-l --libs-only-other ' + ' '.join(modules))
except OSError:
return
prefix = name.upper() + '_'
for flag_name, flag_value in flags.iteritems():
env[prefix + flag_name] = flag_value
env[name] = True
def generate(env):
"""Common environment generation code"""
@ -110,21 +150,27 @@ def generate(env):
env['toolchain'] = 'wcesdk'
env.Tool(env['toolchain'])
if env['platform'] == 'embedded':
# Allow overriding compiler from environment
if os.environ.has_key('CC'):
env['CC'] = os.environ['CC']
# Update CCVERSION to match
pipe = SCons.Action._subproc(env, [env['CC'], '--version'],
stdin = 'devnull',
stderr = 'devnull',
stdout = subprocess.PIPE)
if pipe.wait() == 0:
line = pipe.stdout.readline()
match = re.search(r'[0-9]+(\.[0-9]+)+', line)
if match:
env['CCVERSION'] = match.group(0)
# Allow override compiler and specify additional flags from environment
if os.environ.has_key('CC'):
env['CC'] = os.environ['CC']
# Update CCVERSION to match
pipe = SCons.Action._subproc(env, [env['CC'], '--version'],
stdin = 'devnull',
stderr = 'devnull',
stdout = subprocess.PIPE)
if pipe.wait() == 0:
line = pipe.stdout.readline()
match = re.search(r'[0-9]+(\.[0-9]+)+', line)
if match:
env['CCVERSION'] = match.group(0)
if os.environ.has_key('CFLAGS'):
env['CCFLAGS'] += SCons.Util.CLVar(os.environ['CFLAGS'])
if os.environ.has_key('CXX'):
env['CXX'] = os.environ['CXX']
if os.environ.has_key('CXXFLAGS'):
env['CXXFLAGS'] += SCons.Util.CLVar(os.environ['CXXFLAGS'])
if os.environ.has_key('LDFLAGS'):
env['LINKFLAGS'] += SCons.Util.CLVar(os.environ['LDFLAGS'])
env['gcc'] = 'gcc' in os.path.basename(env['CC']).split('-')
env['msvc'] = env['CC'] == 'cl'
@ -140,10 +186,16 @@ def generate(env):
# Backwards compatability with the debug= profile= options
if env['build'] == 'debug':
if not env['debug']:
print 'scons: debug option is deprecated: use instead build=release'
print 'scons: warning: debug option is deprecated and will be removed eventually; use instead'
print
print ' scons build=release'
print
env['build'] = 'release'
if env['profile']:
print 'scons: profile option is deprecated: use instead build=profile'
print 'scons: warning: profile option is deprecated and will be removed eventually; use instead'
print
print ' scons build=profile'
print
env['build'] = 'profile'
if False:
# Enforce SConscripts to use the new build variable
@ -184,6 +236,9 @@ def generate(env):
if env.GetOption('num_jobs') <= 1:
env.SetOption('num_jobs', num_jobs())
env.Decider('MD5-timestamp')
env.SetOption('max_drift', 60)
# C preprocessor options
cppdefines = []
if env['build'] in ('debug', 'checked'):
@ -499,9 +554,19 @@ def generate(env):
# Default libs
env.Append(LIBS = [])
# Load LLVM
# Load tools
if env['llvm']:
env.Tool('llvm')
env.Tool('udis86')
pkg_config_modules(env, 'x11', ['x11', 'xext'])
pkg_config_modules(env, 'drm', ['libdrm'])
pkg_config_modules(env, 'drm_intel', ['libdrm_intel'])
pkg_config_modules(env, 'drm_radeon', ['libdrm_radeon'])
pkg_config_modules(env, 'xorg', ['xorg-server'])
pkg_config_modules(env, 'kms', ['libkms'])
env['dri'] = env['x11'] and env['drm']
# Custom builders and methods
env.Tool('custom')

13
scons/llvm.py
View file

@ -38,6 +38,8 @@ import SCons.Util
def generate(env):
env['llvm'] = False
try:
llvm_dir = os.environ['LLVM']
except KeyError:
@ -64,13 +66,13 @@ def generate(env):
# XXX: There is no llvm-config on Windows, so assume a standard layout
if llvm_dir is None:
print 'scons: LLVM environment variable must be specified when building for windows'
env.Exit(1)
return
# Try to determine the LLVM version from llvm/Config/config.h
llvm_config = os.path.join(llvm_dir, 'include/llvm/Config/config.h')
if not os.path.exists(llvm_config):
print 'scons: could not find %s' % llvm_config
env.Exit(1)
return
llvm_version_re = re.compile(r'^#define PACKAGE_VERSION "([^"]*)"')
llvm_version = None
for line in open(llvm_config, 'rt'):
@ -81,7 +83,7 @@ def generate(env):
break
if llvm_version is None:
print 'scons: could not determine the LLVM version from %s' % llvm_config
env.Exit(1)
return
env.Prepend(CPPPATH = [os.path.join(llvm_dir, 'include')])
env.AppendUnique(CPPDEFINES = [
@ -133,7 +135,7 @@ def generate(env):
else:
if not env.Detect('llvm-config'):
print 'scons: llvm-config script not found' % llvm_version
env.Exit(1)
return
llvm_version = env.backtick('llvm-config --version').rstrip()
llvm_version = distutils.version.LooseVersion(llvm_version)
@ -144,11 +146,12 @@ def generate(env):
env.ParseConfig('llvm-config --ldflags')
except OSError:
print 'scons: llvm-config version %s failed' % llvm_version
env.Exit(1)
return
else:
env['LINK'] = env['CXX']
assert llvm_version is not None
env['llvm'] = True
print 'scons: Found LLVM version %s' % llvm_version
env['LLVM_VERSION'] = llvm_version

4
scons/udis86.py
View file

@ -31,8 +31,10 @@ def generate(env):
conf = env.Configure()
if conf.CheckHeader('udis86.h'): # and conf.CheckLib('udis86'):
env.Append(CPPDEFINES = [('HAVE_UDIS86', '1')])
env['UDIS86'] = True
env.Prepend(LIBS = ['udis86'])
else:
env['UDIS86'] = False
conf.Finish()

20
src/SConscript
View file

@ -1,19 +1,17 @@
Import('*')
if 'egl' in env['statetrackers']:
SConscript('mapi/vgapi/SConscript')
SConscript('mapi/vgapi/SConscript')
if env['platform'] == 'windows':
SConscript('egl/main/SConscript')
SConscript('talloc/SConscript')
if 'mesa' in env['statetrackers']:
if platform == 'windows':
SConscript('talloc/SConscript')
SConscript('glsl/SConscript')
SConscript('mapi/glapi/SConscript')
SConscript('mesa/SConscript')
SConscript('glsl/SConscript')
SConscript('mapi/glapi/SConscript')
SConscript('mesa/SConscript')
if platform != 'embedded':
SConscript('glut/glx/SConscript')
if env['platform'] != 'embedded':
SConscript('glut/glx/SConscript')
SConscript('gallium/SConscript')

429
src/egl/drivers/dri2/egl_dri2.c
View file

@ -750,7 +750,7 @@ dri2_create_screen(_EGLDisplay *disp)
if (dri2_dpy->dri2->base.version >= 2)
api_mask = dri2_dpy->dri2->getAPIMask(dri2_dpy->dri_screen);
else
api_mask = __DRI_API_OPENGL;
api_mask = 1 << __DRI_API_OPENGL;
disp->ClientAPIsMask = 0;
if (api_mask & (1 <<__DRI_API_OPENGL))
@ -916,9 +916,436 @@ const int i965_chip_ids[] = {
0x2e32, /* PCI_CHIP_G41_G */
};
const int r100_chip_ids[] = {
0x4C57, /* PCI_CHIP_RADEON_LW */
0x4C58, /* PCI_CHIP_RADEON_LX */
0x4C59, /* PCI_CHIP_RADEON_LY */
0x4C5A, /* PCI_CHIP_RADEON_LZ */
0x5144, /* PCI_CHIP_RADEON_QD */
0x5145, /* PCI_CHIP_RADEON_QE */
0x5146, /* PCI_CHIP_RADEON_QF */
0x5147, /* PCI_CHIP_RADEON_QG */
0x5159, /* PCI_CHIP_RADEON_QY */
0x515A, /* PCI_CHIP_RADEON_QZ */
0x5157, /* PCI_CHIP_RV200_QW */
0x5158, /* PCI_CHIP_RV200_QX */
0x515E, /* PCI_CHIP_RN50_515E */
0x5969, /* PCI_CHIP_RN50_5969 */
0x4136, /* PCI_CHIP_RS100_4136 */
0x4336, /* PCI_CHIP_RS100_4336 */
0x4137, /* PCI_CHIP_RS200_4137 */
0x4337, /* PCI_CHIP_RS200_4337 */
0x4237, /* PCI_CHIP_RS250_4237 */
0x4437, /* PCI_CHIP_RS250_4437 */
};
const int r200_chip_ids[] = {
0x5148, /* PCI_CHIP_R200_QH */
0x514C, /* PCI_CHIP_R200_QL */
0x514D, /* PCI_CHIP_R200_QM */
0x4242, /* PCI_CHIP_R200_BB */
0x4243, /* PCI_CHIP_R200_BC */
0x4966, /* PCI_CHIP_RV250_If */
0x4967, /* PCI_CHIP_RV250_Ig */
0x4C64, /* PCI_CHIP_RV250_Ld */
0x4C66, /* PCI_CHIP_RV250_Lf */
0x4C67, /* PCI_CHIP_RV250_Lg */
0x5960, /* PCI_CHIP_RV280_5960 */
0x5961, /* PCI_CHIP_RV280_5961 */
0x5962, /* PCI_CHIP_RV280_5962 */
0x5964, /* PCI_CHIP_RV280_5964 */
0x5965, /* PCI_CHIP_RV280_5965 */
0x5C61, /* PCI_CHIP_RV280_5C61 */
0x5C63, /* PCI_CHIP_RV280_5C63 */
0x5834, /* PCI_CHIP_RS300_5834 */
0x5835, /* PCI_CHIP_RS300_5835 */
0x7834, /* PCI_CHIP_RS350_7834 */
0x7835, /* PCI_CHIP_RS350_7835 */
};
const int r300_chip_ids[] = {
0x4144, /* PCI_CHIP_R300_AD */
0x4145, /* PCI_CHIP_R300_AE */
0x4146, /* PCI_CHIP_R300_AF */
0x4147, /* PCI_CHIP_R300_AG */
0x4E44, /* PCI_CHIP_R300_ND */
0x4E45, /* PCI_CHIP_R300_NE */
0x4E46, /* PCI_CHIP_R300_NF */
0x4E47, /* PCI_CHIP_R300_NG */
0x4E48, /* PCI_CHIP_R350_NH */
0x4E49, /* PCI_CHIP_R350_NI */
0x4E4B, /* PCI_CHIP_R350_NK */
0x4148, /* PCI_CHIP_R350_AH */
0x4149, /* PCI_CHIP_R350_AI */
0x414A, /* PCI_CHIP_R350_AJ */
0x414B, /* PCI_CHIP_R350_AK */
0x4E4A, /* PCI_CHIP_R360_NJ */
0x4150, /* PCI_CHIP_RV350_AP */
0x4151, /* PCI_CHIP_RV350_AQ */
0x4152, /* PCI_CHIP_RV350_AR */
0x4153, /* PCI_CHIP_RV350_AS */
0x4154, /* PCI_CHIP_RV350_AT */
0x4155, /* PCI_CHIP_RV350_AU */
0x4156, /* PCI_CHIP_RV350_AV */
0x4E50, /* PCI_CHIP_RV350_NP */
0x4E51, /* PCI_CHIP_RV350_NQ */
0x4E52, /* PCI_CHIP_RV350_NR */
0x4E53, /* PCI_CHIP_RV350_NS */
0x4E54, /* PCI_CHIP_RV350_NT */
0x4E56, /* PCI_CHIP_RV350_NV */
0x5460, /* PCI_CHIP_RV370_5460 */
0x5462, /* PCI_CHIP_RV370_5462 */
0x5464, /* PCI_CHIP_RV370_5464 */
0x5B60, /* PCI_CHIP_RV370_5B60 */
0x5B62, /* PCI_CHIP_RV370_5B62 */
0x5B63, /* PCI_CHIP_RV370_5B63 */
0x5B64, /* PCI_CHIP_RV370_5B64 */
0x5B65, /* PCI_CHIP_RV370_5B65 */
0x3150, /* PCI_CHIP_RV380_3150 */
0x3152, /* PCI_CHIP_RV380_3152 */
0x3154, /* PCI_CHIP_RV380_3154 */
0x3155, /* PCI_CHIP_RV380_3155 */
0x3E50, /* PCI_CHIP_RV380_3E50 */
0x3E54, /* PCI_CHIP_RV380_3E54 */
0x4A48, /* PCI_CHIP_R420_JH */
0x4A49, /* PCI_CHIP_R420_JI */
0x4A4A, /* PCI_CHIP_R420_JJ */
0x4A4B, /* PCI_CHIP_R420_JK */
0x4A4C, /* PCI_CHIP_R420_JL */
0x4A4D, /* PCI_CHIP_R420_JM */
0x4A4E, /* PCI_CHIP_R420_JN */
0x4A4F, /* PCI_CHIP_R420_JO */
0x4A50, /* PCI_CHIP_R420_JP */
0x4A54, /* PCI_CHIP_R420_JT */
0x5548, /* PCI_CHIP_R423_UH */
0x5549, /* PCI_CHIP_R423_UI */
0x554A, /* PCI_CHIP_R423_UJ */
0x554B, /* PCI_CHIP_R423_UK */
0x5550, /* PCI_CHIP_R423_5550 */
0x5551, /* PCI_CHIP_R423_UQ */
0x5552, /* PCI_CHIP_R423_UR */
0x5554, /* PCI_CHIP_R423_UT */
0x5D57, /* PCI_CHIP_R423_5D57 */
0x554C, /* PCI_CHIP_R430_554C */
0x554D, /* PCI_CHIP_R430_554D */
0x554E, /* PCI_CHIP_R430_554E */
0x554F, /* PCI_CHIP_R430_554F */
0x5D48, /* PCI_CHIP_R430_5D48 */
0x5D49, /* PCI_CHIP_R430_5D49 */
0x5D4A, /* PCI_CHIP_R430_5D4A */
0x5D4C, /* PCI_CHIP_R480_5D4C */
0x5D4D, /* PCI_CHIP_R480_5D4D */
0x5D4E, /* PCI_CHIP_R480_5D4E */
0x5D4F, /* PCI_CHIP_R480_5D4F */
0x5D50, /* PCI_CHIP_R480_5D50 */
0x5D52, /* PCI_CHIP_R480_5D52 */
0x4B49, /* PCI_CHIP_R481_4B49 */
0x4B4A, /* PCI_CHIP_R481_4B4A */
0x4B4B, /* PCI_CHIP_R481_4B4B */
0x4B4C, /* PCI_CHIP_R481_4B4C */
0x564A, /* PCI_CHIP_RV410_564A */
0x564B, /* PCI_CHIP_RV410_564B */
0x564F, /* PCI_CHIP_RV410_564F */
0x5652, /* PCI_CHIP_RV410_5652 */
0x5653, /* PCI_CHIP_RV410_5653 */
0x5657, /* PCI_CHIP_RV410_5657 */
0x5E48, /* PCI_CHIP_RV410_5E48 */
0x5E4A, /* PCI_CHIP_RV410_5E4A */
0x5E4B, /* PCI_CHIP_RV410_5E4B */
0x5E4C, /* PCI_CHIP_RV410_5E4C */
0x5E4D, /* PCI_CHIP_RV410_5E4D */
0x5E4F, /* PCI_CHIP_RV410_5E4F */
0x5A41, /* PCI_CHIP_RS400_5A41 */
0x5A42, /* PCI_CHIP_RS400_5A42 */
0x5A61, /* PCI_CHIP_RC410_5A61 */
0x5A62, /* PCI_CHIP_RC410_5A62 */
0x5954, /* PCI_CHIP_RS480_5954 */
0x5955, /* PCI_CHIP_RS480_5955 */
0x5974, /* PCI_CHIP_RS482_5974 */
0x5975, /* PCI_CHIP_RS482_5975 */
0x7100, /* PCI_CHIP_R520_7100 */
0x7101, /* PCI_CHIP_R520_7101 */
0x7102, /* PCI_CHIP_R520_7102 */
0x7103, /* PCI_CHIP_R520_7103 */
0x7104, /* PCI_CHIP_R520_7104 */
0x7105, /* PCI_CHIP_R520_7105 */
0x7106, /* PCI_CHIP_R520_7106 */
0x7108, /* PCI_CHIP_R520_7108 */
0x7109, /* PCI_CHIP_R520_7109 */
0x710A, /* PCI_CHIP_R520_710A */
0x710B, /* PCI_CHIP_R520_710B */
0x710C, /* PCI_CHIP_R520_710C */
0x710E, /* PCI_CHIP_R520_710E */
0x710F, /* PCI_CHIP_R520_710F */
0x7140, /* PCI_CHIP_RV515_7140 */
0x7141, /* PCI_CHIP_RV515_7141 */
0x7142, /* PCI_CHIP_RV515_7142 */
0x7143, /* PCI_CHIP_RV515_7143 */
0x7144, /* PCI_CHIP_RV515_7144 */
0x7145, /* PCI_CHIP_RV515_7145 */
0x7146, /* PCI_CHIP_RV515_7146 */
0x7147, /* PCI_CHIP_RV515_7147 */
0x7149, /* PCI_CHIP_RV515_7149 */
0x714A, /* PCI_CHIP_RV515_714A */
0x714B, /* PCI_CHIP_RV515_714B */
0x714C, /* PCI_CHIP_RV515_714C */
0x714D, /* PCI_CHIP_RV515_714D */
0x714E, /* PCI_CHIP_RV515_714E */
0x714F, /* PCI_CHIP_RV515_714F */
0x7151, /* PCI_CHIP_RV515_7151 */
0x7152, /* PCI_CHIP_RV515_7152 */
0x7153, /* PCI_CHIP_RV515_7153 */
0x715E, /* PCI_CHIP_RV515_715E */
0x715F, /* PCI_CHIP_RV515_715F */
0x7180, /* PCI_CHIP_RV515_7180 */
0x7181, /* PCI_CHIP_RV515_7181 */
0x7183, /* PCI_CHIP_RV515_7183 */
0x7186, /* PCI_CHIP_RV515_7186 */
0x7187, /* PCI_CHIP_RV515_7187 */
0x7188, /* PCI_CHIP_RV515_7188 */
0x718A, /* PCI_CHIP_RV515_718A */
0x718B, /* PCI_CHIP_RV515_718B */
0x718C, /* PCI_CHIP_RV515_718C */
0x718D, /* PCI_CHIP_RV515_718D */
0x718F, /* PCI_CHIP_RV515_718F */
0x7193, /* PCI_CHIP_RV515_7193 */
0x7196, /* PCI_CHIP_RV515_7196 */
0x719B, /* PCI_CHIP_RV515_719B */
0x719F, /* PCI_CHIP_RV515_719F */
0x7200, /* PCI_CHIP_RV515_7200 */
0x7210, /* PCI_CHIP_RV515_7210 */
0x7211, /* PCI_CHIP_RV515_7211 */
0x71C0, /* PCI_CHIP_RV530_71C0 */
0x71C1, /* PCI_CHIP_RV530_71C1 */
0x71C2, /* PCI_CHIP_RV530_71C2 */
0x71C3, /* PCI_CHIP_RV530_71C3 */
0x71C4, /* PCI_CHIP_RV530_71C4 */
0x71C5, /* PCI_CHIP_RV530_71C5 */
0x71C6, /* PCI_CHIP_RV530_71C6 */
0x71C7, /* PCI_CHIP_RV530_71C7 */
0x71CD, /* PCI_CHIP_RV530_71CD */
0x71CE, /* PCI_CHIP_RV530_71CE */
0x71D2, /* PCI_CHIP_RV530_71D2 */
0x71D4, /* PCI_CHIP_RV530_71D4 */
0x71D5, /* PCI_CHIP_RV530_71D5 */
0x71D6, /* PCI_CHIP_RV530_71D6 */
0x71DA, /* PCI_CHIP_RV530_71DA */
0x71DE, /* PCI_CHIP_RV530_71DE */
0x7281, /* PCI_CHIP_RV560_7281 */
0x7283, /* PCI_CHIP_RV560_7283 */
0x7287, /* PCI_CHIP_RV560_7287 */
0x7290, /* PCI_CHIP_RV560_7290 */
0x7291, /* PCI_CHIP_RV560_7291 */
0x7293, /* PCI_CHIP_RV560_7293 */
0x7297, /* PCI_CHIP_RV560_7297 */
0x7280, /* PCI_CHIP_RV570_7280 */
0x7288, /* PCI_CHIP_RV570_7288 */
0x7289, /* PCI_CHIP_RV570_7289 */
0x728B, /* PCI_CHIP_RV570_728B */
0x728C, /* PCI_CHIP_RV570_728C */
0x7240, /* PCI_CHIP_R580_7240 */
0x7243, /* PCI_CHIP_R580_7243 */
0x7244, /* PCI_CHIP_R580_7244 */
0x7245, /* PCI_CHIP_R580_7245 */
0x7246, /* PCI_CHIP_R580_7246 */
0x7247, /* PCI_CHIP_R580_7247 */
0x7248, /* PCI_CHIP_R580_7248 */
0x7249, /* PCI_CHIP_R580_7249 */
0x724A, /* PCI_CHIP_R580_724A */
0x724B, /* PCI_CHIP_R580_724B */
0x724C, /* PCI_CHIP_R580_724C */
0x724D, /* PCI_CHIP_R580_724D */
0x724E, /* PCI_CHIP_R580_724E */
0x724F, /* PCI_CHIP_R580_724F */
0x7284, /* PCI_CHIP_R580_7284 */
0x793F, /* PCI_CHIP_RS600_793F */
0x7941, /* PCI_CHIP_RS600_7941 */
0x7942, /* PCI_CHIP_RS600_7942 */
0x791E, /* PCI_CHIP_RS690_791E */
0x791F, /* PCI_CHIP_RS690_791F */
0x796C, /* PCI_CHIP_RS740_796C */
0x796D, /* PCI_CHIP_RS740_796D */
0x796E, /* PCI_CHIP_RS740_796E */
0x796F, /* PCI_CHIP_RS740_796F */
};
const int r600_chip_ids[] = {
0x9400, /* PCI_CHIP_R600_9400 */
0x9401, /* PCI_CHIP_R600_9401 */
0x9402, /* PCI_CHIP_R600_9402 */
0x9403, /* PCI_CHIP_R600_9403 */
0x9405, /* PCI_CHIP_R600_9405 */
0x940A, /* PCI_CHIP_R600_940A */
0x940B, /* PCI_CHIP_R600_940B */
0x940F, /* PCI_CHIP_R600_940F */
0x94C0, /* PCI_CHIP_RV610_94C0 */
0x94C1, /* PCI_CHIP_RV610_94C1 */
0x94C3, /* PCI_CHIP_RV610_94C3 */
0x94C4, /* PCI_CHIP_RV610_94C4 */
0x94C5, /* PCI_CHIP_RV610_94C5 */
0x94C6, /* PCI_CHIP_RV610_94C6 */
0x94C7, /* PCI_CHIP_RV610_94C7 */
0x94C8, /* PCI_CHIP_RV610_94C8 */
0x94C9, /* PCI_CHIP_RV610_94C9 */
0x94CB, /* PCI_CHIP_RV610_94CB */
0x94CC, /* PCI_CHIP_RV610_94CC */
0x94CD, /* PCI_CHIP_RV610_94CD */
0x9580, /* PCI_CHIP_RV630_9580 */
0x9581, /* PCI_CHIP_RV630_9581 */
0x9583, /* PCI_CHIP_RV630_9583 */
0x9586, /* PCI_CHIP_RV630_9586 */
0x9587, /* PCI_CHIP_RV630_9587 */
0x9588, /* PCI_CHIP_RV630_9588 */
0x9589, /* PCI_CHIP_RV630_9589 */
0x958A, /* PCI_CHIP_RV630_958A */
0x958B, /* PCI_CHIP_RV630_958B */
0x958C, /* PCI_CHIP_RV630_958C */
0x958D, /* PCI_CHIP_RV630_958D */
0x958E, /* PCI_CHIP_RV630_958E */
0x958F, /* PCI_CHIP_RV630_958F */
0x9500, /* PCI_CHIP_RV670_9500 */
0x9501, /* PCI_CHIP_RV670_9501 */
0x9504, /* PCI_CHIP_RV670_9504 */
0x9505, /* PCI_CHIP_RV670_9505 */
0x9506, /* PCI_CHIP_RV670_9506 */
0x9507, /* PCI_CHIP_RV670_9507 */
0x9508, /* PCI_CHIP_RV670_9508 */
0x9509, /* PCI_CHIP_RV670_9509 */
0x950F, /* PCI_CHIP_RV670_950F */
0x9511, /* PCI_CHIP_RV670_9511 */
0x9515, /* PCI_CHIP_RV670_9515 */
0x9517, /* PCI_CHIP_RV670_9517 */
0x9519, /* PCI_CHIP_RV670_9519 */
0x95C0, /* PCI_CHIP_RV620_95C0 */
0x95C2, /* PCI_CHIP_RV620_95C2 */
0x95C4, /* PCI_CHIP_RV620_95C4 */
0x95C5, /* PCI_CHIP_RV620_95C5 */
0x95C6, /* PCI_CHIP_RV620_95C6 */
0x95C7, /* PCI_CHIP_RV620_95C7 */
0x95C9, /* PCI_CHIP_RV620_95C9 */
0x95CC, /* PCI_CHIP_RV620_95CC */
0x95CD, /* PCI_CHIP_RV620_95CD */
0x95CE, /* PCI_CHIP_RV620_95CE */
0x95CF, /* PCI_CHIP_RV620_95CF */
0x9590, /* PCI_CHIP_RV635_9590 */
0x9591, /* PCI_CHIP_RV635_9591 */
0x9593, /* PCI_CHIP_RV635_9593 */
0x9595, /* PCI_CHIP_RV635_9595 */
0x9596, /* PCI_CHIP_RV635_9596 */
0x9597, /* PCI_CHIP_RV635_9597 */
0x9598, /* PCI_CHIP_RV635_9598 */
0x9599, /* PCI_CHIP_RV635_9599 */
0x959B, /* PCI_CHIP_RV635_959B */
0x9610, /* PCI_CHIP_RS780_9610 */
0x9611, /* PCI_CHIP_RS780_9611 */
0x9612, /* PCI_CHIP_RS780_9612 */
0x9613, /* PCI_CHIP_RS780_9613 */
0x9614, /* PCI_CHIP_RS780_9614 */
0x9615, /* PCI_CHIP_RS780_9615 */
0x9616, /* PCI_CHIP_RS780_9616 */
0x9710, /* PCI_CHIP_RS880_9710 */
0x9711, /* PCI_CHIP_RS880_9711 */
0x9712, /* PCI_CHIP_RS880_9712 */
0x9713, /* PCI_CHIP_RS880_9713 */
0x9714, /* PCI_CHIP_RS880_9714 */
0x9715, /* PCI_CHIP_RS880_9715 */
0x9440, /* PCI_CHIP_RV770_9440 */
0x9441, /* PCI_CHIP_RV770_9441 */
0x9442, /* PCI_CHIP_RV770_9442 */
0x9443, /* PCI_CHIP_RV770_9443 */
0x9444, /* PCI_CHIP_RV770_9444 */
0x9446, /* PCI_CHIP_RV770_9446 */
0x944A, /* PCI_CHIP_RV770_944A */
0x944B, /* PCI_CHIP_RV770_944B */
0x944C, /* PCI_CHIP_RV770_944C */
0x944E, /* PCI_CHIP_RV770_944E */
0x9450, /* PCI_CHIP_RV770_9450 */
0x9452, /* PCI_CHIP_RV770_9452 */
0x9456, /* PCI_CHIP_RV770_9456 */
0x945A, /* PCI_CHIP_RV770_945A */
0x945B, /* PCI_CHIP_RV770_945B */
0x945E, /* PCI_CHIP_RV770_945E */
0x9460, /* PCI_CHIP_RV790_9460 */
0x9462, /* PCI_CHIP_RV790_9462 */
0x946A, /* PCI_CHIP_RV770_946A */
0x946B, /* PCI_CHIP_RV770_946B */
0x947A, /* PCI_CHIP_RV770_947A */
0x947B, /* PCI_CHIP_RV770_947B */
0x9480, /* PCI_CHIP_RV730_9480 */
0x9487, /* PCI_CHIP_RV730_9487 */
0x9488, /* PCI_CHIP_RV730_9488 */
0x9489, /* PCI_CHIP_RV730_9489 */
0x948A, /* PCI_CHIP_RV730_948A */
0x948F, /* PCI_CHIP_RV730_948F */
0x9490, /* PCI_CHIP_RV730_9490 */
0x9491, /* PCI_CHIP_RV730_9491 */
0x9495, /* PCI_CHIP_RV730_9495 */
0x9498, /* PCI_CHIP_RV730_9498 */
0x949C, /* PCI_CHIP_RV730_949C */
0x949E, /* PCI_CHIP_RV730_949E */
0x949F, /* PCI_CHIP_RV730_949F */
0x9540, /* PCI_CHIP_RV710_9540 */
0x9541, /* PCI_CHIP_RV710_9541 */
0x9542, /* PCI_CHIP_RV710_9542 */
0x954E, /* PCI_CHIP_RV710_954E */
0x954F, /* PCI_CHIP_RV710_954F */
0x9552, /* PCI_CHIP_RV710_9552 */
0x9553, /* PCI_CHIP_RV710_9553 */
0x9555, /* PCI_CHIP_RV710_9555 */
0x9557, /* PCI_CHIP_RV710_9557 */
0x955F, /* PCI_CHIP_RV710_955F */
0x94A0, /* PCI_CHIP_RV740_94A0 */
0x94A1, /* PCI_CHIP_RV740_94A1 */
0x94A3, /* PCI_CHIP_RV740_94A3 */
0x94B1, /* PCI_CHIP_RV740_94B1 */
0x94B3, /* PCI_CHIP_RV740_94B3 */
0x94B4, /* PCI_CHIP_RV740_94B4 */
0x94B5, /* PCI_CHIP_RV740_94B5 */
0x94B9, /* PCI_CHIP_RV740_94B9 */
0x68E0, /* PCI_CHIP_CEDAR_68E0 */
0x68E1, /* PCI_CHIP_CEDAR_68E1 */
0x68E4, /* PCI_CHIP_CEDAR_68E4 */
0x68E5, /* PCI_CHIP_CEDAR_68E5 */
0x68E8, /* PCI_CHIP_CEDAR_68E8 */
0x68E9, /* PCI_CHIP_CEDAR_68E9 */
0x68F1, /* PCI_CHIP_CEDAR_68F1 */
0x68F8, /* PCI_CHIP_CEDAR_68F8 */
0x68F9, /* PCI_CHIP_CEDAR_68F9 */
0x68FE, /* PCI_CHIP_CEDAR_68FE */
0x68C0, /* PCI_CHIP_REDWOOD_68C0 */
0x68C1, /* PCI_CHIP_REDWOOD_68C1 */
0x68C8, /* PCI_CHIP_REDWOOD_68C8 */
0x68C9, /* PCI_CHIP_REDWOOD_68C9 */
0x68D8, /* PCI_CHIP_REDWOOD_68D8 */
0x68D9, /* PCI_CHIP_REDWOOD_68D9 */
0x68DA, /* PCI_CHIP_REDWOOD_68DA */
0x68DE, /* PCI_CHIP_REDWOOD_68DE */
0x68A0, /* PCI_CHIP_JUNIPER_68A0 */
0x68A1, /* PCI_CHIP_JUNIPER_68A1 */
0x68A8, /* PCI_CHIP_JUNIPER_68A8 */
0x68A9, /* PCI_CHIP_JUNIPER_68A9 */
0x68B0, /* PCI_CHIP_JUNIPER_68B0 */
0x68B8, /* PCI_CHIP_JUNIPER_68B8 */
0x68B9, /* PCI_CHIP_JUNIPER_68B9 */
0x68BE, /* PCI_CHIP_JUNIPER_68BE */
0x6880, /* PCI_CHIP_CYPRESS_6880 */
0x6888, /* PCI_CHIP_CYPRESS_6888 */
0x6889, /* PCI_CHIP_CYPRESS_6889 */
0x688A, /* PCI_CHIP_CYPRESS_688A */
0x6898, /* PCI_CHIP_CYPRESS_6898 */
0x6899, /* PCI_CHIP_CYPRESS_6899 */
0x689E, /* PCI_CHIP_CYPRESS_689E */
0x689C, /* PCI_CHIP_HEMLOCK_689C */
0x689D, /* PCI_CHIP_HEMLOCK_689D */
};
const struct dri2_driver_map driver_map[] = {
{ 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
{ 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
{ 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
{ 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
{ 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },
{ 0x1002, "r600", r600_chip_ids, ARRAY_SIZE(r600_chip_ids) },
};
static char *

76
src/egl/main/SConscript
View file

@ -4,49 +4,49 @@
Import('*')
if env['platform'] != 'winddk':
env = env.Clone()
env = env.Clone()
env.Append(CPPDEFINES = [
'_EGL_NATIVE_PLATFORM=_EGL_PLATFORM_WINDOWS',
'_EGL_DRIVER_SEARCH_DIR=\\"\\"',
'_EGL_OS_WINDOWS',
'_EGL_GET_CORE_ADDRESSES',
'KHRONOS_DLL_EXPORTS',
])
env.Append(CPPDEFINES = [
'_EGL_NATIVE_PLATFORM=_EGL_PLATFORM_WINDOWS',
'_EGL_DRIVER_SEARCH_DIR=\\"\\"',
'_EGL_OS_WINDOWS',
'_EGL_GET_CORE_ADDRESSES',
'KHRONOS_DLL_EXPORTS',
])
env.Append(CPPPATH = [
'#/include',
])
env.Append(CPPPATH = [
'#/include',
])
egl_sources = [
'eglapi.c',
'eglarray.c',
'eglconfig.c',
'eglcontext.c',
'eglcurrent.c',
'egldisplay.c',
'egldriver.c',
'eglfallbacks.c',
'eglglobals.c',
'eglimage.c',
'egllog.c',
'eglmisc.c',
'eglmode.c',
'eglscreen.c',
'eglstring.c',
'eglsurface.c',
'eglsync.c',
]
egl_sources = [
'eglapi.c',
'eglarray.c',
'eglconfig.c',
'eglcontext.c',
'eglcurrent.c',
'egldisplay.c',
'egldriver.c',
'eglfallbacks.c',
'eglglobals.c',
'eglimage.c',
'egllog.c',
'eglmisc.c',
'eglmode.c',
'eglscreen.c',
'eglstring.c',
'eglsurface.c',
'eglsync.c',
]
egl = env.SharedLibrary(
target = 'libEGL',
source = egl_sources + ['egl.def'],
)
egl = env.SharedLibrary(
target = 'libEGL',
source = egl_sources + ['egl.def'],
)
installed_egl = env.InstallSharedLibrary(egl, version=(1, 4, 0))
env.InstallSharedLibrary(egl, version=(1, 4, 0))
env.Alias('egl', installed_egl)
egl = [env.FindIxes(egl, 'LIBPREFIX', 'LIBSUFFIX')]
egl = [env.FindIxes(egl, 'LIBPREFIX', 'LIBSUFFIX')]
Export('egl')
Export('egl')

2
src/egl/main/eglarray.h
View file

@ -37,7 +37,7 @@ void *
_eglFindArray(_EGLArray *array, void *elem);
void **
PUBLIC void **
_eglFilterArray(_EGLArray *array, EGLint *size,
_EGLArrayForEach filter, void *filter_data);

1
src/egl/main/eglconfig.h
View file

@ -3,6 +3,7 @@
#include <assert.h>
#include <stddef.h>
#include "egltypedefs.h"

40
src/egl/main/eglcurrent.c
View file

@ -14,33 +14,7 @@
static _EGLThreadInfo dummy_thread = _EGL_THREAD_INFO_INITIALIZER;
#ifdef GLX_USE_TLS
static __thread const _EGLThreadInfo *_egl_TSD
__attribute__ ((tls_model("initial-exec")));
static INLINE void _eglSetTSD(const _EGLThreadInfo *t)
{
_egl_TSD = t;
}
static INLINE _EGLThreadInfo *_eglGetTSD(void)
{
return (_EGLThreadInfo *) _egl_TSD;
}
static INLINE void _eglFiniTSD(void)
{
}
static INLINE EGLBoolean _eglInitTSD(void (*dtor)(_EGLThreadInfo *))
{
/* TODO destroy TSD */
(void) dtor;
(void) _eglFiniTSD;
return EGL_TRUE;
}
#elif PTHREADS
#if PTHREADS
#include <pthread.h>
static _EGL_DECLARE_MUTEX(_egl_TSDMutex);
@ -48,14 +22,26 @@ static EGLBoolean _egl_TSDInitialized;
static pthread_key_t _egl_TSD;
static void (*_egl_FreeTSD)(_EGLThreadInfo *);
#ifdef GLX_USE_TLS
static __thread const _EGLThreadInfo *_egl_TLS
__attribute__ ((tls_model("initial-exec")));
#endif
static INLINE void _eglSetTSD(const _EGLThreadInfo *t)
{
pthread_setspecific(_egl_TSD, (const void *) t);
#ifdef GLX_USE_TLS
_egl_TLS = t;
#endif
}
static INLINE _EGLThreadInfo *_eglGetTSD(void)
{
#ifdef GLX_USE_TLS
return (_EGLThreadInfo *) _egl_TLS;
#else
return (_EGLThreadInfo *) pthread_getspecific(_egl_TSD);
#endif
}
static INLINE void _eglFiniTSD(void)

65
src/egl/main/egldriver.c
View file

@ -395,35 +395,62 @@ _eglPreloadForEach(const char *search_path,
static const char *
_eglGetSearchPath(void)
{
static const char *search_path;
static char search_path[1024];
#if defined(_EGL_OS_UNIX) || defined(_EGL_OS_WINDOWS)
if (!search_path) {
static char buffer[1024];
const char *p;
if (search_path[0] == '\0') {
char *buf = search_path;
size_t len = sizeof(search_path);
EGLBoolean use_env;
char dir_sep;
int ret;
p = getenv("EGL_DRIVERS_PATH");
#if defined(_EGL_OS_UNIX)
if (p && (geteuid() != getuid() || getegid() != getgid())) {
use_env = (geteuid() == getuid() && getegid() == getgid());
dir_sep = '/';
#else
use_env = EGL_TRUE;
dir_sep = '\\';
#endif
if (use_env) {
char *p;
/* extract the dirname from EGL_DRIVER */
p = getenv("EGL_DRIVER");
if (p && strchr(p, dir_sep)) {
ret = _eglsnprintf(buf, len, "%s", p);
if (ret > 0 && ret < len) {
p = strrchr(buf, dir_sep);
*p++ = ':';
len -= p - buf;
buf = p;
}
}
/* append EGL_DRIVERS_PATH */
p = getenv("EGL_DRIVERS_PATH");
if (p) {
ret = _eglsnprintf(buf, len, "%s:", p);
if (ret > 0 && ret < len) {
buf += ret;
len -= ret;
}
}
}
else {
_eglLog(_EGL_DEBUG,
"ignore EGL_DRIVERS_PATH for setuid/setgid binaries");
p = NULL;
}
#endif /* _EGL_OS_UNIX */
if (p) {
ret = _eglsnprintf(buffer, sizeof(buffer),
"%s:%s", p, _EGL_DRIVER_SEARCH_DIR);
if (ret > 0 && ret < sizeof(buffer))
search_path = buffer;
}
ret = _eglsnprintf(buf, len, "%s", _EGL_DRIVER_SEARCH_DIR);
if (ret < 0 || ret >= len)
search_path[0] = '\0';
_eglLog(_EGL_DEBUG, "EGL search path is %s", search_path);
}
if (!search_path)
search_path = _EGL_DRIVER_SEARCH_DIR;
#else
search_path = "";
#endif
#endif /* defined(_EGL_OS_UNIX) || defined(_EGL_OS_WINDOWS) */
return search_path;
}

2
src/egl/main/egldriver.h
View file

@ -4,7 +4,7 @@
#include "egltypedefs.h"
#include "eglapi.h"
#include <stddef.h>
/**
* Define an inline driver typecast function.

5
src/egl/main/egllog.c
View file

@ -151,6 +151,7 @@ _eglLog(EGLint level, const char *fmtStr, ...)
{
va_list args;
char msg[MAXSTRING];
int ret;
/* one-time initialization; a little race here is fine */
if (!logging.initialized)
@ -162,7 +163,9 @@ _eglLog(EGLint level, const char *fmtStr, ...)
if (logging.logger) {
va_start(args, fmtStr);
vsnprintf(msg, MAXSTRING, fmtStr, args);
ret = vsnprintf(msg, MAXSTRING, fmtStr, args);
if (ret < 0 || ret >= MAXSTRING)
strcpy(msg, "<message truncated>");
va_end(args);
logging.logger(level, msg);

137
src/gallium/SConscript
View file

@ -1,30 +1,135 @@
import os
Import('env')
Import('*')
#
# Auxiliary modules
#
SConscript('auxiliary/SConscript')
for driver in env['drivers']:
SConscript(os.path.join('drivers', driver, 'SConscript'))
#
# Drivers
#
SConscript([
'drivers/failover/SConscript',
'drivers/galahad/SConscript',
'drivers/identity/SConscript',
'drivers/llvmpipe/SConscript',
'drivers/rbug/SConscript',
'drivers/softpipe/SConscript',
'drivers/svga/SConscript',
'drivers/trace/SConscript',
])
if not env['msvc']:
# These drivers do not build on MSVC compilers
SConscript([
'drivers/i915/SConscript',
'drivers/i965/SConscript',
'drivers/r300/SConscript',
])
if env['drm']:
# These drivers depend on drm headers
if env['drm_radeon']:
SConscript([
'drivers/r600/SConscript',
])
# XXX: nouveau drivers have a tight dependency on libdrm, so to enable
# we need some version logic before we enable them. Also, ATM there is
# no nouveau target in scons
# if env['drm_nouveau']:
# SConscript([
# 'drivers/nouveau/SConscript',
# 'drivers/nv50/SConscript',
# 'drivers/nvfx/SConscript',
# ])
#
# State trackers
#
# Needed by some state trackers
SConscript('winsys/sw/null/SConscript')
SConscript('state_trackers/python/SConscript')
if platform != 'embedded':
SConscript('state_trackers/glx/xlib/SConscript')
SConscript('state_trackers/dri/SConscript')
SConscript('state_trackers/xorg/SConscript')
SConscript('state_trackers/egl/SConscript')
SConscript('state_trackers/vega/SConscript')
if env['platform'] != 'embedded':
SConscript('state_trackers/vega/SConscript')
if platform == 'windows':
SConscript('state_trackers/wgl/SConscript')
if env['x11']:
SConscript('state_trackers/glx/xlib/SConscript')
if env['dri']:
SConscript('state_trackers/dri/SConscript')
if env['dri'] and env['xorg']:
SConscript('state_trackers/xorg/SConscript')
if env['platform'] == 'windows':
SConscript([
'state_trackers/egl/SConscript',
'state_trackers/wgl/SConscript',
])
#
# Winsys
#
SConscript('winsys/SConscript')
SConscript('targets/SConscript')
#
# Targets
#
if platform != 'embedded':
SConscript('tests/unit/SConscript')
SConscript('tests/graw/SConscript')
SConscript([
'targets/graw-null/SConscript',
])
if env['x11']:
SConscript([
'targets/graw-xlib/SConscript',
'targets/libgl-xlib/SConscript',
])
if env['platform'] == 'windows':
SConscript([
'targets/graw-gdi/SConscript',
'targets/libgl-gdi/SConscript',
#'egl-gdi/SConscript',
])
if env['dri']:
SConscript([
'targets/SConscript.dri',
'targets/dri-swrast/SConscript',
'targets/dri-vmwgfx/SConscript',
#'targets/dri-nouveau/SConscript',
])
if env['drm_intel']:
SConscript([
'targets/dri-i915/SConscript',
'targets/dri-i965/SConscript',
])
if env['drm_radeon']:
SConscript([
'targets/dri-r300/SConscript',
'targets/dri-r600/SConscript',
])
if env['xorg'] and env['drm']:
SConscript([
#'targets/xorg-i915/SConscript',
#'targets/xorg-i965/SConscript',
#'targets/xorg-nouveau/SConscript',
#'targets/xorg-radeon/SConscript',
'targets/xorg-vmwgfx/SConscript',
])
#
# Unit tests & tools
#
if env['platform'] != 'embedded':
SConscript('tests/unit/SConscript')
SConscript('tests/graw/SConscript')

71
src/gallium/auxiliary/SConscript
View file

@ -7,8 +7,6 @@ env.Append(CPPPATH = [
'util',
])
env.Tool('udis86')
env.CodeGenerate(
target = 'indices/u_indices_gen.c',
script = 'indices/u_indices_gen.py',
@ -200,39 +198,42 @@ source = [
]
if env['llvm']:
if env['UDIS86']:
env.Append(CPPDEFINES = [('HAVE_UDIS86', '1')])
source += [
'gallivm/lp_bld_arit.c',
'gallivm/lp_bld_assert.c',
'gallivm/lp_bld_bitarit.c',
'gallivm/lp_bld_const.c',
'gallivm/lp_bld_conv.c',
'gallivm/lp_bld_debug.c',
'gallivm/lp_bld_flow.c',
'gallivm/lp_bld_format_aos.c',
'gallivm/lp_bld_format_soa.c',
'gallivm/lp_bld_format_yuv.c',
'gallivm/lp_bld_gather.c',
'gallivm/lp_bld_init.c',
'gallivm/lp_bld_intr.c',
'gallivm/lp_bld_logic.c',
'gallivm/lp_bld_misc.cpp',
'gallivm/lp_bld_pack.c',
'gallivm/lp_bld_printf.c',
'gallivm/lp_bld_quad.c',
'gallivm/lp_bld_sample.c',
'gallivm/lp_bld_sample_aos.c',
'gallivm/lp_bld_sample_soa.c',
'gallivm/lp_bld_struct.c',
'gallivm/lp_bld_swizzle.c',
'gallivm/lp_bld_tgsi_aos.c',
'gallivm/lp_bld_tgsi_info.c',
'gallivm/lp_bld_tgsi_soa.c',
'gallivm/lp_bld_type.c',
'draw/draw_llvm.c',
'draw/draw_llvm_sample.c',
'draw/draw_llvm_translate.c',
'draw/draw_pt_fetch_shade_pipeline_llvm.c',
'draw/draw_vs_llvm.c'
'gallivm/lp_bld_arit.c',
'gallivm/lp_bld_assert.c',
'gallivm/lp_bld_bitarit.c',
'gallivm/lp_bld_const.c',
'gallivm/lp_bld_conv.c',
'gallivm/lp_bld_debug.c',
'gallivm/lp_bld_flow.c',
'gallivm/lp_bld_format_aos.c',
'gallivm/lp_bld_format_soa.c',
'gallivm/lp_bld_format_yuv.c',
'gallivm/lp_bld_gather.c',
'gallivm/lp_bld_init.c',
'gallivm/lp_bld_intr.c',
'gallivm/lp_bld_logic.c',
'gallivm/lp_bld_misc.cpp',
'gallivm/lp_bld_pack.c',
'gallivm/lp_bld_printf.c',
'gallivm/lp_bld_quad.c',
'gallivm/lp_bld_sample.c',
'gallivm/lp_bld_sample_aos.c',
'gallivm/lp_bld_sample_soa.c',
'gallivm/lp_bld_struct.c',
'gallivm/lp_bld_swizzle.c',
'gallivm/lp_bld_tgsi_aos.c',
'gallivm/lp_bld_tgsi_info.c',
'gallivm/lp_bld_tgsi_soa.c',
'gallivm/lp_bld_type.c',
'draw/draw_llvm.c',
'draw/draw_llvm_sample.c',
'draw/draw_llvm_translate.c',
'draw/draw_pt_fetch_shade_pipeline_llvm.c',
'draw/draw_vs_llvm.c'
]
gallium = env.ConvenienceLibrary(
@ -240,4 +241,6 @@ gallium = env.ConvenienceLibrary(
source = source,
)
env.Alias('gallium', gallium)
Export('gallium')

10
src/gallium/auxiliary/draw/draw_llvm.c
View file

@ -1164,11 +1164,6 @@ draw_llvm_generate(struct draw_llvm *llvm, struct draw_llvm_variant *variant)
sampler->destroy(sampler);
#ifdef PIPE_ARCH_X86
/* Avoid corrupting the FPU stack on 32bit OSes. */
lp_build_intrinsic(builder, "llvm.x86.mmx.emms", LLVMVoidType(), NULL, 0);
#endif
ret = LLVMBuildLoad(builder, ret_ptr,"");
LLVMBuildRet(builder, ret);
@ -1378,11 +1373,6 @@ draw_llvm_generate_elts(struct draw_llvm *llvm, struct draw_llvm_variant *varian
sampler->destroy(sampler);
#ifdef PIPE_ARCH_X86
/* Avoid corrupting the FPU stack on 32bit OSes. */
lp_build_intrinsic(builder, "llvm.x86.mmx.emms", LLVMVoidType(), NULL, 0);
#endif
ret = LLVMBuildLoad(builder, ret_ptr,"");
LLVMBuildRet(builder, ret);

8
src/gallium/auxiliary/gallivm/lp_bld_init.c
View file

@ -145,13 +145,7 @@ lp_build_init(void)
LLVMAddCFGSimplificationPass(lp_build_pass);
LLVMAddPromoteMemoryToRegisterPass(lp_build_pass);
LLVMAddConstantPropagationPass(lp_build_pass);
if(util_cpu_caps.has_sse4_1) {
/* FIXME: There is a bug in this pass, whereby the combination of fptosi
* and sitofp (necessary for trunc/floor/ceil/round implementation)
* somehow becomes invalid code.
*/
LLVMAddInstructionCombiningPass(lp_build_pass);
}
LLVMAddInstructionCombiningPass(lp_build_pass);
LLVMAddGVNPass(lp_build_pass);
} else {
/* We need at least this pass to prevent the backends to fail in

335
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
View file

@ -58,6 +58,7 @@
#include "lp_bld_tgsi.h"
#include "lp_bld_limits.h"
#include "lp_bld_debug.h"
#include "lp_bld_printf.h"
#define FOR_EACH_CHANNEL( CHAN )\
@ -119,9 +120,12 @@ struct lp_build_tgsi_soa_context
{
struct lp_build_context base;
/* Builder for integer masks and indices */
/* Builder for vector integer masks and indices */
struct lp_build_context uint_bld;
/* Builder for scalar elements of shader's data type (float) */
struct lp_build_context elem_bld;
LLVMValueRef consts_ptr;
const LLVMValueRef *pos;
const LLVMValueRef (*inputs)[NUM_CHANNELS];
@ -140,6 +144,18 @@ struct lp_build_tgsi_soa_context
*/
LLVMValueRef temps_array;
/* We allocate/use this array of output if (1 << TGSI_FILE_OUTPUT) is
* set in the indirect_files field.
* The outputs[] array above is unused then.
*/
LLVMValueRef outputs_array;
/* We allocate/use this array of inputs if (1 << TGSI_FILE_INPUT) is
* set in the indirect_files field.
* The inputs[] array above is unused then.
*/
LLVMValueRef inputs_array;
const struct tgsi_shader_info *info;
/** bitmask indicating which register files are accessed indirectly */
unsigned indirect_files;
@ -435,6 +451,26 @@ get_temp_ptr(struct lp_build_tgsi_soa_context *bld,
}
}
/**
* Return pointer to a output register channel (src or dest).
* Note that indirect addressing cannot be handled here.
* \param index which output register
* \param chan which channel of the output register.
*/
static LLVMValueRef
get_output_ptr(struct lp_build_tgsi_soa_context *bld,
unsigned index,
unsigned chan)
{
assert(chan < 4);
if (bld->indirect_files & (1 << TGSI_FILE_OUTPUT)) {
LLVMValueRef lindex = lp_build_const_int32(index * 4 + chan);
return LLVMBuildGEP(bld->base.builder, bld->outputs_array, &lindex, 1, "");
}
else {
return bld->outputs[index][chan];
}
}
/**
* Gather vector.
@ -457,7 +493,7 @@ build_gather(struct lp_build_tgsi_soa_context *bld,
LLVMValueRef index = LLVMBuildExtractElement(bld->base.builder,
indexes, ii, "");
LLVMValueRef scalar_ptr = LLVMBuildGEP(bld->base.builder, base_ptr,
&index, 1, "");
&index, 1, "gather_ptr");
LLVMValueRef scalar = LLVMBuildLoad(bld->base.builder, scalar_ptr, "");
res = LLVMBuildInsertElement(bld->base.builder, res, scalar, ii, "");
@ -467,9 +503,61 @@ build_gather(struct lp_build_tgsi_soa_context *bld,
}
/**
* Scatter/store vector.
*/
static void
emit_mask_scatter(struct lp_build_tgsi_soa_context *bld,
LLVMValueRef base_ptr,
LLVMValueRef indexes,
LLVMValueRef values,
struct lp_exec_mask *mask,
LLVMValueRef pred)
{
LLVMBuilderRef builder = bld->base.builder;
unsigned i;
/* Mix the predicate and execution mask */
if (mask->has_mask) {
if (pred) {
pred = LLVMBuildAnd(mask->bld->builder, pred, mask->exec_mask, "");
}
else {
pred = mask->exec_mask;
}
}
/*
* Loop over elements of index_vec, store scalar value.
*/
for (i = 0; i < bld->base.type.length; i++) {
LLVMValueRef ii = LLVMConstInt(LLVMInt32Type(), i, 0);
LLVMValueRef index = LLVMBuildExtractElement(builder, indexes, ii, "");
LLVMValueRef scalar_ptr = LLVMBuildGEP(builder, base_ptr, &index, 1, "scatter_ptr");
LLVMValueRef val = LLVMBuildExtractElement(builder, values, ii, "scatter_val");
LLVMValueRef scalar_pred = pred ?
LLVMBuildExtractElement(builder, pred, ii, "scatter_pred") : NULL;
if (0)
lp_build_printf(builder, "scatter %d: val %f at %d %p\n",
ii, val, index, scalar_ptr);
if (scalar_pred) {
LLVMValueRef real_val, dst_val;
dst_val = LLVMBuildLoad(builder, scalar_ptr, "");
real_val = lp_build_select(&bld->elem_bld, scalar_pred, val, dst_val);
LLVMBuildStore(builder, real_val, scalar_ptr);
}
else {
LLVMBuildStore(builder, val, scalar_ptr);
}
}
}
/**
* Read the current value of the ADDR register, convert the floats to
* ints, multiply by four and return the vector of offsets.
* ints, add the base index and return the vector of offsets.
* The offsets will be used to index into the constant buffer or
* temporary register file.
*/
@ -577,7 +665,38 @@ emit_fetch(
break;
case TGSI_FILE_INPUT:
res = bld->inputs[reg->Register.Index][swizzle];
if (reg->Register.Indirect) {
LLVMValueRef swizzle_vec =
lp_build_const_int_vec(uint_bld->type, swizzle);
LLVMValueRef length_vec =
lp_build_const_int_vec(uint_bld->type, bld->base.type.length);
LLVMValueRef index_vec; /* index into the const buffer */
LLVMValueRef inputs_array;
LLVMTypeRef float4_ptr_type;
/* index_vec = (indirect_index * 4 + swizzle) * length */
index_vec = lp_build_shl_imm(uint_bld, indirect_index, 2);
index_vec = lp_build_add(uint_bld, index_vec, swizzle_vec);
index_vec = lp_build_mul(uint_bld, index_vec, length_vec);
/* cast inputs_array pointer to float* */
float4_ptr_type = LLVMPointerType(LLVMFloatType(), 0);
inputs_array = LLVMBuildBitCast(uint_bld->builder, bld->inputs_array,
float4_ptr_type, "");
/* Gather values from the temporary register array */
res = build_gather(bld, inputs_array, index_vec);
} else {
if (bld->indirect_files & (1 << TGSI_FILE_INPUT)) {
LLVMValueRef lindex = lp_build_const_int32(reg->Register.Index * 4 + swizzle);
LLVMValueRef input_ptr = LLVMBuildGEP(bld->base.builder,
bld->inputs_array, &lindex, 1, "");
res = LLVMBuildLoad(bld->base.builder, input_ptr, "");
}
else {
res = bld->inputs[reg->Register.Index][swizzle];
}
}
assert(res);
break;
@ -748,6 +867,7 @@ emit_store(
LLVMValueRef value)
{
const struct tgsi_full_dst_register *reg = &inst->Dst[index];
struct lp_build_context *uint_bld = &bld->uint_bld;
LLVMValueRef indirect_index = NULL;
switch( inst->Instruction.Saturate ) {
@ -779,15 +899,81 @@ emit_store(
switch( reg->Register.File ) {
case TGSI_FILE_OUTPUT:
lp_exec_mask_store(&bld->exec_mask, pred, value,
bld->outputs[reg->Register.Index][chan_index]);
if (reg->Register.Indirect) {
LLVMBuilderRef builder = bld->base.builder;
LLVMValueRef chan_vec =
lp_build_const_int_vec(uint_bld->type, chan_index);
LLVMValueRef length_vec =
lp_build_const_int_vec(uint_bld->type, bld->base.type.length);
LLVMValueRef index_vec; /* indexes into the temp registers */
LLVMValueRef outputs_array;
LLVMValueRef pixel_offsets;
LLVMTypeRef float_ptr_type;
int i;
/* build pixel offset vector: {0, 1, 2, 3, ...} */
pixel_offsets = uint_bld->undef;
for (i = 0; i < bld->base.type.length; i++) {
LLVMValueRef ii = lp_build_const_int32(i);
pixel_offsets = LLVMBuildInsertElement(builder, pixel_offsets,
ii, ii, "");
}
/* index_vec = (indirect_index * 4 + chan_index) * length + offsets */
index_vec = lp_build_shl_imm(uint_bld, indirect_index, 2);
index_vec = lp_build_add(uint_bld, index_vec, chan_vec);
index_vec = lp_build_mul(uint_bld, index_vec, length_vec);
index_vec = lp_build_add(uint_bld, index_vec, pixel_offsets);
float_ptr_type = LLVMPointerType(LLVMFloatType(), 0);
outputs_array = LLVMBuildBitCast(builder, bld->outputs_array,
float_ptr_type, "");
/* Scatter store values into temp registers */
emit_mask_scatter(bld, outputs_array, index_vec, value,
&bld->exec_mask, pred);
}
else {
LLVMValueRef out_ptr = get_output_ptr(bld, reg->Register.Index,
chan_index);
lp_exec_mask_store(&bld->exec_mask, pred, value, out_ptr);
}
break;
case TGSI_FILE_TEMPORARY:
if (reg->Register.Indirect) {
/* XXX not done yet */
debug_printf("WARNING: LLVM scatter store of temp regs"
" not implemented\n");
LLVMBuilderRef builder = bld->base.builder;
LLVMValueRef chan_vec =
lp_build_const_int_vec(uint_bld->type, chan_index);
LLVMValueRef length_vec =
lp_build_const_int_vec(uint_bld->type, bld->base.type.length);
LLVMValueRef index_vec; /* indexes into the temp registers */
LLVMValueRef temps_array;
LLVMValueRef pixel_offsets;
LLVMTypeRef float_ptr_type;
int i;
/* build pixel offset vector: {0, 1, 2, 3, ...} */
pixel_offsets = uint_bld->undef;
for (i = 0; i < bld->base.type.length; i++) {
LLVMValueRef ii = lp_build_const_int32(i);
pixel_offsets = LLVMBuildInsertElement(builder, pixel_offsets,
ii, ii, "");
}
/* index_vec = (indirect_index * 4 + chan_index) * length + offsets */
index_vec = lp_build_shl_imm(uint_bld, indirect_index, 2);
index_vec = lp_build_add(uint_bld, index_vec, chan_vec);
index_vec = lp_build_mul(uint_bld, index_vec, length_vec);
index_vec = lp_build_add(uint_bld, index_vec, pixel_offsets);
float_ptr_type = LLVMPointerType(LLVMFloatType(), 0);
temps_array = LLVMBuildBitCast(builder, bld->temps_array,
float_ptr_type, "");
/* Scatter store values into temp registers */
emit_mask_scatter(bld, temps_array, index_vec, value,
&bld->exec_mask, pred);
}
else {
LLVMValueRef temp_ptr = get_temp_ptr(bld, reg->Register.Index,
@ -1040,15 +1226,60 @@ emit_kilp(struct lp_build_tgsi_soa_context *bld,
lp_build_mask_check(bld->mask);
}
/**
* Emit code which will dump the value of all the temporary registers
* to stdout.
*/
static void
emit_dump_temps(struct lp_build_tgsi_soa_context *bld)
{
LLVMBuilderRef builder = bld->base.builder;
LLVMValueRef temp_ptr;
LLVMValueRef i0 = lp_build_const_int32(0);
LLVMValueRef i1 = lp_build_const_int32(1);
LLVMValueRef i2 = lp_build_const_int32(2);
LLVMValueRef i3 = lp_build_const_int32(3);
int index;
int n = bld->info->file_max[TGSI_FILE_TEMPORARY];
for (index = 0; index < n; index++) {
LLVMValueRef idx = lp_build_const_int32(index);
LLVMValueRef v[4][4], res;
int chan;
lp_build_printf(builder, "TEMP[%d]:\n", idx);
for (chan = 0; chan < 4; chan++) {
temp_ptr = get_temp_ptr(bld, index, chan);
res = LLVMBuildLoad(bld->base.builder, temp_ptr, "");
v[chan][0] = LLVMBuildExtractElement(builder, res, i0, "");
v[chan][1] = LLVMBuildExtractElement(builder, res, i1, "");
v[chan][2] = LLVMBuildExtractElement(builder, res, i2, "");
v[chan][3] = LLVMBuildExtractElement(builder, res, i3, "");
}
lp_build_printf(builder, " X: %f %f %f %f\n",
v[0][0], v[0][1], v[0][2], v[0][3]);
lp_build_printf(builder, " Y: %f %f %f %f\n",
v[1][0], v[1][1], v[1][2], v[1][3]);
lp_build_printf(builder, " Z: %f %f %f %f\n",
v[2][0], v[2][1], v[2][2], v[2][3]);
lp_build_printf(builder, " W: %f %f %f %f\n",
v[3][0], v[3][1], v[3][2], v[3][3]);
}
}
static void
emit_declaration(
struct lp_build_tgsi_soa_context *bld,
const struct tgsi_full_declaration *decl)
{
LLVMTypeRef vec_type = bld->base.vec_type;
unsigned first = decl->Range.First;
unsigned last = decl->Range.Last;
const unsigned first = decl->Range.First;
const unsigned last = decl->Range.Last;
unsigned idx, i;
for (idx = first; idx <= last; ++idx) {
@ -1056,36 +1287,33 @@ emit_declaration(
switch (decl->Declaration.File) {
case TGSI_FILE_TEMPORARY:
assert(idx < LP_MAX_TGSI_TEMPS);
if (bld->indirect_files & (1 << TGSI_FILE_TEMPORARY)) {
LLVMValueRef array_size = LLVMConstInt(LLVMInt32Type(),
last*4 + 4, 0);
bld->temps_array = lp_build_array_alloca(bld->base.builder,
vec_type, array_size, "");
} else {
if (!(bld->indirect_files & (1 << TGSI_FILE_TEMPORARY))) {
for (i = 0; i < NUM_CHANNELS; i++)
bld->temps[idx][i] = lp_build_alloca(bld->base.builder,
vec_type, "");
vec_type, "temp");
}
break;
case TGSI_FILE_OUTPUT:
for (i = 0; i < NUM_CHANNELS; i++)
bld->outputs[idx][i] = lp_build_alloca(bld->base.builder,
vec_type, "");
if (!(bld->indirect_files & (1 << TGSI_FILE_OUTPUT))) {
for (i = 0; i < NUM_CHANNELS; i++)
bld->outputs[idx][i] = lp_build_alloca(bld->base.builder,
vec_type, "output");
}
break;
case TGSI_FILE_ADDRESS:
assert(idx < LP_MAX_TGSI_ADDRS);
for (i = 0; i < NUM_CHANNELS; i++)
bld->addr[idx][i] = lp_build_alloca(bld->base.builder,
vec_type, "");
vec_type, "addr");
break;
case TGSI_FILE_PREDICATE:
assert(idx < LP_MAX_TGSI_PREDS);
for (i = 0; i < NUM_CHANNELS; i++)
bld->preds[idx][i] = lp_build_alloca(bld->base.builder,
vec_type, "");
vec_type, "predicate");
break;
default:
@ -1740,6 +1968,10 @@ emit_instruction(
break;
case TGSI_OPCODE_END:
if (0) {
/* for debugging */
emit_dump_temps(bld);
}
*pc = -1;
break;
@ -2082,6 +2314,7 @@ lp_build_tgsi_soa(LLVMBuilderRef builder,
memset(&bld, 0, sizeof bld);
lp_build_context_init(&bld.base, builder, type);
lp_build_context_init(&bld.uint_bld, builder, lp_uint_type(type));
lp_build_context_init(&bld.elem_bld, builder, lp_elem_type(type));
bld.mask = mask;
bld.pos = pos;
bld.inputs = inputs;
@ -2100,6 +2333,48 @@ lp_build_tgsi_soa(LLVMBuilderRef builder,
lp_exec_mask_init(&bld.exec_mask, &bld.base);
if (bld.indirect_files & (1 << TGSI_FILE_TEMPORARY)) {
LLVMValueRef array_size = LLVMConstInt(LLVMInt32Type(),
info->file_max[TGSI_FILE_TEMPORARY]*4 + 4, 0);
bld.temps_array = lp_build_array_alloca(bld.base.builder,
bld.base.vec_type, array_size,
"temp_array");
}
if (bld.indirect_files & (1 << TGSI_FILE_OUTPUT)) {
LLVMValueRef array_size = LLVMConstInt(LLVMInt32Type(),
info->file_max[TGSI_FILE_OUTPUT]*4 + 4, 0);
bld.outputs_array = lp_build_array_alloca(bld.base.builder,
bld.base.vec_type, array_size,
"output_array");
}
/* If we have indirect addressing in inputs we need to copy them into
* our alloca array to be able to iterate over them */
if (bld.indirect_files & (1 << TGSI_FILE_INPUT)) {
unsigned index, chan;
LLVMTypeRef vec_type = bld.base.vec_type;
LLVMValueRef array_size = LLVMConstInt(LLVMInt32Type(),
info->file_max[TGSI_FILE_INPUT]*4 + 4, 0);
bld.inputs_array = lp_build_array_alloca(bld.base.builder,
vec_type, array_size,
"input_array");
assert(info->num_inputs <= info->file_max[TGSI_FILE_INPUT] + 1);
for (index = 0; index < info->num_inputs; ++index) {
for (chan = 0; chan < NUM_CHANNELS; ++chan) {
LLVMValueRef lindex = lp_build_const_int32(index * 4 + chan);
LLVMValueRef input_ptr =
LLVMBuildGEP(bld.base.builder, bld.inputs_array,
&lindex, 1, "");
LLVMValueRef value = bld.inputs[index][chan];
if (value)
LLVMBuildStore(bld.base.builder, value, input_ptr);
}
}
}
tgsi_parse_init( &parse, tokens );
while( !tgsi_parse_end_of_tokens( &parse ) ) {
@ -2169,6 +2444,18 @@ lp_build_tgsi_soa(LLVMBuilderRef builder,
opcode_info->mnemonic);
}
/* If we have indirect addressing in outputs we need to copy our alloca array
* to the outputs slots specified by the called */
if (bld.indirect_files & (1 << TGSI_FILE_OUTPUT)) {
unsigned index, chan;
assert(info->num_outputs <= info->file_max[TGSI_FILE_OUTPUT] + 1);
for (index = 0; index < info->num_outputs; ++index) {
for (chan = 0; chan < NUM_CHANNELS; ++chan) {
bld.outputs[index][chan] = get_output_ptr(&bld, index, chan);
}
}
}
if (0) {
LLVMBasicBlockRef block = LLVMGetInsertBlock(builder);
LLVMValueRef function = LLVMGetBasicBlockParent(block);

16
src/gallium/auxiliary/gallivm/lp_bld_type.c
View file

@ -187,6 +187,22 @@ lp_build_int32_vec4_type(void)
}
/**
* Create element of vector type
*/
struct lp_type
lp_elem_type(struct lp_type type)
{
struct lp_type res_type;
assert(type.length > 1);
res_type = type;
res_type.length = 1;
return res_type;
}
/**
* Create unsigned integer type variation of given type.
*/

4
src/gallium/auxiliary/gallivm/lp_bld_type.h
View file

@ -364,6 +364,10 @@ lp_unorm8_vec4_type(void)
}
struct lp_type
lp_elem_type(struct lp_type type);
struct lp_type
lp_uint_type(struct lp_type type);

2
src/gallium/auxiliary/os/os_stream_stdc.c
View file

@ -106,7 +106,7 @@ os_file_stream_create(const char *filename)
stream->base.flush = &os_stdc_stream_flush;
stream->base.vprintf = &os_stdc_stream_vprintf;
stream->file = fopen(filename, "w");
stream->file = fopen(filename, "wb");
if(!stream->file)
goto no_file;

18
src/gallium/auxiliary/pipebuffer/SConscript
View file

@ -1,18 +0,0 @@
Import('*')
pipebuffer = env.ConvenienceLibrary(
target = 'pipebuffer',
source = [
'pb_buffer_fenced.c',
'pb_buffer_malloc.c',
'pb_bufmgr_alt.c',
'pb_bufmgr_cache.c',
'pb_bufmgr_debug.c',
'pb_bufmgr_mm.c',
'pb_bufmgr_ondemand.c',
'pb_bufmgr_pool.c',
'pb_bufmgr_slab.c',
'pb_validate.c',
])
auxiliaries.insert(0, pipebuffer)

736
src/gallium/auxiliary/tgsi/tgsi_build.c
View file

@ -63,17 +63,6 @@ header_bodysize_grow( struct tgsi_header *header )
header->BodySize++;
}
struct tgsi_processor
tgsi_default_processor( void )
{
struct tgsi_processor processor;
processor.Processor = TGSI_PROCESSOR_FRAGMENT;
processor.Padding = 0;
return processor;
}
struct tgsi_processor
tgsi_build_processor(
unsigned type,
@ -81,8 +70,8 @@ tgsi_build_processor(
{
struct tgsi_processor processor;
processor = tgsi_default_processor();
processor.Processor = type;
processor.Padding = 0;
header_headersize_grow( header );
@ -93,7 +82,19 @@ tgsi_build_processor(
* declaration
*/
struct tgsi_declaration
static void
declaration_grow(
struct tgsi_declaration *declaration,
struct tgsi_header *header )
{
assert( declaration->NrTokens < 0xFF );
declaration->NrTokens++;
header_bodysize_grow( header );
}
static struct tgsi_declaration
tgsi_default_declaration( void )
{
struct tgsi_declaration declaration;
@ -112,7 +113,7 @@ tgsi_default_declaration( void )
return declaration;
}
struct tgsi_declaration
static struct tgsi_declaration
tgsi_build_declaration(
unsigned file,
unsigned usage_mask,
@ -144,16 +145,85 @@ tgsi_build_declaration(
return declaration;
}
static void
declaration_grow(
static struct tgsi_declaration_range
tgsi_default_declaration_range( void )
{
struct tgsi_declaration_range dr;
dr.First = 0;
dr.Last = 0;
return dr;
}
static struct tgsi_declaration_range
tgsi_build_declaration_range(
unsigned first,
unsigned last,
struct tgsi_declaration *declaration,
struct tgsi_header *header )
{
assert( declaration->NrTokens < 0xFF );
struct tgsi_declaration_range declaration_range;
declaration->NrTokens++;
assert( last >= first );
assert( last <= 0xFFFF );
header_bodysize_grow( header );
declaration_range.First = first;
declaration_range.Last = last;
declaration_grow( declaration, header );
return declaration_range;
}
static struct tgsi_declaration_dimension
tgsi_build_declaration_dimension(unsigned index_2d,
struct tgsi_declaration *declaration,
struct tgsi_header *header)
{
struct tgsi_declaration_dimension dd;
assert(index_2d <= 0xFFFF);
dd.Index2D = index_2d;
dd.Padding = 0;
declaration_grow(declaration, header);
return dd;
}
static struct tgsi_declaration_semantic
tgsi_default_declaration_semantic( void )
{
struct tgsi_declaration_semantic ds;
ds.Name = TGSI_SEMANTIC_POSITION;
ds.Index = 0;
ds.Padding = 0;
return ds;
}
static struct tgsi_declaration_semantic
tgsi_build_declaration_semantic(
unsigned semantic_name,
unsigned semantic_index,
struct tgsi_declaration *declaration,
struct tgsi_header *header )
{
struct tgsi_declaration_semantic ds;
assert( semantic_name <= TGSI_SEMANTIC_COUNT );
assert( semantic_index <= 0xFFFF );
ds.Name = semantic_name;
ds.Index = semantic_index;
ds.Padding = 0;
declaration_grow( declaration, header );
return ds;
}
struct tgsi_full_declaration
@ -257,104 +327,11 @@ tgsi_build_full_declaration(
return size;
}
struct tgsi_declaration_range
tgsi_default_declaration_range( void )
{
struct tgsi_declaration_range dr;
dr.First = 0;
dr.Last = 0;
return dr;
}
struct tgsi_declaration_range
tgsi_build_declaration_range(
unsigned first,
unsigned last,
struct tgsi_declaration *declaration,
struct tgsi_header *header )
{
struct tgsi_declaration_range declaration_range;
assert( last >= first );
assert( last <= 0xFFFF );
declaration_range = tgsi_default_declaration_range();
declaration_range.First = first;
declaration_range.Last = last;
declaration_grow( declaration, header );
return declaration_range;
}
struct tgsi_declaration_dimension
tgsi_default_declaration_dimension(void)
{
struct tgsi_declaration_dimension dd;
dd.Index2D = 0;
dd.Padding = 0;
return dd;
}
struct tgsi_declaration_dimension
tgsi_build_declaration_dimension(unsigned index_2d,
struct tgsi_declaration *declaration,
struct tgsi_header *header)
{
struct tgsi_declaration_dimension dd;
assert(index_2d <= 0xFFFF);
dd = tgsi_default_declaration_dimension();
dd.Index2D = index_2d;
declaration_grow(declaration, header);
return dd;
}
struct tgsi_declaration_semantic
tgsi_default_declaration_semantic( void )
{
struct tgsi_declaration_semantic ds;
ds.Name = TGSI_SEMANTIC_POSITION;
ds.Index = 0;
ds.Padding = 0;
return ds;
}
struct tgsi_declaration_semantic
tgsi_build_declaration_semantic(
unsigned semantic_name,
unsigned semantic_index,
struct tgsi_declaration *declaration,
struct tgsi_header *header )
{
struct tgsi_declaration_semantic ds;
assert( semantic_name <= TGSI_SEMANTIC_COUNT );
assert( semantic_index <= 0xFFFF );
ds = tgsi_default_declaration_semantic();
ds.Name = semantic_name;
ds.Index = semantic_index;
declaration_grow( declaration, header );
return ds;
}
/*
* immediate
*/
struct tgsi_immediate
static struct tgsi_immediate
tgsi_default_immediate( void )
{
struct tgsi_immediate immediate;
@ -367,7 +344,7 @@ tgsi_default_immediate( void )
return immediate;
}
struct tgsi_immediate
static struct tgsi_immediate
tgsi_build_immediate(
struct tgsi_header *header )
{
@ -406,7 +383,7 @@ immediate_grow(
header_bodysize_grow( header );
}
union tgsi_immediate_data
static union tgsi_immediate_data
tgsi_build_immediate_float32(
float value,
struct tgsi_immediate *immediate,
@ -480,7 +457,7 @@ tgsi_default_instruction( void )
return instruction;
}
struct tgsi_instruction
static struct tgsi_instruction
tgsi_build_instruction(unsigned opcode,
unsigned saturate,
unsigned predicate,
@ -519,6 +496,266 @@ instruction_grow(
header_bodysize_grow( header );
}
struct tgsi_instruction_predicate
tgsi_default_instruction_predicate(void)
{
struct tgsi_instruction_predicate instruction_predicate;
instruction_predicate.SwizzleX = TGSI_SWIZZLE_X;
instruction_predicate.SwizzleY = TGSI_SWIZZLE_Y;
instruction_predicate.SwizzleZ = TGSI_SWIZZLE_Z;
instruction_predicate.SwizzleW = TGSI_SWIZZLE_W;
instruction_predicate.Negate = 0;
instruction_predicate.Index = 0;
instruction_predicate.Padding = 0;
return instruction_predicate;
}
static struct tgsi_instruction_predicate
tgsi_build_instruction_predicate(int index,
unsigned negate,
unsigned swizzleX,
unsigned swizzleY,
unsigned swizzleZ,
unsigned swizzleW,
struct tgsi_instruction *instruction,
struct tgsi_header *header)
{
struct tgsi_instruction_predicate instruction_predicate;
instruction_predicate = tgsi_default_instruction_predicate();
instruction_predicate.SwizzleX = swizzleX;
instruction_predicate.SwizzleY = swizzleY;
instruction_predicate.SwizzleZ = swizzleZ;
instruction_predicate.SwizzleW = swizzleW;
instruction_predicate.Negate = negate;
instruction_predicate.Index = index;
instruction_grow(instruction, header);
return instruction_predicate;
}
static struct tgsi_instruction_label
tgsi_default_instruction_label( void )
{
struct tgsi_instruction_label instruction_label;
instruction_label.Label = 0;
instruction_label.Padding = 0;
return instruction_label;
}
static struct tgsi_instruction_label
tgsi_build_instruction_label(
unsigned label,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_instruction_label instruction_label;
instruction_label.Label = label;
instruction_label.Padding = 0;
instruction->Label = 1;
instruction_grow( instruction, header );
return instruction_label;
}
static struct tgsi_instruction_texture
tgsi_default_instruction_texture( void )
{
struct tgsi_instruction_texture instruction_texture;
instruction_texture.Texture = TGSI_TEXTURE_UNKNOWN;
instruction_texture.Padding = 0;
return instruction_texture;
}
static struct tgsi_instruction_texture
tgsi_build_instruction_texture(
unsigned texture,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_instruction_texture instruction_texture;
instruction_texture.Texture = texture;
instruction_texture.Padding = 0;
instruction->Texture = 1;
instruction_grow( instruction, header );
return instruction_texture;
}
static struct tgsi_src_register
tgsi_default_src_register( void )
{
struct tgsi_src_register src_register;
src_register.File = TGSI_FILE_NULL;
src_register.SwizzleX = TGSI_SWIZZLE_X;
src_register.SwizzleY = TGSI_SWIZZLE_Y;
src_register.SwizzleZ = TGSI_SWIZZLE_Z;
src_register.SwizzleW = TGSI_SWIZZLE_W;
src_register.Negate = 0;
src_register.Absolute = 0;
src_register.Indirect = 0;
src_register.Dimension = 0;
src_register.Index = 0;
return src_register;
}
static struct tgsi_src_register
tgsi_build_src_register(
unsigned file,
unsigned swizzle_x,
unsigned swizzle_y,
unsigned swizzle_z,
unsigned swizzle_w,
unsigned negate,
unsigned absolute,
unsigned indirect,
unsigned dimension,
int index,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_src_register src_register;
assert( file < TGSI_FILE_COUNT );
assert( swizzle_x <= TGSI_SWIZZLE_W );
assert( swizzle_y <= TGSI_SWIZZLE_W );
assert( swizzle_z <= TGSI_SWIZZLE_W );
assert( swizzle_w <= TGSI_SWIZZLE_W );
assert( negate <= 1 );
assert( index >= -0x8000 && index <= 0x7FFF );
src_register.File = file;
src_register.SwizzleX = swizzle_x;
src_register.SwizzleY = swizzle_y;
src_register.SwizzleZ = swizzle_z;
src_register.SwizzleW = swizzle_w;
src_register.Negate = negate;
src_register.Absolute = absolute;
src_register.Indirect = indirect;
src_register.Dimension = dimension;
src_register.Index = index;
instruction_grow( instruction, header );
return src_register;
}
static struct tgsi_dimension
tgsi_default_dimension( void )
{
struct tgsi_dimension dimension;
dimension.Indirect = 0;
dimension.Dimension = 0;
dimension.Padding = 0;
dimension.Index = 0;
return dimension;
}
static struct tgsi_full_src_register
tgsi_default_full_src_register( void )
{
struct tgsi_full_src_register full_src_register;
full_src_register.Register = tgsi_default_src_register();
full_src_register.Indirect = tgsi_default_src_register();
full_src_register.Dimension = tgsi_default_dimension();
full_src_register.DimIndirect = tgsi_default_src_register();
return full_src_register;
}
static struct tgsi_dimension
tgsi_build_dimension(
unsigned indirect,
unsigned index,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_dimension dimension;
dimension.Indirect = indirect;
dimension.Dimension = 0;
dimension.Padding = 0;
dimension.Index = index;
instruction_grow( instruction, header );
return dimension;
}
static struct tgsi_dst_register
tgsi_default_dst_register( void )
{
struct tgsi_dst_register dst_register;
dst_register.File = TGSI_FILE_NULL;
dst_register.WriteMask = TGSI_WRITEMASK_XYZW;
dst_register.Indirect = 0;
dst_register.Dimension = 0;
dst_register.Index = 0;
dst_register.Padding = 0;
return dst_register;
}
static struct tgsi_dst_register
tgsi_build_dst_register(
unsigned file,
unsigned mask,
unsigned indirect,
unsigned dimension,
int index,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_dst_register dst_register;
assert( file < TGSI_FILE_COUNT );
assert( mask <= TGSI_WRITEMASK_XYZW );
assert( index >= -32768 && index <= 32767 );
dst_register.File = file;
dst_register.WriteMask = mask;
dst_register.Indirect = indirect;
dst_register.Dimension = dimension;
dst_register.Index = index;
dst_register.Padding = 0;
instruction_grow( instruction, header );
return dst_register;
}
static struct tgsi_full_dst_register
tgsi_default_full_dst_register( void )
{
struct tgsi_full_dst_register full_dst_register;
full_dst_register.Register = tgsi_default_dst_register();
full_dst_register.Indirect = tgsi_default_src_register();
full_dst_register.Dimension = tgsi_default_dimension();
full_dst_register.DimIndirect = tgsi_default_src_register();
return full_dst_register;
}
struct tgsi_full_instruction
tgsi_default_full_instruction( void )
{
@ -794,268 +1031,7 @@ tgsi_build_full_instruction(
return size;
}
struct tgsi_instruction_predicate
tgsi_default_instruction_predicate(void)
{
struct tgsi_instruction_predicate instruction_predicate;
instruction_predicate.SwizzleX = TGSI_SWIZZLE_X;
instruction_predicate.SwizzleY = TGSI_SWIZZLE_Y;
instruction_predicate.SwizzleZ = TGSI_SWIZZLE_Z;
instruction_predicate.SwizzleW = TGSI_SWIZZLE_W;
instruction_predicate.Negate = 0;
instruction_predicate.Index = 0;
instruction_predicate.Padding = 0;
return instruction_predicate;
}
struct tgsi_instruction_predicate
tgsi_build_instruction_predicate(int index,
unsigned negate,
unsigned swizzleX,
unsigned swizzleY,
unsigned swizzleZ,
unsigned swizzleW,
struct tgsi_instruction *instruction,
struct tgsi_header *header)
{
struct tgsi_instruction_predicate instruction_predicate;
instruction_predicate = tgsi_default_instruction_predicate();
instruction_predicate.SwizzleX = swizzleX;
instruction_predicate.SwizzleY = swizzleY;
instruction_predicate.SwizzleZ = swizzleZ;
instruction_predicate.SwizzleW = swizzleW;
instruction_predicate.Negate = negate;
instruction_predicate.Index = index;
instruction_grow(instruction, header);
return instruction_predicate;
}
struct tgsi_instruction_label
tgsi_default_instruction_label( void )
{
struct tgsi_instruction_label instruction_label;
instruction_label.Label = 0;
instruction_label.Padding = 0;
return instruction_label;
}
struct tgsi_instruction_label
tgsi_build_instruction_label(
unsigned label,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_instruction_label instruction_label;
instruction_label = tgsi_default_instruction_label();
instruction_label.Label = label;
instruction->Label = 1;
instruction_grow( instruction, header );
return instruction_label;
}
struct tgsi_instruction_texture
tgsi_default_instruction_texture( void )
{
struct tgsi_instruction_texture instruction_texture;
instruction_texture.Texture = TGSI_TEXTURE_UNKNOWN;
instruction_texture.Padding = 0;
return instruction_texture;
}
struct tgsi_instruction_texture
tgsi_build_instruction_texture(
unsigned texture,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_instruction_texture instruction_texture;
instruction_texture = tgsi_default_instruction_texture();
instruction_texture.Texture = texture;
instruction->Texture = 1;
instruction_grow( instruction, header );
return instruction_texture;
}
struct tgsi_src_register
tgsi_default_src_register( void )
{
struct tgsi_src_register src_register;
src_register.File = TGSI_FILE_NULL;
src_register.SwizzleX = TGSI_SWIZZLE_X;
src_register.SwizzleY = TGSI_SWIZZLE_Y;
src_register.SwizzleZ = TGSI_SWIZZLE_Z;
src_register.SwizzleW = TGSI_SWIZZLE_W;
src_register.Negate = 0;
src_register.Absolute = 0;
src_register.Indirect = 0;
src_register.Dimension = 0;
src_register.Index = 0;
return src_register;
}
struct tgsi_src_register
tgsi_build_src_register(
unsigned file,
unsigned swizzle_x,
unsigned swizzle_y,
unsigned swizzle_z,
unsigned swizzle_w,
unsigned negate,
unsigned absolute,
unsigned indirect,
unsigned dimension,
int index,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_src_register src_register;
assert( file < TGSI_FILE_COUNT );
assert( swizzle_x <= TGSI_SWIZZLE_W );
assert( swizzle_y <= TGSI_SWIZZLE_W );
assert( swizzle_z <= TGSI_SWIZZLE_W );
assert( swizzle_w <= TGSI_SWIZZLE_W );
assert( negate <= 1 );
assert( index >= -0x8000 && index <= 0x7FFF );
src_register = tgsi_default_src_register();
src_register.File = file;
src_register.SwizzleX = swizzle_x;
src_register.SwizzleY = swizzle_y;
src_register.SwizzleZ = swizzle_z;
src_register.SwizzleW = swizzle_w;
src_register.Negate = negate;
src_register.Absolute = absolute;
src_register.Indirect = indirect;
src_register.Dimension = dimension;
src_register.Index = index;
instruction_grow( instruction, header );
return src_register;
}
struct tgsi_full_src_register
tgsi_default_full_src_register( void )
{
struct tgsi_full_src_register full_src_register;
full_src_register.Register = tgsi_default_src_register();
full_src_register.Indirect = tgsi_default_src_register();
full_src_register.Dimension = tgsi_default_dimension();
full_src_register.DimIndirect = tgsi_default_src_register();
return full_src_register;
}
struct tgsi_dimension
tgsi_default_dimension( void )
{
struct tgsi_dimension dimension;
dimension.Indirect = 0;
dimension.Dimension = 0;
dimension.Padding = 0;
dimension.Index = 0;
return dimension;
}
struct tgsi_dimension
tgsi_build_dimension(
unsigned indirect,
unsigned index,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_dimension dimension;
dimension = tgsi_default_dimension();
dimension.Indirect = indirect;
dimension.Index = index;
instruction_grow( instruction, header );
return dimension;
}
struct tgsi_dst_register
tgsi_default_dst_register( void )
{
struct tgsi_dst_register dst_register;
dst_register.File = TGSI_FILE_NULL;
dst_register.WriteMask = TGSI_WRITEMASK_XYZW;
dst_register.Indirect = 0;
dst_register.Dimension = 0;
dst_register.Index = 0;
dst_register.Padding = 0;
return dst_register;
}
struct tgsi_dst_register
tgsi_build_dst_register(
unsigned file,
unsigned mask,
unsigned indirect,
unsigned dimension,
int index,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_dst_register dst_register;
assert( file < TGSI_FILE_COUNT );
assert( mask <= TGSI_WRITEMASK_XYZW );
assert( index >= -32768 && index <= 32767 );
dst_register = tgsi_default_dst_register();
dst_register.File = file;
dst_register.WriteMask = mask;
dst_register.Index = index;
dst_register.Indirect = indirect;
dst_register.Dimension = dimension;
instruction_grow( instruction, header );
return dst_register;
}
struct tgsi_full_dst_register
tgsi_default_full_dst_register( void )
{
struct tgsi_full_dst_register full_dst_register;
full_dst_register.Register = tgsi_default_dst_register();
full_dst_register.Indirect = tgsi_default_src_register();
full_dst_register.Dimension = tgsi_default_dimension();
full_dst_register.DimIndirect = tgsi_default_src_register();
return full_dst_register;
}
struct tgsi_property
static struct tgsi_property
tgsi_default_property( void )
{
struct tgsi_property property;
@ -1068,7 +1044,7 @@ tgsi_default_property( void )
return property;
}
struct tgsi_property
static struct tgsi_property
tgsi_build_property(unsigned property_name,
struct tgsi_header *header)
{
@ -1107,7 +1083,7 @@ property_grow(
header_bodysize_grow( header );
}
struct tgsi_property_data
static struct tgsi_property_data
tgsi_build_property_data(
unsigned value,
struct tgsi_property *property,

161
src/gallium/auxiliary/tgsi/tgsi_build.h
View file

@ -44,9 +44,6 @@ extern "C" {
struct tgsi_header
tgsi_build_header( void );
struct tgsi_processor
tgsi_default_processor( void );
struct tgsi_processor
tgsi_build_processor(
unsigned processor,
@ -56,21 +53,6 @@ tgsi_build_processor(
* declaration
*/
struct tgsi_declaration
tgsi_default_declaration( void );
struct tgsi_declaration
tgsi_build_declaration(
unsigned file,
unsigned usage_mask,
unsigned interpolate,
unsigned dimension,
unsigned semantic,
unsigned centroid,
unsigned invariant,
unsigned cylindrical_wrap,
struct tgsi_header *header );
struct tgsi_full_declaration
tgsi_default_full_declaration( void );
@ -81,54 +63,13 @@ tgsi_build_full_declaration(
struct tgsi_header *header,
unsigned maxsize );
struct tgsi_declaration_range
tgsi_default_declaration_range( void );
struct tgsi_declaration_range
tgsi_build_declaration_range(
unsigned first,
unsigned last,
struct tgsi_declaration *declaration,
struct tgsi_header *header );
struct tgsi_declaration_dimension
tgsi_default_declaration_dimension(void);
struct tgsi_declaration_dimension
tgsi_build_declaration_dimension(unsigned index_2d,
struct tgsi_declaration *declaration,
struct tgsi_header *header);
struct tgsi_declaration_semantic
tgsi_default_declaration_semantic( void );
struct tgsi_declaration_semantic
tgsi_build_declaration_semantic(
unsigned semantic_name,
unsigned semantic_index,
struct tgsi_declaration *declaration,
struct tgsi_header *header );
/*
* immediate
*/
struct tgsi_immediate
tgsi_default_immediate( void );
struct tgsi_immediate
tgsi_build_immediate(
struct tgsi_header *header );
struct tgsi_full_immediate
tgsi_default_full_immediate( void );
union tgsi_immediate_data
tgsi_build_immediate_float32(
float value,
struct tgsi_immediate *immediate,
struct tgsi_header *header );
unsigned
tgsi_build_full_immediate(
const struct tgsi_full_immediate *full_imm,
@ -140,23 +81,9 @@ tgsi_build_full_immediate(
* properties
*/
struct tgsi_property
tgsi_default_property( void );
struct tgsi_property
tgsi_build_property(
unsigned property_name,
struct tgsi_header *header );
struct tgsi_full_property
tgsi_default_full_property( void );
struct tgsi_property_data
tgsi_build_property_data(
unsigned value,
struct tgsi_property *property,
struct tgsi_header *header );
unsigned
tgsi_build_full_property(
const struct tgsi_full_property *full_prop,
@ -171,15 +98,6 @@ tgsi_build_full_property(
struct tgsi_instruction
tgsi_default_instruction( void );
struct tgsi_instruction
tgsi_build_instruction(
unsigned opcode,
unsigned saturate,
unsigned predicate,
unsigned num_dst_regs,
unsigned num_src_regs,
struct tgsi_header *header );
struct tgsi_full_instruction
tgsi_default_full_instruction( void );
@ -193,85 +111,6 @@ tgsi_build_full_instruction(
struct tgsi_instruction_predicate
tgsi_default_instruction_predicate(void);
struct tgsi_instruction_predicate
tgsi_build_instruction_predicate(int index,
unsigned negate,
unsigned swizzleX,
unsigned swizzleY,
unsigned swizzleZ,
unsigned swizzleW,
struct tgsi_instruction *instruction,
struct tgsi_header *header);
struct tgsi_instruction_label
tgsi_default_instruction_label( void );
struct tgsi_instruction_label
tgsi_build_instruction_label(
unsigned label,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_instruction_texture
tgsi_default_instruction_texture( void );
struct tgsi_instruction_texture
tgsi_build_instruction_texture(
unsigned texture,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_src_register
tgsi_default_src_register( void );
struct tgsi_src_register
tgsi_build_src_register(
unsigned file,
unsigned swizzle_x,
unsigned swizzle_y,
unsigned swizzle_z,
unsigned swizzle_w,
unsigned negate,
unsigned absolute,
unsigned indirect,
unsigned dimension,
int index,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_full_src_register
tgsi_default_full_src_register( void );
struct tgsi_dimension
tgsi_default_dimension( void );
struct tgsi_dimension
tgsi_build_dimension(
unsigned indirect,
unsigned index,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_dst_register
tgsi_default_dst_register( void );
struct tgsi_dst_register
tgsi_build_dst_register(
unsigned file,
unsigned mask,
unsigned indirect,
unsigned dimension,
int index,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_full_dst_register
tgsi_default_full_dst_register( void );
#if defined __cplusplus
}
#endif

801
src/gallium/auxiliary/tgsi/tgsi_exec.c
View file

@ -428,6 +428,24 @@ micro_sne(union tgsi_exec_channel *dst,
dst->f[3] = src0->f[3] != src1->f[3] ? 1.0f : 0.0f;
}
static void
micro_sfl(union tgsi_exec_channel *dst)
{
dst->f[0] = 0.0f;
dst->f[1] = 0.0f;
dst->f[2] = 0.0f;
dst->f[3] = 0.0f;
}
static void
micro_str(union tgsi_exec_channel *dst)
{
dst->f[0] = 1.0f;
dst->f[1] = 1.0f;
dst->f[2] = 1.0f;
dst->f[3] = 1.0f;
}
static void
micro_trunc(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src)
@ -453,50 +471,12 @@ enum tgsi_exec_datatype {
/*
* Shorthand locations of various utility registers (_I = Index, _C = Channel)
*/
#define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
#define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
#define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
#define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
#define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
#define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
#define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
#define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
#define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
#define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
#define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
#define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
#define TEMP_128_I TGSI_EXEC_TEMP_128_I
#define TEMP_128_C TGSI_EXEC_TEMP_128_C
#define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
#define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
#define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
#define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
#define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
#define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
#define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
#define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
#define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
#define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
#define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
#define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
#define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
#define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
#define TEMP_R0 TGSI_EXEC_TEMP_R0
#define TEMP_P0 TGSI_EXEC_TEMP_P0
#define IS_CHANNEL_ENABLED(INST, CHAN)\
((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IS_CHANNEL_ENABLED2(INST, CHAN)\
((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
#define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
if (IS_CHANNEL_ENABLED( INST, CHAN ))
#define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
if (IS_CHANNEL_ENABLED2( INST, CHAN ))
/** The execution mask depends on the conditional mask and the loop mask */
@ -511,6 +491,14 @@ static const union tgsi_exec_channel OneVec = {
{1.0f, 1.0f, 1.0f, 1.0f}
};
static const union tgsi_exec_channel P128Vec = {
{128.0f, 128.0f, 128.0f, 128.0f}
};
static const union tgsi_exec_channel M128Vec = {
{-128.0f, -128.0f, -128.0f, -128.0f}
};
/**
* Assert that none of the float values in 'chan' are infinite or NaN.
@ -572,8 +560,6 @@ tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
}
/**
* Check if there's a potential src/dst register data dependency when
* using SOA execution.
@ -607,18 +593,20 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
inst->Dst[0].Register.File) &&
((inst->Src[i].Register.Index ==
inst->Dst[0].Register.Index) ||
inst->Src[i].Register.Indirect ||
inst->Dst[0].Register.Indirect)) {
inst->Src[i].Register.Indirect ||
inst->Dst[0].Register.Indirect)) {
/* loop over dest channels */
uint channelsWritten = 0x0;
FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
/* check if we're reading a channel that's been written */
uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
if (channelsWritten & (1 << swizzle)) {
return TRUE;
}
for (chan = 0; chan < NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
/* check if we're reading a channel that's been written */
uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
if (channelsWritten & (1 << swizzle)) {
return TRUE;
}
channelsWritten |= (1 << chan);
channelsWritten |= (1 << chan);
}
}
}
}
@ -813,18 +801,18 @@ tgsi_exec_machine_create( void )
mach->MaxGeometryShaderOutputs = TGSI_MAX_TOTAL_VERTICES;
mach->Predicates = &mach->Temps[TGSI_EXEC_TEMP_P0];
/* Setup constants. */
/* Setup constants needed by the SSE2 executor. */
for( i = 0; i < 4; i++ ) {
mach->Temps[TEMP_0_I].xyzw[TEMP_0_C].u[i] = 0x00000000;
mach->Temps[TEMP_7F_I].xyzw[TEMP_7F_C].u[i] = 0x7FFFFFFF;
mach->Temps[TEMP_80_I].xyzw[TEMP_80_C].u[i] = 0x80000000;
mach->Temps[TEMP_FF_I].xyzw[TEMP_FF_C].u[i] = 0xFFFFFFFF;
mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].f[i] = 1.0f;
mach->Temps[TEMP_2_I].xyzw[TEMP_2_C].f[i] = 2.0f;
mach->Temps[TEMP_128_I].xyzw[TEMP_128_C].f[i] = 128.0f;
mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C].f[i] = -128.0f;
mach->Temps[TEMP_3_I].xyzw[TEMP_3_C].f[i] = 3.0f;
mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C].f[i] = 0.5f;
mach->Temps[TGSI_EXEC_TEMP_00000000_I].xyzw[TGSI_EXEC_TEMP_00000000_C].u[i] = 0x00000000;
mach->Temps[TGSI_EXEC_TEMP_7FFFFFFF_I].xyzw[TGSI_EXEC_TEMP_7FFFFFFF_C].u[i] = 0x7FFFFFFF;
mach->Temps[TGSI_EXEC_TEMP_80000000_I].xyzw[TGSI_EXEC_TEMP_80000000_C].u[i] = 0x80000000;
mach->Temps[TGSI_EXEC_TEMP_FFFFFFFF_I].xyzw[TGSI_EXEC_TEMP_FFFFFFFF_C].u[i] = 0xFFFFFFFF; /* not used */
mach->Temps[TGSI_EXEC_TEMP_ONE_I].xyzw[TGSI_EXEC_TEMP_ONE_C].f[i] = 1.0f;
mach->Temps[TGSI_EXEC_TEMP_TWO_I].xyzw[TGSI_EXEC_TEMP_TWO_C].f[i] = 2.0f; /* not used */
mach->Temps[TGSI_EXEC_TEMP_128_I].xyzw[TGSI_EXEC_TEMP_128_C].f[i] = 128.0f;
mach->Temps[TGSI_EXEC_TEMP_MINUS_128_I].xyzw[TGSI_EXEC_TEMP_MINUS_128_C].f[i] = -128.0f;
mach->Temps[TGSI_EXEC_TEMP_THREE_I].xyzw[TGSI_EXEC_TEMP_THREE_C].f[i] = 3.0f;
mach->Temps[TGSI_EXEC_TEMP_HALF_I].xyzw[TGSI_EXEC_TEMP_HALF_C].f[i] = 0.5f;
}
#ifdef DEBUG
@ -886,27 +874,35 @@ micro_div(
}
static void
micro_float_clamp(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src)
micro_rcc(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src)
{
uint i;
for (i = 0; i < 4; i++) {
if (src->f[i] > 0.0f) {
if (src->f[i] > 1.884467e+019f)
float recip = 1.0f / src->f[i];
if (recip > 0.0f) {
if (recip > 1.884467e+019f) {
dst->f[i] = 1.884467e+019f;
else if (src->f[i] < 5.42101e-020f)
}
else if (recip < 5.42101e-020f) {
dst->f[i] = 5.42101e-020f;
else
dst->f[i] = src->f[i];
}
else {
dst->f[i] = recip;
}
}
else {
if (src->f[i] < -1.884467e+019f)
if (recip < -1.884467e+019f) {
dst->f[i] = -1.884467e+019f;
else if (src->f[i] > -5.42101e-020f)
}
else if (recip > -5.42101e-020f) {
dst->f[i] = -5.42101e-020f;
else
dst->f[i] = src->f[i];
}
else {
dst->f[i] = recip;
}
}
}
}
@ -958,60 +954,6 @@ micro_mul(union tgsi_exec_channel *dst,
dst->f[3] = src0->f[3] * src1->f[3];
}
#if 0
static void
micro_imul64(
union tgsi_exec_channel *dst0,
union tgsi_exec_channel *dst1,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1 )
{
dst1->i[0] = src0->i[0] * src1->i[0];
dst1->i[1] = src0->i[1] * src1->i[1];
dst1->i[2] = src0->i[2] * src1->i[2];
dst1->i[3] = src0->i[3] * src1->i[3];
dst0->i[0] = 0;
dst0->i[1] = 0;
dst0->i[2] = 0;
dst0->i[3] = 0;
}
#endif
#if 0
static void
micro_umul64(
union tgsi_exec_channel *dst0,
union tgsi_exec_channel *dst1,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1 )
{
dst1->u[0] = src0->u[0] * src1->u[0];
dst1->u[1] = src0->u[1] * src1->u[1];
dst1->u[2] = src0->u[2] * src1->u[2];
dst1->u[3] = src0->u[3] * src1->u[3];
dst0->u[0] = 0;
dst0->u[1] = 0;
dst0->u[2] = 0;
dst0->u[3] = 0;
}
#endif
#if 0
static void
micro_movc(
union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1,
const union tgsi_exec_channel *src2 )
{
dst->u[0] = src0->u[0] ? src1->u[0] : src2->u[0];
dst->u[1] = src0->u[1] ? src1->u[1] : src2->u[1];
dst->u[2] = src0->u[2] ? src1->u[2] : src2->u[2];
dst->u[3] = src0->u[3] ? src1->u[3] : src2->u[3];
}
#endif
static void
micro_neg(
union tgsi_exec_channel *dst,
@ -1607,9 +1549,6 @@ store_dest(struct tgsi_exec_machine *mach,
#define FETCH(VAL,INDEX,CHAN)\
fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
#define STORE(VAL,INDEX,CHAN)\
store_dest(mach, VAL, &inst->Dst[INDEX], inst, CHAN, TGSI_EXEC_DATA_FLOAT)
/**
* Execute ARB-style KIL which is predicated by a src register.
@ -1753,7 +1692,7 @@ exec_tex(struct tgsi_exec_machine *mach,
union tgsi_exec_channel r[4];
const union tgsi_exec_channel *lod = &ZeroVec;
enum tgsi_sampler_control control;
uint chan_index;
uint chan;
if (modifier != TEX_MODIFIER_NONE) {
FETCH(&r[3], 0, CHAN_W);
@ -1825,8 +1764,10 @@ exec_tex(struct tgsi_exec_machine *mach,
assert(0);
}
FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
STORE(&r[chan_index], 0, chan_index);
for (chan = 0; chan < NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
}
}
@ -1836,7 +1777,7 @@ exec_txd(struct tgsi_exec_machine *mach,
{
const uint unit = inst->Src[3].Register.Index;
union tgsi_exec_channel r[4];
uint chan_index;
uint chan;
/*
* XXX: This is fake TXD -- the derivatives are not taken into account, yet.
@ -1886,8 +1827,10 @@ exec_txd(struct tgsi_exec_machine *mach,
assert(0);
}
FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
STORE(&r[chan_index], 0, chan_index);
for (chan = 0; chan < NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
}
}
@ -2021,6 +1964,26 @@ exec_declaration(struct tgsi_exec_machine *mach,
}
}
typedef void (* micro_op)(union tgsi_exec_channel *dst);
static void
exec_vector(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst,
micro_op op,
enum tgsi_exec_datatype dst_datatype)
{
unsigned int chan;
for (chan = 0; chan < NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
union tgsi_exec_channel dst;
op(&dst);
store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
}
}
}
typedef void (* micro_unary_op)(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src);
@ -2073,6 +2036,27 @@ typedef void (* micro_binary_op)(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1);
static void
exec_scalar_binary(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst,
micro_binary_op op,
enum tgsi_exec_datatype dst_datatype,
enum tgsi_exec_datatype src_datatype)
{
unsigned int chan;
union tgsi_exec_channel src[2];
union tgsi_exec_channel dst;
fetch_source(mach, &src[0], &inst->Src[0], CHAN_X, src_datatype);
fetch_source(mach, &src[1], &inst->Src[1], CHAN_Y, src_datatype);
op(&dst, &src[0], &src[1]);
for (chan = 0; chan < NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
}
}
}
static void
exec_vector_binary(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst,
@ -2319,6 +2303,289 @@ exec_nrm3(struct tgsi_exec_machine *mach,
}
}
static void
exec_scs(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) {
union tgsi_exec_channel arg;
union tgsi_exec_channel result;
fetch_source(mach, &arg, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
micro_cos(&result, &arg);
store_dest(mach, &result, &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
micro_sin(&result, &arg);
store_dest(mach, &result, &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
store_dest(mach, &ZeroVec, &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_x2d(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[4];
union tgsi_exec_channel d[2];
fetch_source(mach, &r[0], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
fetch_source(mach, &r[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XZ) {
fetch_source(mach, &r[2], &inst->Src[2], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[2], &r[2], &r[0]);
fetch_source(mach, &r[3], &inst->Src[2], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
fetch_source(mach, &r[3], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_add(&d[0], &r[2], &r[3]);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_YW) {
fetch_source(mach, &r[2], &inst->Src[2], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[2], &r[2], &r[0]);
fetch_source(mach, &r[3], &inst->Src[2], CHAN_W, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
fetch_source(mach, &r[3], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_add(&d[1], &r[2], &r[3]);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
store_dest(mach, &d[0], &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
store_dest(mach, &d[1], &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
store_dest(mach, &d[0], &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &d[1], &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_rfl(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[9];
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {
/* r0 = dp3(src0, src0) */
fetch_source(mach, &r[2], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[0], &r[2], &r[2]);
fetch_source(mach, &r[4], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[8], &r[4], &r[4]);
micro_add(&r[0], &r[0], &r[8]);
fetch_source(mach, &r[6], &inst->Src[0], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[8], &r[6], &r[6]);
micro_add(&r[0], &r[0], &r[8]);
/* r1 = dp3(src0, src1) */
fetch_source(mach, &r[3], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[1], &r[2], &r[3]);
fetch_source(mach, &r[5], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[8], &r[4], &r[5]);
micro_add(&r[1], &r[1], &r[8]);
fetch_source(mach, &r[7], &inst->Src[1], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[8], &r[6], &r[7]);
micro_add(&r[1], &r[1], &r[8]);
/* r1 = 2 * r1 / r0 */
micro_add(&r[1], &r[1], &r[1]);
micro_div(&r[1], &r[1], &r[0]);
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
micro_mul(&r[2], &r[2], &r[1]);
micro_sub(&r[2], &r[2], &r[3]);
store_dest(mach, &r[2], &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
micro_mul(&r[4], &r[4], &r[1]);
micro_sub(&r[4], &r[4], &r[5]);
store_dest(mach, &r[4], &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
micro_mul(&r[6], &r[6], &r[1]);
micro_sub(&r[6], &r[6], &r[7]);
store_dest(mach, &r[6], &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_xpd(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[6];
union tgsi_exec_channel d[3];
fetch_source(mach, &r[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
fetch_source(mach, &r[1], &inst->Src[1], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[2], &r[0], &r[1]);
fetch_source(mach, &r[3], &inst->Src[0], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
fetch_source(mach, &r[4], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[5], &r[3], &r[4] );
micro_sub(&d[CHAN_X], &r[2], &r[5]);
fetch_source(mach, &r[2], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[3], &r[3], &r[2]);
fetch_source(mach, &r[5], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[1], &r[1], &r[5]);
micro_sub(&d[CHAN_Y], &r[3], &r[1]);
micro_mul(&r[5], &r[5], &r[4]);
micro_mul(&r[0], &r[0], &r[2]);
micro_sub(&d[CHAN_Z], &r[5], &r[0]);
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
store_dest(mach, &d[CHAN_X], &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
store_dest(mach, &d[CHAN_Y], &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
store_dest(mach, &d[CHAN_Z], &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_dst(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[2];
union tgsi_exec_channel d[4];
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
fetch_source(mach, &r[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
fetch_source(mach, &r[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_mul(&d[CHAN_Y], &r[0], &r[1]);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
fetch_source(mach, &d[CHAN_Z], &inst->Src[0], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
fetch_source(mach, &d[CHAN_W], &inst->Src[1], CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
store_dest(mach, &d[CHAN_Y], &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
store_dest(mach, &d[CHAN_Z], &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &d[CHAN_W], &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_log(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[3];
fetch_source(mach, &r[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_abs(&r[2], &r[0]); /* r2 = abs(r0) */
micro_lg2(&r[1], &r[2]); /* r1 = lg2(r2) */
micro_flr(&r[0], &r[1]); /* r0 = floor(r1) */
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
store_dest(mach, &r[0], &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
micro_exp2(&r[0], &r[0]); /* r0 = 2 ^ r0 */
micro_div(&r[0], &r[2], &r[0]); /* r0 = r2 / r0 */
store_dest(mach, &r[0], &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
store_dest(mach, &r[1], &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_exp(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[3];
fetch_source(mach, &r[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_flr(&r[1], &r[0]); /* r1 = floor(r0) */
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
micro_exp2(&r[2], &r[1]); /* r2 = 2 ^ r1 */
store_dest(mach, &r[2], &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
micro_sub(&r[2], &r[0], &r[1]); /* r2 = r0 - r1 */
store_dest(mach, &r[2], &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
micro_exp2(&r[2], &r[0]); /* r2 = 2 ^ r0 */
store_dest(mach, &r[2], &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_lit(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[3];
union tgsi_exec_channel d[3];
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_YZ) {
fetch_source(mach, &r[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
micro_max(&d[CHAN_Y], &r[0], &ZeroVec);
store_dest(mach, &d[CHAN_Y], &inst->Dst[0], inst, CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
fetch_source(mach, &r[1], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_max(&r[1], &r[1], &ZeroVec);
fetch_source(mach, &r[2], &inst->Src[0], CHAN_W, TGSI_EXEC_DATA_FLOAT);
micro_min(&r[2], &r[2], &P128Vec);
micro_max(&r[2], &r[2], &M128Vec);
micro_pow(&r[1], &r[1], &r[2]);
micro_lt(&d[CHAN_Z], &ZeroVec, &r[0], &r[1], &ZeroVec);
store_dest(mach, &d[CHAN_Z], &inst->Dst[0], inst, CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_break(struct tgsi_exec_machine *mach)
{
@ -2702,9 +2969,7 @@ exec_instruction(
const struct tgsi_full_instruction *inst,
int *pc )
{
uint chan_index;
union tgsi_exec_channel r[10];
union tgsi_exec_channel d[8];
(*pc)++;
@ -2718,36 +2983,7 @@ exec_instruction(
break;
case TGSI_OPCODE_LIT:
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y ) || IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
FETCH( &r[0], 0, CHAN_X );
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
micro_max(&d[CHAN_Y], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
FETCH( &r[1], 0, CHAN_Y );
micro_max( &r[1], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
FETCH( &r[2], 0, CHAN_W );
micro_min( &r[2], &r[2], &mach->Temps[TEMP_128_I].xyzw[TEMP_128_C] );
micro_max( &r[2], &r[2], &mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C] );
micro_pow( &r[1], &r[1], &r[2] );
micro_lt(&d[CHAN_Z], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
STORE(&d[CHAN_Y], 0, CHAN_Y);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
STORE(&d[CHAN_Z], 0, CHAN_Z);
}
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
}
exec_lit(mach, inst);
break;
case TGSI_OPCODE_RCP:
@ -2759,44 +2995,11 @@ exec_instruction(
break;
case TGSI_OPCODE_EXP:
FETCH( &r[0], 0, CHAN_X );
micro_flr( &r[1], &r[0] ); /* r1 = floor(r0) */
if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
micro_exp2( &r[2], &r[1] ); /* r2 = 2 ^ r1 */
STORE( &r[2], 0, CHAN_X ); /* store r2 */
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
micro_sub( &r[2], &r[0], &r[1] ); /* r2 = r0 - r1 */
STORE( &r[2], 0, CHAN_Y ); /* store r2 */
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
micro_exp2( &r[2], &r[0] ); /* r2 = 2 ^ r0 */
STORE( &r[2], 0, CHAN_Z ); /* store r2 */
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
}
exec_exp(mach, inst);
break;
case TGSI_OPCODE_LOG:
FETCH( &r[0], 0, CHAN_X );
micro_abs( &r[2], &r[0] ); /* r2 = abs(r0) */
micro_lg2( &r[1], &r[2] ); /* r1 = lg2(r2) */
micro_flr( &r[0], &r[1] ); /* r0 = floor(r1) */
if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
STORE( &r[0], 0, CHAN_X );
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
micro_exp2( &r[0], &r[0] ); /* r0 = 2 ^ r0 */
micro_div( &r[0], &r[2], &r[0] ); /* r0 = r2 / r0 */
STORE( &r[0], 0, CHAN_Y );
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
STORE( &r[1], 0, CHAN_Z );
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
}
exec_log(mach, inst);
break;
case TGSI_OPCODE_MUL:
@ -2816,30 +3019,7 @@ exec_instruction(
break;
case TGSI_OPCODE_DST:
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
FETCH( &r[0], 0, CHAN_Y );
FETCH( &r[1], 1, CHAN_Y);
micro_mul(&d[CHAN_Y], &r[0], &r[1]);
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
FETCH(&d[CHAN_Z], 0, CHAN_Z);
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
FETCH(&d[CHAN_W], 1, CHAN_W);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
STORE(&d[CHAN_Y], 0, CHAN_Y);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
STORE(&d[CHAN_Z], 0, CHAN_Z);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
STORE(&d[CHAN_W], 0, CHAN_W);
}
exec_dst(mach, inst);
break;
case TGSI_OPCODE_MIN:
@ -2903,53 +3083,11 @@ exec_instruction(
break;
case TGSI_OPCODE_POW:
FETCH(&r[0], 0, CHAN_X);
FETCH(&r[1], 1, CHAN_X);
micro_pow( &r[0], &r[0], &r[1] );
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
STORE( &r[0], 0, chan_index );
}
exec_scalar_binary(mach, inst, micro_pow, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
break;
case TGSI_OPCODE_XPD:
FETCH(&r[0], 0, CHAN_Y);
FETCH(&r[1], 1, CHAN_Z);
micro_mul( &r[2], &r[0], &r[1] );
FETCH(&r[3], 0, CHAN_Z);
FETCH(&r[4], 1, CHAN_Y);
micro_mul( &r[5], &r[3], &r[4] );
micro_sub(&d[CHAN_X], &r[2], &r[5]);
FETCH(&r[2], 1, CHAN_X);
micro_mul( &r[3], &r[3], &r[2] );
FETCH(&r[5], 0, CHAN_X);
micro_mul( &r[1], &r[1], &r[5] );
micro_sub(&d[CHAN_Y], &r[3], &r[1]);
micro_mul( &r[5], &r[5], &r[4] );
micro_mul( &r[0], &r[0], &r[2] );
micro_sub(&d[CHAN_Z], &r[5], &r[0]);
if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
STORE(&d[CHAN_X], 0, CHAN_X);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
STORE(&d[CHAN_Y], 0, CHAN_Y);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
STORE(&d[CHAN_Z], 0, CHAN_Z);
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
}
exec_xpd(mach, inst);
break;
case TGSI_OPCODE_ABS:
@ -2957,12 +3095,7 @@ exec_instruction(
break;
case TGSI_OPCODE_RCC:
FETCH(&r[0], 0, CHAN_X);
micro_div(&r[0], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &r[0]);
micro_float_clamp(&r[0], &r[0]);
FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
STORE(&r[0], 0, chan_index);
}
exec_scalar_unary(mach, inst, micro_rcc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
break;
case TGSI_OPCODE_DPH:
@ -3006,52 +3139,7 @@ exec_instruction(
break;
case TGSI_OPCODE_RFL:
if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
/* r0 = dp3(src0, src0) */
FETCH(&r[2], 0, CHAN_X);
micro_mul(&r[0], &r[2], &r[2]);
FETCH(&r[4], 0, CHAN_Y);
micro_mul(&r[8], &r[4], &r[4]);
micro_add(&r[0], &r[0], &r[8]);
FETCH(&r[6], 0, CHAN_Z);
micro_mul(&r[8], &r[6], &r[6]);
micro_add(&r[0], &r[0], &r[8]);
/* r1 = dp3(src0, src1) */
FETCH(&r[3], 1, CHAN_X);
micro_mul(&r[1], &r[2], &r[3]);
FETCH(&r[5], 1, CHAN_Y);
micro_mul(&r[8], &r[4], &r[5]);
micro_add(&r[1], &r[1], &r[8]);
FETCH(&r[7], 1, CHAN_Z);
micro_mul(&r[8], &r[6], &r[7]);
micro_add(&r[1], &r[1], &r[8]);
/* r1 = 2 * r1 / r0 */
micro_add(&r[1], &r[1], &r[1]);
micro_div(&r[1], &r[1], &r[0]);
if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
micro_mul(&r[2], &r[2], &r[1]);
micro_sub(&r[2], &r[2], &r[3]);
STORE(&r[2], 0, CHAN_X);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
micro_mul(&r[4], &r[4], &r[1]);
micro_sub(&r[4], &r[4], &r[5]);
STORE(&r[4], 0, CHAN_Y);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
micro_mul(&r[6], &r[6], &r[1]);
micro_sub(&r[6], &r[6], &r[7]);
STORE(&r[6], 0, CHAN_Z);
}
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W);
}
exec_rfl(mach, inst);
break;
case TGSI_OPCODE_SEQ:
@ -3059,9 +3147,7 @@ exec_instruction(
break;
case TGSI_OPCODE_SFL:
FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
STORE(&mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, chan_index);
}
exec_vector(mach, inst, micro_sfl, TGSI_EXEC_DATA_FLOAT);
break;
case TGSI_OPCODE_SGT:
@ -3081,9 +3167,7 @@ exec_instruction(
break;
case TGSI_OPCODE_STR:
FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, chan_index);
}
exec_vector(mach, inst, micro_str, TGSI_EXEC_DATA_FLOAT);
break;
case TGSI_OPCODE_TEX:
@ -3140,42 +3224,7 @@ exec_instruction(
break;
case TGSI_OPCODE_X2D:
FETCH(&r[0], 1, CHAN_X);
FETCH(&r[1], 1, CHAN_Y);
if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
FETCH(&r[2], 2, CHAN_X);
micro_mul(&r[2], &r[2], &r[0]);
FETCH(&r[3], 2, CHAN_Y);
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
FETCH(&r[3], 0, CHAN_X);
micro_add(&d[CHAN_X], &r[2], &r[3]);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
FETCH(&r[2], 2, CHAN_Z);
micro_mul(&r[2], &r[2], &r[0]);
FETCH(&r[3], 2, CHAN_W);
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
FETCH(&r[3], 0, CHAN_Y);
micro_add(&d[CHAN_Y], &r[2], &r[3]);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
STORE(&d[CHAN_X], 0, CHAN_X);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
STORE(&d[CHAN_Y], 0, CHAN_Y);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
STORE(&d[CHAN_X], 0, CHAN_Z);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
STORE(&d[CHAN_Y], 0, CHAN_W);
}
exec_x2d(mach, inst);
break;
case TGSI_OPCODE_ARA:
@ -3283,23 +3332,7 @@ exec_instruction(
break;
case TGSI_OPCODE_SCS:
if( IS_CHANNEL_ENABLED( *inst, CHAN_X ) || IS_CHANNEL_ENABLED( *inst, CHAN_Y ) ) {
FETCH( &r[0], 0, CHAN_X );
if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
micro_cos(&r[1], &r[0]);
STORE(&r[1], 0, CHAN_X);
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
micro_sin(&r[1], &r[0]);
STORE(&r[1], 0, CHAN_Y);
}
}
if( IS_CHANNEL_ENABLED( *inst, CHAN_Z ) ) {
STORE( &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, CHAN_Z );
}
if( IS_CHANNEL_ENABLED( *inst, CHAN_W ) ) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
}
exec_scs(mach, inst);
break;
case TGSI_OPCODE_NRM:
@ -3684,14 +3717,6 @@ tgsi_exec_machine_run( struct tgsi_exec_machine *mach )
mach->Primitives[0] = 0;
}
for (i = 0; i < QUAD_SIZE; i++) {
mach->Temps[TEMP_CC_I].xyzw[TEMP_CC_C].u[i] =
(TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_X_SHIFT) |
(TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Y_SHIFT) |
(TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Z_SHIFT) |
(TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_W_SHIFT);
}
/* execute declarations (interpolants) */
for (i = 0; i < mach->NumDeclarations; i++) {
exec_declaration( mach, mach->Declarations+i );

27
src/gallium/auxiliary/tgsi/tgsi_exec.h
View file

@ -131,34 +131,15 @@ struct tgsi_sampler
#define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
#define TGSI_EXEC_TEMP_PRIMITIVE_C 2
/* NVIDIA condition code (CC) vector
*/
#define TGSI_EXEC_CC_GT 0x01
#define TGSI_EXEC_CC_EQ 0x02
#define TGSI_EXEC_CC_LT 0x04
#define TGSI_EXEC_CC_UN 0x08
#define TGSI_EXEC_CC_X_MASK 0x000000ff
#define TGSI_EXEC_CC_X_SHIFT 0
#define TGSI_EXEC_CC_Y_MASK 0x0000ff00
#define TGSI_EXEC_CC_Y_SHIFT 8
#define TGSI_EXEC_CC_Z_MASK 0x00ff0000
#define TGSI_EXEC_CC_Z_SHIFT 16
#define TGSI_EXEC_CC_W_MASK 0xff000000
#define TGSI_EXEC_CC_W_SHIFT 24
#define TGSI_EXEC_TEMP_CC_I (TGSI_EXEC_NUM_TEMPS + 2)
#define TGSI_EXEC_TEMP_CC_C 3
#define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 3)
#define TGSI_EXEC_TEMP_THREE_C 0
#define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
#define TGSI_EXEC_TEMP_THREE_C 3
#define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
#define TGSI_EXEC_TEMP_HALF_C 1
#define TGSI_EXEC_TEMP_HALF_C 0
/* execution mask, each value is either 0 or ~0 */
#define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3)
#define TGSI_EXEC_MASK_C 2
#define TGSI_EXEC_MASK_C 1
/* 4 register buffer for various purposes */
#define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)

2
src/gallium/drivers/failover/SConscript
View file

@ -10,4 +10,6 @@ failover = env.ConvenienceLibrary(
'fo_context.c',
])
env.Alias('failover', failover)
Export('failover')

4
src/gallium/drivers/galahad/SConscript
View file

@ -3,11 +3,13 @@ Import('*')
env = env.Clone()
galahad = env.ConvenienceLibrary(
target = 'identity',
target = 'galahad',
source = [
'glhd_context.c',
'glhd_objects.c',
'glhd_screen.c',
])
env.Alias('galahad', galahad)
Export('galahad')

6
src/gallium/drivers/i915/SConscript
View file

@ -2,10 +2,6 @@ Import('*')
env = env.Clone()
if msvc:
print 'warning: not building i915g'
Return()
i915 = env.ConvenienceLibrary(
target = 'i915',
source = [
@ -34,4 +30,6 @@ i915 = env.ConvenienceLibrary(
'i915_resource_texture.c',
])
env.Alias('i915', i915)
Export('i915')

4
src/gallium/drivers/i965/SConscript
View file

@ -2,10 +2,6 @@ Import('*')
env = env.Clone()
if msvc:
print 'warning: not building i965g'
Return();
i965 = env.ConvenienceLibrary(
target = 'i965',
source = [

65
src/gallium/drivers/llvmpipe/README
View file

@ -1,53 +1,6 @@
LLVMPIPE -- a fork of softpipe that employs LLVM for code generation.
Status
======
Done so far is:
- the whole fragment pipeline is code generated in a single function
- input interpolation
- depth testing
- texture sampling
- 1D/2D/3D/cube maps supported
- all texture wrap modes supported
- all texture filtering modes supported
- perhaps not all texture formats yet supported
- fragment shader TGSI translation
- same level of support as the TGSI SSE2 exec machine, with the exception
we don't fallback to TGSI interpretation when an unsupported opcode is
found, but just ignore it
- done in SoA layout
- input interpolation also code generated
- alpha testing
- blend (including logic ops)
- both in SoA and AoS layouts, but only the former used for now
- code is generic
- intermediates can be vectors of floats, ubytes, fixed point, etc, and of
any width and length
- not all operations are implemented for these types yet though
Most mesa/progs/demos/* work.
To do (probably by this order):
- code generate stipple and stencil testing
- translate TGSI control flow instructions, and all other remaining opcodes
- integrate with the draw module for VS code generation
- code generate the triangle setup and rasterization
Requirements
============
@ -98,7 +51,7 @@ Building
To build everything on Linux invoke scons as:
scons debug=yes statetrackers=mesa drivers=llvmpipe winsys=xlib dri=false
scons build=debug libgl-xlib
Alternatively, you can build it with GNU make, if you prefer, by invoking it as
@ -108,19 +61,16 @@ but the rest of these instructions assume that scons is used.
For windows is everything the except except the winsys:
scons debug=yes statetrackers=mesa drivers=llvmpipe winsys=gdi dri=false
scons build=debug libgl-gdi
Using
=====
On Linux, building will create a drop-in alternative for libGL.so. To use it
set the environment variables:
On Linux, building will create a drop-in alternative for libGL.so into
export LD_LIBRARY_PATH=$PWD/build/linux-x86_64-debug/lib:$LD_LIBRARY_PATH
build/foo/gallium/targets/libgl-xlib/libGL.so
or
export LD_LIBRARY_PATH=$PWD/build/linux-x86-debug/lib:$LD_LIBRARY_PATH
To use it set the LD_LIBRARY_PATH environment variable accordingly.
For performance evaluation pass debug=no to scons, and use the corresponding
lib directory without the "-debug" suffix.
@ -136,7 +86,7 @@ Profiling
To profile llvmpipe you should pass the options
scons debug=no profile=yes <same-as-before>
scons build=profile <same-as-before>
This will ensure that frame pointers are used both in C and JIT functions, and
that no tail call optimizations are done by gcc.
@ -200,5 +150,4 @@ Development Notes
interfaces very closely, and appear to be complete enough for code
generation. See
http://npcontemplation.blogspot.com/2008/06/secret-of-llvm-c-bindings.html
for a stand-alone example.
See the llvm-c/Core.h file for reference.
for a stand-alone example. See the llvm-c/Core.h file for reference.

6
src/gallium/drivers/llvmpipe/SConscript
View file

@ -9,8 +9,6 @@ if not env['llvm']:
env = env.Clone()
env.Tool('udis86')
env.Append(CPPPATH = ['.'])
env.CodeGenerate(
@ -78,6 +76,8 @@ llvmpipe = env.ConvenienceLibrary(
lp_tile_soa_os,
])
env.Alias('llvmpipe', llvmpipe)
if env['platform'] != 'embedded':
env = env.Clone()
@ -92,7 +92,7 @@ if env['platform'] != 'embedded':
'sincos',
]
if not msvc:
if not env['msvc']:
tests.append('round')
for test in tests:

7
src/gallium/drivers/llvmpipe/lp_rast.c
View file

@ -485,8 +485,11 @@ static void
lp_rast_end_query(struct lp_rasterizer_task *task,
const union lp_rast_cmd_arg arg)
{
task->query->count[task->thread_index] += task->vis_counter;
task->query = NULL;
assert(task->query);
if (task->query) {
task->query->count[task->thread_index] += task->vis_counter;
task->query = NULL;
}
}

15
src/gallium/drivers/llvmpipe/lp_setup_line.c
View file

@ -569,7 +569,10 @@ try_setup_line( struct lp_setup_context *setup,
return TRUE;
}
u_rect_find_intersection(&setup->draw_region, &bbox);
/* Can safely discard negative regions:
*/
bbox.x0 = MAX2(bbox.x0, 0);
bbox.y0 = MAX2(bbox.y0, 0);
line = lp_setup_alloc_triangle(scene,
key->num_inputs,
@ -680,24 +683,26 @@ try_setup_line( struct lp_setup_context *setup,
* these planes elsewhere.
*/
if (nr_planes == 8) {
const struct u_rect *scissor = &setup->scissor;
plane[4].dcdx = -1;
plane[4].dcdy = 0;
plane[4].c = 1-bbox.x0;
plane[4].c = 1-scissor->x0;
plane[4].eo = 1;
plane[5].dcdx = 1;
plane[5].dcdy = 0;
plane[5].c = bbox.x1+1;
plane[5].c = scissor->x1+1;
plane[5].eo = 0;
plane[6].dcdx = 0;
plane[6].dcdy = 1;
plane[6].c = 1-bbox.y0;
plane[6].c = 1-scissor->y0;
plane[6].eo = 1;
plane[7].dcdx = 0;
plane[7].dcdy = -1;
plane[7].c = bbox.y1+1;
plane[7].c = scissor->y1+1;
plane[7].eo = 0;
}

44
src/gallium/drivers/llvmpipe/lp_setup_tri.c
View file

@ -295,7 +295,12 @@ do_triangle_ccw(struct lp_setup_context *setup,
return TRUE;
}
u_rect_find_intersection(&setup->draw_region, &bbox);
/* Can safely discard negative regions, but need to keep hold of
* information about when the triangle extends past screen
* boundaries. See trimmed_box in lp_setup_bin_triangle().
*/
bbox.x0 = MAX2(bbox.x0, 0);
bbox.y0 = MAX2(bbox.y0, 0);
tri = lp_setup_alloc_triangle(scene,
key->num_inputs,
@ -501,24 +506,26 @@ do_triangle_ccw(struct lp_setup_context *setup,
* these planes elsewhere.
*/
if (nr_planes == 7) {
const struct u_rect *scissor = &setup->scissor;
plane[3].dcdx = -1;
plane[3].dcdy = 0;
plane[3].c = 1-bbox.x0;
plane[3].c = 1-scissor->x0;
plane[3].eo = 1;
plane[4].dcdx = 1;
plane[4].dcdy = 0;
plane[4].c = bbox.x1+1;
plane[4].c = scissor->x1+1;
plane[4].eo = 0;
plane[5].dcdx = 0;
plane[5].dcdy = 1;
plane[5].c = 1-bbox.y0;
plane[5].c = 1-scissor->y0;
plane[5].eo = 1;
plane[6].dcdx = 0;
plane[6].dcdy = -1;
plane[6].c = bbox.y1+1;
plane[6].c = scissor->y1+1;
plane[6].eo = 0;
}
@ -559,6 +566,7 @@ lp_setup_bin_triangle( struct lp_setup_context *setup,
int nr_planes )
{
struct lp_scene *scene = setup->scene;
struct u_rect trimmed_box = *bbox;
int i;
/* What is the largest power-of-two boundary this triangle crosses:
@ -572,6 +580,13 @@ lp_setup_bin_triangle( struct lp_setup_context *setup,
int sz = floor_pot((bbox->x1 - (bbox->x0 & ~3)) |
(bbox->y1 - (bbox->y0 & ~3)));
/* Now apply scissor, etc to the bounding box. Could do this
* earlier, but it confuses the logic for tri-16 and would force
* the rasterizer to also respect scissor, etc, just for the rare
* cases where a small triangle extends beyond the scissor.
*/
u_rect_find_intersection(&setup->draw_region, &trimmed_box);
/* Determine which tile(s) intersect the triangle's bounding box
*/
if (dx < TILE_SIZE)
@ -626,15 +641,16 @@ lp_setup_bin_triangle( struct lp_setup_context *setup,
struct lp_rast_plane *plane = GET_PLANES(tri);
int c[MAX_PLANES];
int ei[MAX_PLANES];
int eo[MAX_PLANES];
int xstep[MAX_PLANES];
int ystep[MAX_PLANES];
int x, y;
int ix0 = bbox->x0 / TILE_SIZE;
int iy0 = bbox->y0 / TILE_SIZE;
int ix1 = bbox->x1 / TILE_SIZE;
int iy1 = bbox->y1 / TILE_SIZE;
int ix0 = trimmed_box.x0 / TILE_SIZE;
int iy0 = trimmed_box.y0 / TILE_SIZE;
int ix1 = trimmed_box.x1 / TILE_SIZE;
int iy1 = trimmed_box.y1 / TILE_SIZE;
for (i = 0; i < nr_planes; i++) {
c[i] = (plane[i].c +
@ -799,6 +815,16 @@ static void triangle_both( struct lp_setup_context *setup,
{
float area = calc_area(v0, v1, v2);
if (0) {
assert(!util_is_inf_or_nan(v0[0][0]));
assert(!util_is_inf_or_nan(v0[0][1]));
assert(!util_is_inf_or_nan(v1[0][0]));
assert(!util_is_inf_or_nan(v1[0][1]));
assert(!util_is_inf_or_nan(v2[0][0]));
assert(!util_is_inf_or_nan(v2[0][1]));
assert(!util_is_inf_or_nan(area));
}
if (area > 0.0f)
retry_triangle_ccw( setup, v0, v1, v2, setup->ccw_is_frontface );
else if (area < 0.0f)

9
src/gallium/drivers/llvmpipe/lp_state_fs.c
View file

@ -761,11 +761,6 @@ generate_fragment(struct llvmpipe_screen *screen,
}
}
#ifdef PIPE_ARCH_X86
/* Avoid corrupting the FPU stack on 32bit OSes. */
lp_build_intrinsic(builder, "llvm.x86.mmx.emms", LLVMVoidType(), NULL, 0);
#endif
LLVMBuildRetVoid(builder);
LLVMDisposeBuilder(builder);
@ -1067,11 +1062,11 @@ llvmpipe_bind_fs_state(struct pipe_context *pipe, void *fs)
draw_flush(llvmpipe->draw);
llvmpipe->fs = (struct lp_fragment_shader *) fs;
draw_bind_fragment_shader(llvmpipe->draw,
(llvmpipe->fs ? llvmpipe->fs->draw_data : NULL));
llvmpipe->fs = fs;
llvmpipe->dirty |= LP_NEW_FS;
}

3
src/gallium/drivers/nv50/nv50_shader_state.c
View file

@ -39,6 +39,9 @@ nv50_transfer_constbuf(struct nv50_context *nv50,
uint32_t *map;
unsigned count, start;
if (buf == NULL)
return;
map = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &transfer);
if (!map)
return;

4
src/gallium/drivers/nvfx/nvfx_screen.c
View file

@ -78,6 +78,10 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return 1;
case PIPE_CAP_DEPTH_CLAMP:
return 0; // TODO: implement depth clamp
case PIPE_CAP_PRIMITIVE_RESTART:
return 0; // TODO: implement primitive restart
case PIPE_CAP_SHADER_STENCIL_EXPORT:
return 0;
default:
NOUVEAU_ERR("Warning: unknown PIPE_CAP %d\n", param);
return 0;

2
src/gallium/drivers/r300/SConscript
View file

@ -39,5 +39,7 @@ r300 = env.ConvenienceLibrary(
'r300_transfer.c',
] + r300compiler) + r300compiler
env.Alias('r300', r300)
Export('r300')

4
src/gallium/drivers/r300/r300_blit.c
View file

@ -176,12 +176,12 @@ static void r300_clear(struct pipe_context* pipe,
fb->zsbuf ? r300_texture(fb->zsbuf->texture) : NULL;
uint32_t width = fb->width;
uint32_t height = fb->height;
boolean has_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
uint32_t hyperz_dcv = hyperz->zb_depthclearvalue;
/* Enable fast Z clear.
* The zbuffer must be in micro-tiled mode, otherwise it locks up. */
if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && has_hyperz) {
if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && can_hyperz) {
hyperz_dcv = hyperz->zb_depthclearvalue =
r300_depth_clear_value(fb->zsbuf->format, depth, stencil);

4
src/gallium/drivers/r300/r300_context.c
View file

@ -184,7 +184,7 @@ static void r300_setup_atoms(struct r300_context* r300)
boolean has_tcl = r300->screen->caps.has_tcl;
boolean drm_2_3_0 = r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
boolean drm_2_6_0 = r300->rws->get_value(r300->rws, R300_VID_DRM_2_6_0);
boolean has_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
boolean has_hiz_ram = r300->screen->caps.hiz_ram > 0;
/* Create the actual atom list.
@ -240,7 +240,7 @@ static void r300_setup_atoms(struct r300_context* r300)
/* TX. */
R300_INIT_ATOM(texture_cache_inval, 2);
R300_INIT_ATOM(textures_state, 0);
if (has_hyperz) {
if (can_hyperz) {
/* HiZ Clear */
if (has_hiz_ram)
R300_INIT_ATOM(hiz_clear, 0);

4
src/gallium/drivers/r300/r300_emit.c
View file

@ -358,7 +358,7 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
struct r300_surface* surf;
unsigned i;
boolean has_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
CS_LOCALS(r300);
BEGIN_CS(size);
@ -411,7 +411,7 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain);
if (has_hyperz) {
if (can_hyperz) {
uint32_t surf_pitch;
struct r300_texture *tex;
int level = surf->base.level;

32
src/gallium/drivers/r300/r300_hyperz.c
View file

@ -44,10 +44,10 @@
static bool r300_get_sc_hz_max(struct r300_context *r300)
{
struct r300_dsa_state *dsa_state = r300->dsa_state.state;
int func = dsa_state->z_stencil_control & 0x7;
int func = dsa_state->z_stencil_control & R300_ZS_MASK;
int ret = R300_SC_HYPERZ_MIN;
if (func >= 4 && func <= 7)
if (func >= R300_ZS_GEQUAL && func <= R300_ZS_ALWAYS)
ret = R300_SC_HYPERZ_MAX;
return ret;
}
@ -55,23 +55,26 @@ static bool r300_get_sc_hz_max(struct r300_context *r300)
static bool r300_zfunc_same_direction(int func1, int func2)
{
/* func1 is less/lessthan */
if (func1 == 1 || func1 == 2)
if (func2 == 3 || func2 == 4 || func2 == 5)
if ((func1 == R300_ZS_LESS || func1 == R300_ZS_LEQUAL) &&
(func2 == R300_ZS_EQUAL || func2 == R300_ZS_GEQUAL ||
func2 == R300_ZS_GREATER))
return FALSE;
if (func2 == 1 || func2 == 2)
if (func1 == 4 || func1 == 5)
/* func1 is greater/greaterthan */
if ((func1 == R300_ZS_GEQUAL || func1 == R300_ZS_GREATER) &&
(func2 == R300_ZS_LESS || func2 == R300_ZS_LEQUAL))
return FALSE;
return TRUE;
}
static int r300_get_hiz_min(struct r300_context *r300)
{
struct r300_dsa_state *dsa_state = r300->dsa_state.state;
int func = dsa_state->z_stencil_control & 0x7;
int func = dsa_state->z_stencil_control & R300_ZS_MASK;
int ret = R300_HIZ_MIN;
if (func == 1 || func == 2)
if (func == R300_ZS_LESS || func == R300_ZS_LEQUAL)
ret = R300_HIZ_MAX;
return ret;
}
@ -112,13 +115,16 @@ static boolean r300_can_hiz(struct r300_context *r300)
}
/* depth comparison function - if just cleared save and return okay */
if (z->current_func == -1) {
int func = dsa_state->z_stencil_control & 0x7;
int func = dsa_state->z_stencil_control & R300_ZS_MASK;
if (func != 0 && func != 7)
z->current_func = dsa_state->z_stencil_control & 0x7;
z->current_func = dsa_state->z_stencil_control & R300_ZS_MASK;
} else {
/* simple don't change */
if (!r300_zfunc_same_direction(z->current_func, (dsa_state->z_stencil_control & 0x7))) {
DBG(r300, DBG_HYPERZ, "z func changed direction - disabling hyper-z %d -> %d\n", z->current_func, dsa_state->z_stencil_control);
if (!r300_zfunc_same_direction(z->current_func,
(dsa_state->z_stencil_control & R300_ZS_MASK))) {
DBG(r300, DBG_HYPERZ,
"z func changed direction - disabling hyper-z %d -> %d\n",
z->current_func, dsa_state->z_stencil_control);
return FALSE;
}
}

50
src/gallium/drivers/r300/r300_screen.c
View file

@ -44,31 +44,31 @@ static const char* r300_get_vendor(struct pipe_screen* pscreen)
}
static const char* chip_families[] = {
"R300",
"R350",
"R360",
"RV350",
"RV370",
"RV380",
"R420",
"R423",
"R430",
"R480",
"R481",
"RV410",
"RS400",
"RC410",
"RS480",
"RS482",
"RS600",
"RS690",
"RS740",
"RV515",
"R520",
"RV530",
"R580",
"RV560",
"RV570"
"ATI R300",
"ATI R350",
"ATI R360",
"ATI RV350",
"ATI RV370",
"ATI RV380",
"ATI R420",
"ATI R423",
"ATI R430",
"ATI R480",
"ATI R481",
"ATI RV410",
"ATI RS400",
"ATI RC410",
"ATI RS480",
"ATI RS482",
"ATI RS600",
"ATI RS690",
"ATI RS740",
"ATI RV515",
"ATI R520",
"ATI RV530",
"ATI R580",
"ATI RV560",
"ATI RV570"
};
static const char* r300_get_name(struct pipe_screen* pscreen)

10
src/gallium/drivers/r300/r300_state.c
View file

@ -684,7 +684,7 @@ void r300_mark_fb_state_dirty(struct r300_context *r300,
enum r300_fb_state_change change)
{
struct pipe_framebuffer_state *state = r300->fb_state.state;
boolean has_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
/* What is marked as dirty depends on the enum r300_fb_state_change. */
r300->gpu_flush.dirty = TRUE;
@ -703,7 +703,7 @@ void r300_mark_fb_state_dirty(struct r300_context *r300,
r300->fb_state.size += 10;
else if (state->zsbuf) {
r300->fb_state.size += 10;
if (has_hyperz)
if (can_hyperz)
r300->fb_state.size += r300->screen->caps.hiz_ram ? 8 : 4;
}
@ -717,7 +717,7 @@ static void
struct r300_context* r300 = r300_context(pipe);
struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
struct pipe_framebuffer_state *old_state = r300->fb_state.state;
boolean has_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
unsigned max_width, max_height, i;
uint32_t zbuffer_bpp = 0;
int blocksize;
@ -764,7 +764,7 @@ static void
zbuffer_bpp = 24;
break;
}
if (has_hyperz) {
if (can_hyperz) {
struct r300_surface *zs_surf = r300_surface(state->zsbuf);
struct r300_texture *tex;
int compress = r300->screen->caps.is_rv350 ? RV350_Z_COMPRESS_88 : R300_Z_COMPRESS_44;
@ -1789,7 +1789,7 @@ static void r300_set_constant_buffer(struct pipe_context *pipe,
{
struct r300_context* r300 = r300_context(pipe);
struct r300_constant_buffer *cbuf;
uint32_t *mapped = r300_buffer(buf)->user_buffer;
uint32_t *mapped;
switch (shader) {
case PIPE_SHADER_VERTEX:

4
src/gallium/drivers/r600/SConscript
View file

@ -25,10 +25,14 @@ r600 = env.ConvenienceLibrary(
'r600_resource.c',
'r600_shader.c',
'r600_state.c',
'r600_state_common.c',
'r600_texture.c',
'r600_translate.c',
'r700_asm.c',
'evergreen_state.c',
'eg_asm.c',
])
env.Alias('r600', r600)
Export('r600')

2
src/gallium/drivers/r600/eg_state_inlines.h
View file

@ -473,7 +473,7 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format)
case PIPE_FORMAT_UYVY:
case PIPE_FORMAT_YUYV:
default:
R600_ERR("unsupported color format %d\n", format);
//R600_ERR("unsupported color format %d\n", format);
return ~0; /* Unsupported. */
}
}

18
src/gallium/drivers/r600/evergreen_state.c
View file

@ -281,14 +281,21 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
tmp = (unsigned)(state->point_size * 8.0);
r600_pipe_state_add_reg(rstate, R_028A00_PA_SU_POINT_SIZE, S_028A00_HEIGHT(tmp) | S_028A00_WIDTH(tmp), 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028A04_PA_SU_POINT_MINMAX, 0x80000000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028A08_PA_SU_LINE_CNTL, 0x00000008, 0xFFFFFFFF, NULL);
tmp = (unsigned)state->line_width * 8;
r600_pipe_state_add_reg(rstate, R_028A08_PA_SU_LINE_CNTL, S_028A08_WIDTH(tmp), 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C00_PA_SC_LINE_CNTL, 0x00000400, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C0C_PA_CL_GB_VERT_CLIP_ADJ, 0x3F800000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C10_PA_CL_GB_VERT_DISC_ADJ, 0x3F800000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C14_PA_CL_GB_HORZ_CLIP_ADJ, 0x3F800000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C18_PA_CL_GB_HORZ_DISC_ADJ, 0x3F800000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 0x0, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C08_PA_SU_VTX_CNTL, 0x00000005, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C08_PA_SU_VTX_CNTL,
S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules),
0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_02820C_PA_SC_CLIPRECT_RULE, clip_rule, 0xFFFFFFFF, NULL);
return rstate;
}
@ -826,6 +833,13 @@ static void evergreen_set_constant_buffer(struct pipe_context *ctx, uint shader,
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_resource *rbuffer = (struct r600_resource*)buffer;
/* Note that the state tracker can unbind constant buffers by
* passing NULL here.
*/
if (buffer == NULL) {
return;
}
switch (shader) {
case PIPE_SHADER_VERTEX:
rctx->vs_const_buffer.nregs = 0;

6
src/gallium/drivers/r600/evergreend.h
View file

@ -1636,6 +1636,9 @@
#define R_028980_ALU_CONST_CACHE_VS_0 0x00028980
#define R_028A04_PA_SU_POINT_MINMAX 0x00028A04
#define R_028A08_PA_SU_LINE_CNTL 0x00028A08
#define S_028A08_WIDTH(x) (((x) & 0xFFFF) << 0)
#define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF)
#define C_028A08_WIDTH 0xFFFF0000
#define R_028A10_VGT_OUTPUT_PATH_CNTL 0x00028A10
#define R_028A14_VGT_HOS_CNTL 0x00028A14
#define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x00028A18
@ -1687,6 +1690,9 @@
#define R_028C00_PA_SC_LINE_CNTL 0x00028C00
#define R_028C04_PA_SC_AA_CONFIG 0x00028C04
#define R_028C08_PA_SU_VTX_CNTL 0x00028C08
#define S_028C08_PIX_CENTER_HALF(x) (((x) & 0x1) << 0)
#define G_028C08_PIX_CENTER_HALF(x) (((x) >> 0) & 0x1)
#define C_028C08_PIX_CENTER_HALF 0xFFFFFFFE
#define R_028C0C_PA_CL_GB_VERT_CLIP_ADJ 0x00028C0C
#define R_028C10_PA_CL_GB_VERT_DISC_ADJ 0x00028C10
#define R_028C14_PA_CL_GB_HORZ_CLIP_ADJ 0x00028C14

6
src/gallium/drivers/r600/r600.h
View file

@ -43,6 +43,7 @@ typedef uint16_t u16;
typedef uint8_t u8;
struct radeon;
struct winsys_handle;
enum radeon_family {
CHIP_UNKNOWN,
@ -112,13 +113,16 @@ struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon);
/* r600_bo.c */
struct r600_bo;
struct r600_bo *r600_bo(struct radeon *radeon,
unsigned size, unsigned alignment, unsigned usage);
unsigned size, unsigned alignment,
unsigned binding, unsigned usage);
struct r600_bo *r600_bo_handle(struct radeon *radeon,
unsigned handle, unsigned *array_mode);
void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, unsigned usage, void *ctx);
void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo);
void r600_bo_reference(struct radeon *radeon, struct r600_bo **dst,
struct r600_bo *src);
boolean r600_bo_get_winsys_handle(struct radeon *radeon, struct r600_bo *pb_bo,
unsigned stride, struct winsys_handle *whandle);
static INLINE unsigned r600_bo_offset(struct r600_bo *bo)
{
return 0;

34
src/gallium/drivers/r600/r600_buffer.c
View file

@ -38,32 +38,6 @@
extern struct u_resource_vtbl r600_buffer_vtbl;
u32 r600_domain_from_usage(unsigned usage)
{
u32 domain = RADEON_GEM_DOMAIN_GTT;
if (usage & PIPE_BIND_RENDER_TARGET) {
domain |= RADEON_GEM_DOMAIN_VRAM;
}
if (usage & PIPE_BIND_DEPTH_STENCIL) {
domain |= RADEON_GEM_DOMAIN_VRAM;
}
if (usage & PIPE_BIND_SAMPLER_VIEW) {
domain |= RADEON_GEM_DOMAIN_VRAM;
}
/* also need BIND_BLIT_SOURCE/DESTINATION ? */
if (usage & PIPE_BIND_VERTEX_BUFFER) {
domain |= RADEON_GEM_DOMAIN_GTT;
}
if (usage & PIPE_BIND_INDEX_BUFFER) {
domain |= RADEON_GEM_DOMAIN_GTT;
}
if (usage & PIPE_BIND_CONSTANT_BUFFER) {
domain |= RADEON_GEM_DOMAIN_VRAM;
}
return domain;
}
struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
const struct pipe_resource *templ)
@ -85,8 +59,7 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
rbuffer->r.base.b.screen = screen;
rbuffer->r.base.vtbl = &r600_buffer_vtbl;
rbuffer->r.size = rbuffer->r.base.b.width0;
rbuffer->r.domain = r600_domain_from_usage(rbuffer->r.base.b.bind);
bo = r600_bo((struct radeon*)screen->winsys, rbuffer->r.base.b.width0, alignment, rbuffer->r.base.b.bind);
bo = r600_bo((struct radeon*)screen->winsys, rbuffer->r.base.b.width0, alignment, rbuffer->r.base.b.bind, rbuffer->r.base.b.usage);
if (bo == NULL) {
FREE(rbuffer);
return NULL;
@ -156,8 +129,9 @@ static void *r600_buffer_transfer_map(struct pipe_context *pipe,
r600_bo_reference((struct radeon*)pipe->winsys, &rbuffer->r.bo, NULL);
rbuffer->num_ranges = 0;
rbuffer->r.bo = r600_bo((struct radeon*)pipe->winsys,
rbuffer->r.base.b.width0, 0,
rbuffer->r.base.b.bind);
rbuffer->r.base.b.width0, 0,
rbuffer->r.base.b.bind,
rbuffer->r.base.b.usage);
break;
}
}

47
src/gallium/drivers/r600/r600_pipe.c
View file

@ -78,13 +78,16 @@ static void r600_destroy_context(struct pipe_context *context)
{
struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
r600_context_fini(&rctx->ctx);
util_blitter_destroy(rctx->blitter);
for (int i = 0; i < R600_PIPE_NSTATES; i++) {
free(rctx->states[i]);
}
util_blitter_destroy(rctx->blitter);
u_upload_destroy(rctx->upload_vb);
u_upload_destroy(rctx->upload_ib);
@ -219,24 +222,24 @@ static const char* r600_get_vendor(struct pipe_screen* pscreen)
static const char *r600_get_family_name(enum radeon_family family)
{
switch(family) {
case CHIP_R600: return "R600";
case CHIP_RV610: return "RV610";
case CHIP_RV630: return "RV630";
case CHIP_RV670: return "RV670";
case CHIP_RV620: return "RV620";
case CHIP_RV635: return "RV635";
case CHIP_RS780: return "RS780";
case CHIP_RS880: return "RS880";
case CHIP_RV770: return "RV770";
case CHIP_RV730: return "RV730";
case CHIP_RV710: return "RV710";
case CHIP_RV740: return "RV740";
case CHIP_CEDAR: return "CEDAR";
case CHIP_REDWOOD: return "REDWOOD";
case CHIP_JUNIPER: return "JUNIPER";
case CHIP_CYPRESS: return "CYPRESS";
case CHIP_HEMLOCK: return "HEMLOCK";
default: return "unknown";
case CHIP_R600: return "AMD R600";
case CHIP_RV610: return "AMD RV610";
case CHIP_RV630: return "AMD RV630";
case CHIP_RV670: return "AMD RV670";
case CHIP_RV620: return "AMD RV620";
case CHIP_RV635: return "AMD RV635";
case CHIP_RS780: return "AMD RS780";
case CHIP_RS880: return "AMD RS880";
case CHIP_RV770: return "AMD RV770";
case CHIP_RV730: return "AMD RV730";
case CHIP_RV710: return "AMD RV710";
case CHIP_RV740: return "AMD RV740";
case CHIP_CEDAR: return "AMD CEDAR";
case CHIP_REDWOOD: return "AMD REDWOOD";
case CHIP_JUNIPER: return "AMD JUNIPER";
case CHIP_CYPRESS: return "AMD CYPRESS";
case CHIP_HEMLOCK: return "AMD HEMLOCK";
default: return "AMD unknown";
}
}
@ -274,6 +277,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
/* Unsupported features (boolean caps). */
case PIPE_CAP_TIMER_QUERY:
case PIPE_CAP_STREAM_OUTPUT:
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
return 0;
@ -429,6 +433,9 @@ static void r600_destroy_screen(struct pipe_screen* pscreen)
if (rscreen == NULL)
return;
radeon_decref(rscreen->radeon);
FREE(rscreen);
}

7
src/gallium/drivers/r600/r600_resource.h
View file

@ -35,7 +35,7 @@ struct r600_transfer {
/* Buffer transfer. */
struct pipe_transfer *buffer_transfer;
unsigned offset;
struct pipe_resource *linear_texture;
struct pipe_resource *staging_texture;
};
/* This gets further specialized into either buffer or texture
@ -45,8 +45,6 @@ struct r600_transfer {
struct r600_resource {
struct u_resource base;
struct r600_bo *bo;
u32 domain;
u32 flink;
u32 size;
};
@ -68,9 +66,6 @@ struct r600_resource_texture {
void r600_init_screen_resource_functions(struct pipe_screen *screen);
/* r600_buffer */
u32 r600_domain_from_usage(unsigned usage);
/* r600_texture */
struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
const struct pipe_resource *templ);

17
src/gallium/drivers/r600/r600_shader.c
View file

@ -218,7 +218,7 @@ static int r600_pipe_shader(struct pipe_context *ctx, struct r600_pipe_shader *s
/* copy new shader */
if (shader->bo == NULL) {
shader->bo = r600_bo(rctx->radeon, rshader->bc.ndw * 4, 4096, 0);
shader->bo = r600_bo(rctx->radeon, rshader->bc.ndw * 4, 4096, 0, 0);
if (shader->bo == NULL) {
return -ENOMEM;
}
@ -2663,7 +2663,18 @@ static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
int r;
memset(&alu, 0, sizeof(struct r600_bc_alu));
alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR;
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ARL:
alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR;
break;
case TGSI_OPCODE_ARR:
alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA;
break;
default:
assert(0);
return -1;
}
r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
if (r)
@ -3070,7 +3081,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_UP4UB, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_X2D, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ARA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ARR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ARR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_r600_arl},
{TGSI_OPCODE_BRA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_CAL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_RET, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},

14
src/gallium/drivers/r600/r600_state.c
View file

@ -469,12 +469,17 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
r600_pipe_state_add_reg(rstate, R_028A00_PA_SU_POINT_SIZE, S_028A00_HEIGHT(tmp) | S_028A00_WIDTH(tmp), 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028A04_PA_SU_POINT_MINMAX, 0x80000000, 0xFFFFFFFF, NULL);
tmp = (unsigned)(state->line_width * 8.0);
tmp = (unsigned)state->line_width * 8;
r600_pipe_state_add_reg(rstate, R_028A08_PA_SU_LINE_CNTL, S_028A08_WIDTH(tmp), 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028A0C_PA_SC_LINE_STIPPLE, 0x00000005, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028A48_PA_SC_MPASS_PS_CNTL, 0x00000000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C00_PA_SC_LINE_CNTL, 0x00000400, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C08_PA_SU_VTX_CNTL,
S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules),
0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C0C_PA_CL_GB_VERT_CLIP_ADJ, 0x3F800000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C10_PA_CL_GB_VERT_DISC_ADJ, 0x3F800000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C14_PA_CL_GB_HORZ_CLIP_ADJ, 0x3F800000, 0xFFFFFFFF, NULL);
@ -1018,6 +1023,13 @@ static void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_resource *rbuffer = (struct r600_resource*)buffer;
/* Note that the state tracker can unbind constant buffers by
* passing NULL here.
*/
if (buffer == NULL) {
return;
}
switch (shader) {
case PIPE_SHADER_VERTEX:
rctx->vs_const_buffer.nregs = 0;

2
src/gallium/drivers/r600/r600_state_inlines.h
View file

@ -472,7 +472,7 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format)
case PIPE_FORMAT_UYVY:
case PIPE_FORMAT_YUYV:
default:
R600_ERR("unsupported color format %d %s\n", format, util_format_name(format));
//R600_ERR("unsupported color format %d %s\n", format, util_format_name(format));
return ~0; /* Unsupported. */
}
}

205
src/gallium/drivers/r600/r600_texture.c
View file

@ -31,6 +31,7 @@
#include <util/u_inlines.h>
#include <util/u_memory.h>
#include "state_tracker/drm_driver.h"
#include "pipebuffer/pb_buffer.h"
#include "r600_pipe.h"
#include "r600_resource.h"
#include "r600_state_inlines.h"
@ -39,8 +40,8 @@
extern struct u_resource_vtbl r600_texture_vtbl;
/* Copy from a tiled texture to a detiled one. */
static void r600_copy_from_tiled_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
/* Copy from a full GPU texture to a transfer's staging one. */
static void r600_copy_to_staging_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
{
struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
struct pipe_resource *texture = transfer->resource;
@ -48,15 +49,15 @@ static void r600_copy_from_tiled_texture(struct pipe_context *ctx, struct r600_t
subdst.face = 0;
subdst.level = 0;
ctx->resource_copy_region(ctx, rtransfer->linear_texture,
ctx->resource_copy_region(ctx, rtransfer->staging_texture,
subdst, 0, 0, 0, texture, transfer->sr,
transfer->box.x, transfer->box.y, transfer->box.z,
transfer->box.width, transfer->box.height);
}
/* Copy from a detiled texture to a tiled one. */
static void r600_copy_into_tiled_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
/* Copy from a transfer's staging texture to a full GPU one. */
static void r600_copy_from_staging_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
{
struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
struct pipe_resource *texture = transfer->resource;
@ -66,7 +67,7 @@ static void r600_copy_into_tiled_texture(struct pipe_context *ctx, struct r600_t
subsrc.level = 0;
ctx->resource_copy_region(ctx, texture, transfer->sr,
transfer->box.x, transfer->box.y, transfer->box.z,
rtransfer->linear_texture, subsrc,
rtransfer->staging_texture, subsrc,
0, 0, 0,
transfer->box.width, transfer->box.height);
@ -168,6 +169,10 @@ static unsigned r600_texture_get_stride(struct pipe_screen *screen,
stride = util_format_get_stride(ptex->format, width);
if (chipc == EVERGREEN)
stride = align(stride, 512);
if (ptex->bind & PIPE_BIND_RENDER_TARGET)
stride = align(stride, 512);
return stride;
}
@ -283,7 +288,6 @@ r600_texture_create_object(struct pipe_screen *screen,
pipe_reference_init(&resource->base.b.reference, 1);
resource->base.b.screen = screen;
resource->bo = bo;
resource->domain = r600_domain_from_usage(resource->base.b.bind);
rtex->pitch_override = pitch_in_bytes_override;
if (array_mode)
@ -293,7 +297,7 @@ r600_texture_create_object(struct pipe_screen *screen,
resource->size = rtex->size;
if (!resource->bo) {
resource->bo = r600_bo(radeon, rtex->size, 4096, 0);
resource->bo = r600_bo(radeon, rtex->size, 4096, base->bind, base->usage);
if (!resource->bo) {
FREE(rtex);
return NULL;
@ -306,8 +310,14 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
const struct pipe_resource *templ)
{
unsigned array_mode = 0;
static int force_tiling = -1;
if (debug_get_bool_option("R600_FORCE_TILING", FALSE)) {
/* Would like some magic "get_bool_option_once" routine.
*/
if (force_tiling == -1)
force_tiling = debug_get_bool_option("R600_FORCE_TILING", FALSE);
if (force_tiling) {
if (!(templ->flags & R600_RESOURCE_FLAG_TRANSFER) &&
!(templ->bind & PIPE_BIND_SCANOUT)) {
array_mode = V_038000_ARRAY_2D_TILED_THIN1;
@ -335,6 +345,18 @@ static void r600_texture_destroy(struct pipe_screen *screen,
FREE(rtex);
}
static boolean r600_texture_get_handle(struct pipe_screen* screen,
struct pipe_resource *ptex,
struct winsys_handle *whandle)
{
struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
struct r600_resource *resource = &rtex->resource;
struct radeon *radeon = (struct radeon *)screen->winsys;
return r600_bo_get_winsys_handle(radeon, resource->bo,
rtex->pitch_in_bytes[0], whandle);
}
static struct pipe_surface *r600_get_tex_surface(struct pipe_screen *screen,
struct pipe_resource *texture,
unsigned face, unsigned level,
@ -434,10 +456,59 @@ int r600_texture_depth_flush(struct pipe_context *ctx,
}
out:
/* XXX: only do this if the depth texture has actually changed:
*/
r600_blit_uncompress_depth_ptr(ctx, rtex);
return 0;
}
/* Needs adjustment for pixelformat:
*/
static INLINE unsigned u_box_volume( const struct pipe_box *box )
{
return box->width * box->depth * box->height;
};
/* Figure out whether u_blitter will fallback to a transfer operation.
* If so, don't use a staging resource.
*/
static boolean permit_hardware_blit(struct pipe_screen *screen,
struct pipe_resource *res)
{
unsigned bind;
if (util_format_is_depth_or_stencil(res->format))
bind = PIPE_BIND_DEPTH_STENCIL;
else
bind = PIPE_BIND_RENDER_TARGET;
/* See r600_resource_copy_region: there is something wrong
* with depth resource copies at the moment so avoid them for
* now.
*/
if (util_format_get_component_bits(res->format,
UTIL_FORMAT_COLORSPACE_ZS,
0) != 0)
return FALSE;
if (!screen->is_format_supported(screen,
res->format,
res->target,
res->nr_samples,
bind, 0))
return FALSE;
if (!screen->is_format_supported(screen,
res->format,
res->target,
res->nr_samples,
PIPE_BIND_SAMPLER_VIEW, 0))
return FALSE;
return TRUE;
}
struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
struct pipe_resource *texture,
struct pipe_subresource sr,
@ -448,6 +519,36 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
struct pipe_resource resource;
struct r600_transfer *trans;
int r;
boolean use_staging_texture = FALSE;
/* We cannot map a tiled texture directly because the data is
* in a different order, therefore we do detiling using a blit.
*
* Also, use a temporary in GTT memory for read transfers, as
* the CPU is much happier reading out of cached system memory
* than uncached VRAM.
*/
if (rtex->tiled)
use_staging_texture = TRUE;
if ((usage & PIPE_TRANSFER_READ) &&
u_box_volume(box) > 1024)
use_staging_texture = TRUE;
/* XXX: Use a staging texture for uploads if the underlying BO
* is busy. No interface for checking that currently? so do
* it eagerly whenever the transfer doesn't require a readback
* and might block.
*/
if ((usage & PIPE_TRANSFER_WRITE) &&
!(usage & (PIPE_TRANSFER_READ |
PIPE_TRANSFER_DONTBLOCK |
PIPE_TRANSFER_UNSYNCHRONIZED)))
use_staging_texture = TRUE;
if (!permit_hardware_blit(ctx->screen, texture) ||
(texture->flags & R600_RESOURCE_FLAG_TRANSFER))
use_staging_texture = FALSE;
trans = CALLOC_STRUCT(r600_transfer);
if (trans == NULL)
@ -457,6 +558,10 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
trans->transfer.usage = usage;
trans->transfer.box = *box;
if (rtex->depth) {
/* XXX: only readback the rectangle which is being mapped?
*/
/* XXX: when discard is true, no need to read back from depth texture
*/
r = r600_texture_depth_flush(ctx, texture);
if (r < 0) {
R600_ERR("failed to create temporary texture to hold untiled copy\n");
@ -464,7 +569,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
FREE(trans);
return NULL;
}
} else if (rtex->tiled) {
} else if (use_staging_texture) {
resource.target = PIPE_TEXTURE_2D;
resource.format = texture->format;
resource.width0 = box->width;
@ -472,7 +577,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
resource.depth0 = 1;
resource.last_level = 0;
resource.nr_samples = 0;
resource.usage = PIPE_USAGE_DYNAMIC;
resource.usage = PIPE_USAGE_STAGING;
resource.bind = 0;
resource.flags = R600_RESOURCE_FLAG_TRANSFER;
/* For texture reading, the temporary (detiled) texture is used as
@ -486,8 +591,8 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
resource.bind |= PIPE_BIND_SAMPLER_VIEW;
}
/* Create the temporary texture. */
trans->linear_texture = ctx->screen->resource_create(ctx->screen, &resource);
if (trans->linear_texture == NULL) {
trans->staging_texture = ctx->screen->resource_create(ctx->screen, &resource);
if (trans->staging_texture == NULL) {
R600_ERR("failed to create temporary texture to hold untiled copy\n");
pipe_resource_reference(&trans->transfer.resource, NULL);
FREE(trans);
@ -495,11 +600,9 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
}
trans->transfer.stride =
((struct r600_resource_texture *)trans->linear_texture)->pitch_in_bytes[0];
((struct r600_resource_texture *)trans->staging_texture)->pitch_in_bytes[0];
if (usage & PIPE_TRANSFER_READ) {
/* We cannot map a tiled texture directly because the data is
* in a different order, therefore we do detiling using a blit. */
r600_copy_from_tiled_texture(ctx, trans);
r600_copy_to_staging_texture(ctx, trans);
/* Always referenced in the blit. */
ctx->flush(ctx, 0, NULL);
}
@ -516,11 +619,11 @@ void r600_texture_transfer_destroy(struct pipe_context *ctx,
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
if (rtransfer->linear_texture) {
if (rtransfer->staging_texture) {
if (transfer->usage & PIPE_TRANSFER_WRITE) {
r600_copy_into_tiled_texture(ctx, rtransfer);
r600_copy_from_staging_texture(ctx, rtransfer);
}
pipe_resource_reference(&rtransfer->linear_texture, NULL);
pipe_resource_reference(&rtransfer->staging_texture, NULL);
}
if (rtex->flushed_depth_texture) {
pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
@ -537,10 +640,11 @@ void* r600_texture_transfer_map(struct pipe_context *ctx,
enum pipe_format format = transfer->resource->format;
struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
unsigned offset = 0;
unsigned usage = 0;
char *map;
if (rtransfer->linear_texture) {
bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
if (rtransfer->staging_texture) {
bo = ((struct r600_resource *)rtransfer->staging_texture)->bo;
} else {
struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
@ -553,7 +657,30 @@ void* r600_texture_transfer_map(struct pipe_context *ctx,
transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
}
map = r600_bo_map(radeon, bo, 0, ctx);
if (transfer->usage & PIPE_TRANSFER_WRITE) {
usage |= PB_USAGE_CPU_WRITE;
if (transfer->usage & PIPE_TRANSFER_DISCARD) {
}
if (transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT) {
}
}
if (transfer->usage & PIPE_TRANSFER_READ) {
usage |= PB_USAGE_CPU_READ;
}
if (transfer->usage & PIPE_TRANSFER_DONTBLOCK) {
usage |= PB_USAGE_DONTBLOCK;
}
if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
usage |= PB_USAGE_UNSYNCHRONIZED;
}
map = r600_bo_map(radeon, bo, usage, ctx);
if (!map) {
return NULL;
}
@ -568,8 +695,8 @@ void r600_texture_transfer_unmap(struct pipe_context *ctx,
struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
struct r600_bo *bo;
if (rtransfer->linear_texture) {
bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
if (rtransfer->staging_texture) {
bo = ((struct r600_resource *)rtransfer->staging_texture)->bo;
} else {
struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
@ -584,7 +711,7 @@ void r600_texture_transfer_unmap(struct pipe_context *ctx,
struct u_resource_vtbl r600_texture_vtbl =
{
u_default_resource_get_handle, /* get_handle */
r600_texture_get_handle, /* get_handle */
r600_texture_destroy, /* resource_destroy */
r600_texture_is_referenced, /* is_resource_referenced */
r600_texture_get_transfer, /* get_transfer */
@ -689,7 +816,7 @@ uint32_t r600_translate_texformat(enum pipe_format format,
result = FMT_24_8;
goto out_word4;
case PIPE_FORMAT_S8_USCALED:
result = V_0280A0_COLOR_8;
result = FMT_8;
word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
goto out_word4;
default:
@ -718,7 +845,29 @@ uint32_t r600_translate_texformat(enum pipe_format format,
/* S3TC formats. TODO */
if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
goto out_unknown;
static int r600_enable_s3tc = -1;
if (r600_enable_s3tc == -1)
r600_enable_s3tc =
debug_get_bool_option("R600_ENABLE_S3TC", FALSE);
if (!r600_enable_s3tc)
goto out_unknown;
switch (format) {
case PIPE_FORMAT_DXT1_RGB:
case PIPE_FORMAT_DXT1_RGBA:
result = FMT_BC1;
goto out_word4;
case PIPE_FORMAT_DXT3_RGBA:
result = FMT_BC2;
goto out_word4;
case PIPE_FORMAT_DXT5_RGBA:
result = FMT_BC3;
goto out_word4;
default:
goto out_unknown;
}
}

4
src/gallium/drivers/r600/r600d.h
View file

@ -2100,6 +2100,10 @@
#define G_028C00_LAST_PIXEL(x) (((x) >> 10) & 0x1)
#define C_028C00_LAST_PIXEL 0xFFFFFBFF
#define R_028C04_PA_SC_AA_CONFIG 0x028C04
#define R_028C08_PA_SU_VTX_CNTL 0x028C08
#define S_028C08_PIX_CENTER_HALF(x) (((x) & 0x1) << 0)
#define G_028C08_PIX_CENTER_HALF(x) (((x) >> 0) & 0x1)
#define C_028C08_PIX_CENTER_HALF 0xFFFFFFFE
#define R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX 0x028C1C
#define R_028C48_PA_SC_AA_MASK 0x028C48
#define R_028810_PA_CL_CLIP_CNTL 0x028810

16
src/gallium/drivers/rbug/README
View file

@ -7,24 +7,10 @@ This directory contains a Gallium3D remote debugger pipe driver.
It provides remote debugging functionality.
= Build Instructions =
To build, invoke scons on the top dir as
scons dri=no statetrackers=mesa winsys=xlib
= Usage =
To use do
Do
export LD_LIBRARY_PATH=$PWD/build/linux-x86-debug/lib
ensure the right libGL.so is being picked by doing
ldd progs/trivial/tri
export XMESA_TRACE=y
GALLIUM_RBUG=true progs/trivial/tri
which should open gallium remote debugging session. While the program is running

2
src/gallium/drivers/rbug/SConscript
View file

@ -11,4 +11,6 @@ rbug = env.ConvenienceLibrary(
'rbug_screen.c',
])
env.Alias('rbug', rbug)
Export('rbug')

2
src/gallium/drivers/softpipe/SConscript
View file

@ -38,4 +38,6 @@ softpipe = env.ConvenienceLibrary(
'sp_video_context.c',
])
env.Alias('softpipe', softpipe)
Export('softpipe')

1
src/gallium/drivers/softpipe/sp_quad_depth_test.c
View file

@ -860,6 +860,7 @@ choose_depth_test(struct quad_stage *qs,
/* look for special cases */
if (!alpha &&
!depth &&
!occlusion &&
!stencil) {
qs->run = depth_noop;
}

5
src/gallium/drivers/softpipe/sp_screen.c
View file

@ -65,7 +65,12 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
return PIPE_MAX_SAMPLERS;
case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
#ifdef HAVE_LLVM
/* Softpipe doesn't yet know how to tell draw/llvm about textures */
return 0;
#else
return PIPE_MAX_VERTEX_SAMPLERS;
#endif
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return PIPE_MAX_SAMPLERS + PIPE_MAX_VERTEX_SAMPLERS;
case PIPE_CAP_NPOT_TEXTURES:

1
src/gallium/drivers/sw/SConscript
View file

@ -20,7 +20,6 @@ if True:
if env['llvm']:
env.Append(CPPDEFINES = 'GALLIUM_LLVMPIPE')
env.Tool('udis86')
env.Prepend(LIBS = [llvmpipe])
extra.append(llvmpipe)

18
src/gallium/drivers/trace/README
View file

@ -7,23 +7,8 @@ This directory contains a Gallium3D trace debugger pipe driver.
It can traces all incoming calls.
= Build Instructions =
To build, invoke scons on the top dir as
scons dri=no statetrackers=mesa winsys=xlib
= Usage =
To use do
export LD_LIBRARY_PATH=$PWD/build/linux-x86-debug/lib
ensure the right libGL.so is being picked by doing
ldd progs/trivial/tri
== Tracing ==
For tracing then do
@ -40,6 +25,7 @@ For remote debugging see:
src/gallium/drivers/rbug/README
= Integrating =
You can integrate the trace pipe driver either inside the state tracker or the
@ -60,5 +46,5 @@ are automatically wrapped by trace_screen.
--
Jose Fonseca <jrfonseca@tungstengraphics.com>
Jose Fonseca <jfonseca@vmware.com>
Jakob Bornecrantz <jakob@vmware.com>

2
src/gallium/drivers/trace/SConscript
View file

@ -12,4 +12,6 @@ trace = env.ConvenienceLibrary(
'tr_texture.c',
])
env.Alias('trace', trace)
Export('trace')

24
src/gallium/include/state_tracker/graw.h
View file

@ -44,8 +44,9 @@
#include "pipe/p_compiler.h"
#include "pipe/p_format.h"
struct pipe_screen;
struct pipe_context;
struct pipe_screen;
struct pipe_surface;
/* Returns a handle to be used with flush_frontbuffer()/present().
*
@ -71,4 +72,25 @@ PUBLIC void *graw_parse_vertex_shader( struct pipe_context *pipe,
PUBLIC void *graw_parse_fragment_shader( struct pipe_context *pipe,
const char *text );
/* Parse a single command-line option, if any. Options include:
*
* -o <filename>
*
* If an option has been successfully parsed, argi is updated
* to point just after the option and return TRUE.
*/
PUBLIC boolean graw_parse_args(int *argi, int argc, char *argv[]);
/* Saves surface contents to a file.
*
* If filename is NULL, the filename provided with the `-o' option
* is used. If the option has not been specified, the surface
* will not be saved.
*
* Returns TRUE if the surface has been saved.
*/
PUBLIC boolean graw_save_surface_to_file(struct pipe_context *pipe,
struct pipe_surface *surface,
const char *filename);
#endif

14
src/gallium/state_trackers/d3d1x/dxgi/src/dxgi_native.cpp
View file

@ -1101,6 +1101,7 @@ struct GalliumDXGISwapChain : public GalliumDXGIObject<IDXGISwapChain, GalliumDX
struct pipe_resource* dst;
struct pipe_resource* src;
struct pipe_surface* dst_surface;
enum native_attachment att;
void* present_cookie;
hr = parent->backend->BeginPresent(desc.OutputWindow, &present_cookie, &cur_window, &rect, &rgndata, &preserve_aspect_ratio);
@ -1221,16 +1222,9 @@ struct GalliumDXGISwapChain : public GalliumDXGIObject<IDXGISwapChain, GalliumDX
pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_FRAME, 0);
if(db)
{
if(!surface->swap_buffers(surface))
return DXGI_ERROR_DEVICE_REMOVED;
}
else
{
if(!surface->flush_frontbuffer(surface))
return DXGI_ERROR_DEVICE_REMOVED;
}
att = (db) ? NATIVE_ATTACHMENT_BACK_LEFT : NATIVE_ATTACHMENT_FRONT_LEFT;
if(!surface->present(surface, att, FALSE, 0))
return DXGI_ERROR_DEVICE_REMOVED;
end_present:
parent->backend->EndPresent(desc.OutputWindow, present_cookie);

4
src/gallium/state_trackers/dri/SConscript
View file

@ -1,6 +1,6 @@
Import('*')
SConscript([
'sw/SConscript',
'drm/SConscript',
'sw/SConscript',
'drm/SConscript',
])

3
src/gallium/state_trackers/dri/common/dri_context.c
View file

@ -178,7 +178,8 @@ dri_make_current(__DRIcontext * cPriv,
read->texture_stamp = driReadPriv->lastStamp - 1;
}
ctx->stapi->make_current(ctx->stapi, ctx->st, &draw->base, &read->base);
ctx->stapi->make_current(ctx->stapi, ctx->st,
(draw) ? &draw->base : NULL, (read) ? &read->base : NULL);
return GL_TRUE;
}

3
src/gallium/state_trackers/dri/common/dri_drawable.h
View file

@ -70,7 +70,8 @@ struct dri_drawable
static INLINE struct dri_drawable *
dri_drawable(__DRIdrawable * driDrawPriv)
{
return (struct dri_drawable *)driDrawPriv->driverPrivate;
return (struct dri_drawable *) (driDrawPriv)
? driDrawPriv->driverPrivate : NULL;
}
/***********************************************************************

3
src/gallium/state_trackers/dri/common/dri_screen.c
View file

@ -231,6 +231,9 @@ dri_fill_st_visual(struct st_visual *stvis, struct dri_screen *screen,
{
memset(stvis, 0, sizeof(*stvis));
if (!mode)
return;
stvis->samples = mode->samples;
stvis->render_buffer = ST_ATTACHMENT_INVALID;

37
src/gallium/state_trackers/dri/drm/SConscript
View file

@ -3,25 +3,26 @@
Import('*')
if env['dri']:
env = env.Clone()
env = env.Clone()
env.ParseConfig('pkg-config --cflags --libs libdrm')
env.ParseConfig('pkg-config --cflags --libs libdrm')
env.Append(CPPPATH = [
'#/src/mapi',
'#/src/mesa',
'#/src/gallium/state_trackers/dri/common',
'#/src/mesa/drivers/dri/common',
])
env.Append(CPPPATH = [
'#/src/mapi',
'#/src/mesa',
'#/src/gallium/state_trackers/dri/common',
'#/src/mesa/drivers/dri/common',
])
sources = [
'dri_context.c',
'dri_drawable.c',
'dri_screen.c',
'dri2.c',
]
st_dri = env.ConvenienceLibrary(
target = 'st_dri',
source = [ 'dri_context.c',
'dri_drawable.c',
'dri_screen.c',
'dri2.c',
]
)
Export('st_dri')
st_dri = env.ConvenienceLibrary(
target = 'st_dri',
source = sources,
)
Export('st_dri')

37
src/gallium/state_trackers/dri/sw/SConscript
View file

@ -3,25 +3,26 @@
Import('*')
if env['dri']:
env = env.Clone()
env = env.Clone()
env.Append(CPPPATH = [
'#/src/mapi',
'#/src/mesa',
'#/src/gallium/state_trackers/dri/common',
'#/src/mesa/drivers/dri/common',
])
env.Append(CPPPATH = [
'#/src/mapi',
'#/src/mesa',
'#/src/gallium/state_trackers/dri/common',
'#/src/mesa/drivers/dri/common',
])
env.Append(CPPDEFINES = [('__NOT_HAVE_DRM_H', '1')])
env.Append(CPPDEFINES = [('__NOT_HAVE_DRM_H', '1')])
sources = [
'dri_context.c',
'dri_drawable.c',
'dri_screen.c',
'drisw.c',
]
st_drisw = env.ConvenienceLibrary(
target = 'st_drisw',
source = [ 'dri_context.c',
'dri_drawable.c',
'dri_screen.c',
'drisw.c',
]
)
Export('st_drisw')
st_drisw = env.ConvenienceLibrary(
target = 'st_drisw',
source = sources,
)
Export('st_drisw')

2
src/gallium/state_trackers/egl/Makefile
View file

@ -17,7 +17,7 @@ x11_INCLUDES = \
-I$(TOP)/src/mapi \
-I$(TOP)/src/mesa \
$(X11_CFLAGS) \
$(shell pkg-config --cflags-only-I libdrm)
$(shell pkg-config --cflags-only-I libdrm dri2proto)
x11_SOURCES = $(wildcard x11/*.c) \
$(TOP)/src/glx/dri2.c

52
src/gallium/state_trackers/egl/SConscript
View file

@ -3,34 +3,32 @@
Import('*')
if 'egl' in env['statetrackers']:
env = env.Clone()
env = env.Clone()
env.Append(CPPPATH = [
'#/src/egl/main',
'#/src/gallium/winsys/sw',
'.',
])
env.Append(CPPDEFINES = [
'HAVE_GDI_BACKEND',
])
env.Append(CPPPATH = [
'#/src/egl/main',
'#/src/gallium/winsys/sw',
'.',
])
env.Append(CPPDEFINES = [
'HAVE_GDI_BACKEND',
])
common_sources = [
'common/egl_g3d.c',
'common/egl_g3d_api.c',
'common/egl_g3d_image.c',
'common/egl_g3d_st.c',
'common/egl_g3d_sync.c',
'common/native_helper.c',
]
common_sources = [
'common/egl_g3d.c',
'common/egl_g3d_api.c',
'common/egl_g3d_image.c',
'common/egl_g3d_st.c',
'common/egl_g3d_sync.c',
'common/native_helper.c',
]
gdi_sources = common_sources + [
'gdi/native_gdi.c',
]
gdi_sources = common_sources + [
'gdi/native_gdi.c',
]
st_egl_gdi = env.ConvenienceLibrary(
target = 'st_egl_gdi',
source = gdi_sources,
)
Export('st_egl_gdi')
st_egl_gdi = env.ConvenienceLibrary(
target = 'st_egl_gdi',
source = gdi_sources,
)
Export('st_egl_gdi')

26
src/gallium/state_trackers/egl/common/egl_g3d.c
View file

@ -156,7 +156,8 @@ egl_g3d_add_screens(_EGLDriver *drv, _EGLDisplay *dpy)
*/
static EGLBoolean
init_config_attributes(_EGLConfig *conf, const struct native_config *nconf,
EGLint api_mask, enum pipe_format depth_stencil_format)
EGLint api_mask, enum pipe_format depth_stencil_format,
EGLBoolean preserve_buffer, EGLint max_swap_interval)
{
uint rgba[4], depth_stencil[2], buffer_size;
EGLint surface_type;
@ -238,6 +239,11 @@ init_config_attributes(_EGLConfig *conf, const struct native_config *nconf,
conf->TransparentBlueValue = nconf->transparent_rgb_values[2];
}
conf->MinSwapInterval = 0;
conf->MaxSwapInterval = max_swap_interval;
if (preserve_buffer)
conf->SurfaceType |= EGL_SWAP_BEHAVIOR_PRESERVED_BIT;
return _eglValidateConfig(conf, EGL_FALSE);
}
@ -247,7 +253,8 @@ init_config_attributes(_EGLConfig *conf, const struct native_config *nconf,
static EGLBoolean
egl_g3d_init_config(_EGLDriver *drv, _EGLDisplay *dpy,
_EGLConfig *conf, const struct native_config *nconf,
enum pipe_format depth_stencil_format)
enum pipe_format depth_stencil_format,
int preserve_buffer, int max_swap_interval)
{
struct egl_g3d_config *gconf = egl_g3d_config(conf);
EGLint buffer_mask, api_mask;
@ -288,7 +295,8 @@ egl_g3d_init_config(_EGLDriver *drv, _EGLDisplay *dpy,
}
valid = init_config_attributes(&gconf->base,
nconf, api_mask, depth_stencil_format);
nconf, api_mask, depth_stencil_format,
preserve_buffer, max_swap_interval);
if (!valid) {
_eglLog(_EGL_DEBUG, "skip invalid config 0x%x", nconf->native_visual_id);
return EGL_FALSE;
@ -349,6 +357,7 @@ egl_g3d_add_configs(_EGLDriver *drv, _EGLDisplay *dpy, EGLint id)
const struct native_config **native_configs;
enum pipe_format depth_stencil_formats[8];
int num_formats, num_configs, i, j;
int preserve_buffer, max_swap_interval;
native_configs = gdpy->native->get_configs(gdpy->native, &num_configs);
if (!num_configs) {
@ -357,6 +366,11 @@ egl_g3d_add_configs(_EGLDriver *drv, _EGLDisplay *dpy, EGLint id)
return id;
}
preserve_buffer =
gdpy->native->get_param(gdpy->native, NATIVE_PARAM_PRESERVE_BUFFER);
max_swap_interval =
gdpy->native->get_param(gdpy->native, NATIVE_PARAM_MAX_SWAP_INTERVAL);
num_formats = egl_g3d_fill_depth_stencil_formats(dpy,
depth_stencil_formats);
@ -368,7 +382,8 @@ egl_g3d_add_configs(_EGLDriver *drv, _EGLDisplay *dpy, EGLint id)
if (gconf) {
_eglInitConfig(&gconf->base, dpy, id);
if (!egl_g3d_init_config(drv, dpy, &gconf->base,
native_configs[i], depth_stencil_formats[j])) {
native_configs[i], depth_stencil_formats[j],
preserve_buffer, max_swap_interval)) {
FREE(gconf);
break;
}
@ -538,7 +553,8 @@ egl_g3d_initialize(_EGLDriver *drv, _EGLDisplay *dpy,
if (dpy->Platform == _EGL_PLATFORM_DRM) {
dpy->Extensions.MESA_drm_display = EGL_TRUE;
dpy->Extensions.MESA_drm_image = EGL_TRUE;
if (gdpy->native->buffer)
dpy->Extensions.MESA_drm_image = EGL_TRUE;
}
if (egl_g3d_add_configs(drv, dpy, 1) == 1) {

74
src/gallium/state_trackers/egl/common/egl_g3d_api.c
View file

@ -97,6 +97,70 @@ egl_g3d_choose_st(_EGLDriver *drv, _EGLContext *ctx,
return stapi;
}
static int
egl_g3d_compare_config(const _EGLConfig *conf1, const _EGLConfig *conf2,
void *priv_data)
{
const _EGLConfig *criteria = (const _EGLConfig *) priv_data;
/* EGL_NATIVE_VISUAL_TYPE ignored? */
return _eglCompareConfigs(conf1, conf2, criteria, EGL_TRUE);
}
static EGLBoolean
egl_g3d_match_config(const _EGLConfig *conf, const _EGLConfig *criteria)
{
if (!_eglMatchConfig(conf, criteria))
return EGL_FALSE;
if (criteria->MatchNativePixmap != EGL_NONE &&
criteria->MatchNativePixmap != EGL_DONT_CARE) {
struct egl_g3d_display *gdpy = egl_g3d_display(conf->Display);
struct egl_g3d_config *gconf = egl_g3d_config(conf);
EGLNativePixmapType pix =
(EGLNativePixmapType) criteria->MatchNativePixmap;
if (!gdpy->native->is_pixmap_supported(gdpy->native, pix, gconf->native))
return EGL_FALSE;
}
return EGL_TRUE;
}
static EGLBoolean
egl_g3d_choose_config(_EGLDriver *drv, _EGLDisplay *dpy, const EGLint *attribs,
EGLConfig *configs, EGLint size, EGLint *num_configs)
{
_EGLConfig **tmp_configs, criteria;
EGLint tmp_size, i;
if (!num_configs)
return _eglError(EGL_BAD_PARAMETER, "eglChooseConfigs");
if (!_eglParseConfigAttribList(&criteria, dpy, attribs))
return _eglError(EGL_BAD_ATTRIBUTE, "eglChooseConfig");
tmp_configs = (_EGLConfig **) _eglFilterArray(dpy->Configs, &tmp_size,
(_EGLArrayForEach) egl_g3d_match_config, (void *) &criteria);
if (!tmp_configs)
return _eglError(EGL_BAD_ALLOC, "eglChooseConfig(out of memory)");
/* perform sorting of configs */
if (tmp_configs && tmp_size) {
_eglSortConfigs((const _EGLConfig **) tmp_configs, tmp_size,
egl_g3d_compare_config, (void *) &criteria);
size = MIN2(tmp_size, size);
for (i = 0; i < size; i++)
configs[i] = _eglGetConfigHandle(tmp_configs[i]);
}
free(tmp_configs);
*num_configs = size;
return EGL_TRUE;
}
static _EGLContext *
egl_g3d_create_context(_EGLDriver *drv, _EGLDisplay *dpy, _EGLConfig *conf,
_EGLContext *share, const EGLint *attribs)
@ -539,7 +603,10 @@ egl_g3d_swap_buffers(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf)
PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_FRAME, NULL);
}
return gsurf->native->swap_buffers(gsurf->native);
return gsurf->native->present(gsurf->native,
NATIVE_ATTACHMENT_BACK_LEFT,
gsurf->base.SwapBehavior == EGL_BUFFER_PRESERVED,
gsurf->base.SwapInterval);
}
/**
@ -607,8 +674,7 @@ egl_g3d_copy_buffers(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf,
if (psrc) {
gdpy->pipe->resource_copy_region(gdpy->pipe, ptex, subdst, 0, 0, 0,
gsurf->render_texture, subsrc, 0, 0, 0, ptex->width0, ptex->height0);
nsurf->flush_frontbuffer(nsurf);
nsurf->present(nsurf, NATIVE_ATTACHMENT_FRONT_LEFT, FALSE, 0);
}
pipe_resource_reference(&ptex, NULL);
@ -838,6 +904,8 @@ egl_g3d_init_driver_api(_EGLDriver *drv)
{
_eglInitDriverFallbacks(drv);
drv->API.ChooseConfig = egl_g3d_choose_config;
drv->API.CreateContext = egl_g3d_create_context;
drv->API.DestroyContext = egl_g3d_destroy_context;
drv->API.CreateWindowSurface = egl_g3d_create_window_surface;

18
src/gallium/state_trackers/egl/common/egl_g3d_image.c
View file

@ -38,7 +38,7 @@
#include "egl_g3d_api.h"
#include "egl_g3d_image.h"
/* move this to native display? */
/* for struct winsys_handle */
#include "state_tracker/drm_driver.h"
/**
@ -137,13 +137,11 @@ egl_g3d_reference_drm_buffer(_EGLDisplay *dpy, EGLint name,
_EGLImage *img, const EGLint *attribs)
{
struct egl_g3d_display *gdpy = egl_g3d_display(dpy);
struct pipe_screen *screen = gdpy->native->screen;
struct pipe_resource templ;
struct winsys_handle wsh;
_EGLImageAttribs attrs;
EGLint format;
/* winsys_handle is in theory platform-specific */
if (dpy->Platform != _EGL_PLATFORM_DRM)
return NULL;
@ -178,9 +176,10 @@ egl_g3d_reference_drm_buffer(_EGLDisplay *dpy, EGLint name,
memset(&wsh, 0, sizeof(wsh));
wsh.handle = (unsigned) name;
wsh.stride = attrs.DRMBufferStrideMESA;
wsh.stride =
attrs.DRMBufferStrideMESA * util_format_get_blocksize(templ.format);
return screen->resource_from_handle(screen, &templ, &wsh);
return gdpy->native->buffer->import_buffer(gdpy->native, &templ, &wsh);
}
#endif /* EGL_MESA_drm_image */
@ -302,10 +301,8 @@ egl_g3d_export_drm_image(_EGLDriver *drv, _EGLDisplay *dpy, _EGLImage *img,
{
struct egl_g3d_display *gdpy = egl_g3d_display(dpy);
struct egl_g3d_image *gimg = egl_g3d_image(img);
struct pipe_screen *screen = gdpy->native->screen;
struct winsys_handle wsh;
/* winsys_handle is in theory platform-specific */
if (dpy->Platform != _EGL_PLATFORM_DRM)
return EGL_FALSE;
@ -313,9 +310,9 @@ egl_g3d_export_drm_image(_EGLDriver *drv, _EGLDisplay *dpy, _EGLImage *img,
if (name) {
memset(&handle, 0, sizeof(handle));
wsh.type = DRM_API_HANDLE_TYPE_SHARED;
if (!screen->resource_get_handle(screen, gimg->texture, &wsh)) {
if (!gdpy->native->buffer->export_buffer(gdpy->native,
gimg->texture, &wsh))
return EGL_FALSE;
}
*name = wsh.handle;
}
@ -324,7 +321,8 @@ egl_g3d_export_drm_image(_EGLDriver *drv, _EGLDisplay *dpy, _EGLImage *img,
if (handle || stride) {
memset(&wsh, 0, sizeof(wsh));
wsh.type = DRM_API_HANDLE_TYPE_KMS;
if (!screen->resource_get_handle(screen, gimg->texture, &wsh))
if (!gdpy->native->buffer->export_buffer(gdpy->native,
gimg->texture, &wsh))
return EGL_FALSE;
if (handle)

3
src/gallium/state_trackers/egl/common/egl_g3d_st.c
View file

@ -192,7 +192,8 @@ egl_g3d_st_framebuffer_flush_front(struct st_framebuffer_iface *stfbi,
_EGLSurface *surf = (_EGLSurface *) stfbi->st_manager_private;
struct egl_g3d_surface *gsurf = egl_g3d_surface(surf);
return gsurf->native->flush_frontbuffer(gsurf->native);
return gsurf->native->present(gsurf->native,
NATIVE_ATTACHMENT_FRONT_LEFT, FALSE, 0);
}
static boolean

37
src/gallium/state_trackers/egl/common/native.h
View file

@ -34,6 +34,11 @@
#include "pipe/p_state.h"
#include "state_tracker/sw_winsys.h"
#ifdef __cplusplus
extern "C" {
#endif
#include "native_buffer.h"
#include "native_modeset.h"
/**
@ -54,7 +59,17 @@ enum native_param_type {
* Return TRUE if window/pixmap surfaces use the buffers of the native
* types.
*/
NATIVE_PARAM_USE_NATIVE_BUFFER
NATIVE_PARAM_USE_NATIVE_BUFFER,
/**
* Return TRUE if native_surface::present can preserve the buffer.
*/
NATIVE_PARAM_PRESERVE_BUFFER,
/**
* Return the maximum supported swap interval.
*/
NATIVE_PARAM_MAX_SWAP_INTERVAL
};
struct native_surface {
@ -66,17 +81,12 @@ struct native_surface {
void (*destroy)(struct native_surface *nsurf);
/**
* Swap the front and back buffers so that the back buffer is visible. It
* is no-op if the surface is single-buffered. The contents of the back
* buffer after swapping may or may not be preserved.
* Present the given buffer to the native engine.
*/
boolean (*swap_buffers)(struct native_surface *nsurf);
/**
* Make the front buffer visible. In some native displays, changes to the
* front buffer might not be visible immediately and require manual flush.
*/
boolean (*flush_frontbuffer)(struct native_surface *nsurf);
boolean (*present)(struct native_surface *nsurf,
enum native_attachment natt,
boolean preserve,
uint swap_interval);
/**
* Validate the buffers of the surface. textures, if not NULL, points to an
@ -181,6 +191,7 @@ struct native_display {
EGLNativePixmapType pix,
const struct native_config *nconf);
const struct native_display_buffer *buffer;
const struct native_display_modeset *modeset;
};
@ -232,4 +243,8 @@ native_get_drm_platform(void);
const struct native_platform *
native_get_fbdev_platform(void);
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_H_ */

59
src/gallium/state_trackers/egl/common/native_buffer.h Normal file
View file

@ -0,0 +1,59 @@
/*
* Mesa 3-D graphics library
* Version: 7.9
*
* Copyright (C) 2010 LunarG Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Chia-I Wu <olv@lunarg.com>
*/
#ifndef _NATIVE_BUFFER_H_
#define _NATIVE_BUFFER_H_
#include "pipe/p_compiler.h"
struct native_display;
struct pipe_resource;
/**
* Buffer interface of the native display. It allows native buffers to be
* imported and exported.
*
* Just like a native window or a native pixmap, a native buffer is another
* native type. Its definition depends on the native display.
*
* For DRM platform, the type of a native buffer is struct winsys_handle.
*/
struct native_display_buffer {
struct pipe_resource *(*import_buffer)(struct native_display *ndpy,
const struct pipe_resource *templ,
void *buf);
/**
* The resource must be creatred with PIPE_BIND_SHARED.
*/
boolean (*export_buffer)(struct native_display *ndpy,
struct pipe_resource *res,
void *buf);
};
#endif /* _NATIVE_BUFFER_H_ */

29
src/gallium/state_trackers/egl/drm/modeset.c
View file

@ -167,6 +167,32 @@ drm_surface_swap_buffers(struct native_surface *nsurf)
return TRUE;
}
static boolean
drm_surface_present(struct native_surface *nsurf,
enum native_attachment natt,
boolean preserve,
uint swap_interval)
{
boolean ret;
if (preserve || swap_interval)
return FALSE;
switch (natt) {
case NATIVE_ATTACHMENT_FRONT_LEFT:
ret = drm_surface_flush_frontbuffer(nsurf);
break;
case NATIVE_ATTACHMENT_BACK_LEFT:
ret = drm_surface_swap_buffers(nsurf);
break;
default:
ret = FALSE;
break;
}
return ret;
}
static void
drm_surface_wait(struct native_surface *nsurf)
{
@ -225,8 +251,7 @@ drm_display_create_surface(struct native_display *ndpy,
resource_surface_set_size(drmsurf->rsurf, drmsurf->width, drmsurf->height);
drmsurf->base.destroy = drm_surface_destroy;
drmsurf->base.swap_buffers = drm_surface_swap_buffers;
drmsurf->base.flush_frontbuffer = drm_surface_flush_frontbuffer;
drmsurf->base.present = drm_surface_present;
drmsurf->base.validate = drm_surface_validate;
drmsurf->base.wait = drm_surface_wait;

27
src/gallium/state_trackers/egl/drm/native_drm.c
View file

@ -103,6 +103,9 @@ drm_display_get_param(struct native_display *ndpy,
int val;
switch (param) {
case NATIVE_PARAM_USE_NATIVE_BUFFER:
case NATIVE_PARAM_PRESERVE_BUFFER:
case NATIVE_PARAM_MAX_SWAP_INTERVAL:
default:
val = 0;
break;
@ -182,6 +185,29 @@ drm_display_init_screen(struct native_display *ndpy)
return TRUE;
}
static struct pipe_resource *
drm_display_import_buffer(struct native_display *ndpy,
const struct pipe_resource *templ,
void *buf)
{
return ndpy->screen->resource_from_handle(ndpy->screen,
templ, (struct winsys_handle *) buf);
}
static boolean
drm_display_export_buffer(struct native_display *ndpy,
struct pipe_resource *res,
void *buf)
{
return ndpy->screen->resource_get_handle(ndpy->screen,
res, (struct winsys_handle *) buf);
}
static struct native_display_buffer drm_display_buffer = {
drm_display_import_buffer,
drm_display_export_buffer
};
static struct native_display *
drm_create_display(int fd, struct native_event_handler *event_handler,
void *user_data)
@ -205,6 +231,7 @@ drm_create_display(int fd, struct native_event_handler *event_handler,
drmdpy->base.get_param = drm_display_get_param;
drmdpy->base.get_configs = drm_display_get_configs;
drmdpy->base.buffer = &drm_display_buffer;
drm_display_init_modeset(&drmdpy->base);
return &drmdpy->base;

32
src/gallium/state_trackers/egl/fbdev/native_fbdev.c
View file

@ -137,6 +137,32 @@ fbdev_surface_swap_buffers(struct native_surface *nsurf)
return ret;
}
static boolean
fbdev_surface_present(struct native_surface *nsurf,
enum native_attachment natt,
boolean preserve,
uint swap_interval)
{
boolean ret;
if (preserve || swap_interval)
return FALSE;
switch (natt) {
case NATIVE_ATTACHMENT_FRONT_LEFT:
ret = fbdev_surface_flush_frontbuffer(nsurf);
break;
case NATIVE_ATTACHMENT_BACK_LEFT:
ret = fbdev_surface_swap_buffers(nsurf);
break;
default:
ret = FALSE;
break;
}
return ret;
}
static void
fbdev_surface_wait(struct native_surface *nsurf)
{
@ -181,8 +207,7 @@ fbdev_display_create_scanout_surface(struct native_display *ndpy,
resource_surface_set_size(fbsurf->rsurf, fbsurf->width, fbsurf->height);
fbsurf->base.destroy = fbdev_surface_destroy;
fbsurf->base.swap_buffers = fbdev_surface_swap_buffers;
fbsurf->base.flush_frontbuffer = fbdev_surface_flush_frontbuffer;
fbsurf->base.present = fbdev_surface_present;
fbsurf->base.validate = fbdev_surface_validate;
fbsurf->base.wait = fbdev_surface_wait;
@ -279,6 +304,9 @@ fbdev_display_get_param(struct native_display *ndpy,
int val;
switch (param) {
case NATIVE_PARAM_USE_NATIVE_BUFFER:
case NATIVE_PARAM_PRESERVE_BUFFER:
case NATIVE_PARAM_MAX_SWAP_INTERVAL:
default:
val = 0;
break;

31
src/gallium/state_trackers/egl/gdi/native_gdi.c
View file

@ -159,6 +159,32 @@ gdi_surface_swap_buffers(struct native_surface *nsurf)
return ret;
}
static boolean
gdi_surface_present(struct native_surface *nsurf,
enum native_attachment natt,
boolean preserve,
uint swap_interval)
{
boolean ret;
if (preserve || swap_interval)
return FALSE;
switch (natt) {
case NATIVE_ATTACHMENT_FRONT_LEFT:
ret = gdi_surface_flush_frontbuffer(nsurf);
break;
case NATIVE_ATTACHMENT_BACK_LEFT:
ret = gdi_surface_swap_buffers(nsurf);
break;
default:
ret = FALSE;
break;
}
return ret;
}
static boolean
gdi_surface_validate(struct native_surface *nsurf, uint attachment_mask,
unsigned int *seq_num, struct pipe_resource **textures,
@ -231,8 +257,7 @@ gdi_display_create_window_surface(struct native_display *ndpy,
gdi_surface_update_geometry(&gsurf->base);
gsurf->base.destroy = gdi_surface_destroy;
gsurf->base.swap_buffers = gdi_surface_swap_buffers;
gsurf->base.flush_frontbuffer = gdi_surface_flush_frontbuffer;
gsurf->base.present = gdi_surface_present;
gsurf->base.validate = gdi_surface_validate;
gsurf->base.wait = gdi_surface_wait;
@ -321,6 +346,8 @@ gdi_display_get_param(struct native_display *ndpy,
/* private buffers are allocated */
val = FALSE;
break;
case NATIVE_PARAM_PRESERVE_BUFFER:
case NATIVE_PARAM_MAX_SWAP_INTERVAL:
default:
val = 0;
break;

36
src/gallium/state_trackers/egl/x11/native_dri2.c
View file

@ -337,6 +337,32 @@ dri2_surface_swap_buffers(struct native_surface *nsurf)
return TRUE;
}
static boolean
dri2_surface_present(struct native_surface *nsurf,
enum native_attachment natt,
boolean preserve,
uint swap_interval)
{
boolean ret;
if (swap_interval)
return FALSE;
switch (natt) {
case NATIVE_ATTACHMENT_FRONT_LEFT:
ret = dri2_surface_flush_frontbuffer(nsurf);
break;
case NATIVE_ATTACHMENT_BACK_LEFT:
ret = dri2_surface_swap_buffers(nsurf);
break;
default:
ret = FALSE;
break;
}
return ret;
}
static boolean
dri2_surface_validate(struct native_surface *nsurf, uint attachment_mask,
unsigned int *seq_num, struct pipe_resource **textures,
@ -430,8 +456,7 @@ dri2_display_create_surface(struct native_display *ndpy,
dri2surf->color_format = dri2conf->base.color_format;
dri2surf->base.destroy = dri2_surface_destroy;
dri2surf->base.swap_buffers = dri2_surface_swap_buffers;
dri2surf->base.flush_frontbuffer = dri2_surface_flush_frontbuffer;
dri2surf->base.present = dri2_surface_present;
dri2surf->base.validate = dri2_surface_validate;
dri2surf->base.wait = dri2_surface_wait;
@ -630,9 +655,14 @@ dri2_display_get_param(struct native_display *ndpy,
switch (param) {
case NATIVE_PARAM_USE_NATIVE_BUFFER:
/* DRI2GetBuffers use the native buffers */
/* DRI2GetBuffers uses the native buffers */
val = TRUE;
break;
case NATIVE_PARAM_PRESERVE_BUFFER:
/* DRI2CopyRegion is used */
val = TRUE;
break;
case NATIVE_PARAM_MAX_SWAP_INTERVAL:
default:
val = 0;
break;

1
src/gallium/state_trackers/egl/x11/native_x11.h
View file

@ -27,6 +27,7 @@
#define _NATIVE_X11_H_
#include "common/native.h"
#include <X11/Xlib.h>
struct native_display *
x11_create_ximage_display(Display *dpy,

31
src/gallium/state_trackers/egl/x11/native_ximage.c
View file

@ -174,6 +174,32 @@ ximage_surface_swap_buffers(struct native_surface *nsurf)
return ret;
}
static boolean
ximage_surface_present(struct native_surface *nsurf,
enum native_attachment natt,
boolean preserve,
uint swap_interval)
{
boolean ret;
if (preserve || swap_interval)
return FALSE;
switch (natt) {
case NATIVE_ATTACHMENT_FRONT_LEFT:
ret = ximage_surface_flush_frontbuffer(nsurf);
break;
case NATIVE_ATTACHMENT_BACK_LEFT:
ret = ximage_surface_swap_buffers(nsurf);
break;
default:
ret = FALSE;
break;
}
return ret;
}
static boolean
ximage_surface_validate(struct native_surface *nsurf, uint attachment_mask,
unsigned int *seq_num, struct pipe_resource **textures,
@ -257,8 +283,7 @@ ximage_display_create_surface(struct native_display *ndpy,
xsurf->xdraw.drawable = xsurf->drawable;
xsurf->base.destroy = ximage_surface_destroy;
xsurf->base.swap_buffers = ximage_surface_swap_buffers;
xsurf->base.flush_frontbuffer = ximage_surface_flush_frontbuffer;
xsurf->base.present = ximage_surface_present;
xsurf->base.validate = ximage_surface_validate;
xsurf->base.wait = ximage_surface_wait;
@ -416,6 +441,8 @@ ximage_display_get_param(struct native_display *ndpy,
/* private buffers are allocated */
val = FALSE;
break;
case NATIVE_PARAM_PRESERVE_BUFFER:
case NATIVE_PARAM_MAX_SWAP_INTERVAL:
default:
val = 0;
break;

37
src/gallium/state_trackers/glx/xlib/SConscript
View file

@ -3,25 +3,24 @@
Import('*')
if env['platform'] == 'linux' \
and 'mesa' in env['statetrackers']:
env = env.Clone()
env = env.Clone()
env.Append(CPPPATH = [
'#/src/mapi',
'#/src/mesa',
'#/src/mesa/main',
])
env.Append(CPPPATH = [
'#/src/mapi',
'#/src/mesa',
'#/src/mesa/main',
])
sources = [
'glx_api.c',
'glx_getproc.c',
'glx_usefont.c',
'xm_api.c',
'xm_st.c',
]
st_xlib = env.ConvenienceLibrary(
target = 'st_xlib',
source = [
'glx_api.c',
'glx_getproc.c',
'glx_usefont.c',
'xm_api.c',
'xm_st.c',
]
)
Export('st_xlib')
st_xlib = env.ConvenienceLibrary(
target = 'st_xlib',
source = sources,
)
Export('st_xlib')

99
src/gallium/state_trackers/python/SConscript
View file

@ -3,57 +3,64 @@ import os.path
Import('*')
if 'python' in env['statetrackers']:
if env['toolchain'] == 'crossmingw':
# Cross-compilation not supported
Return()
env = env.Clone()
env.Tool('python')
env.Tool('swig')
env.Append(SWIGPATH = ['#src/gallium/include', '#src/gallium/include/pipe'])
env.Append(SWIGFLAGS = ['-python', '-keyword'])
env.Append(CPPPATH = '.')
if not env.Detect(['swig']):
Return()
if env['platform'] == 'windows':
env.Append(LIBS = [
'opengl32',
'gdi32',
'user32',
'kernel32',
'ws2_32',
])
else:
env.Append(CPPDEFINES = ['GCC_HASCLASSVISIBILITY'])
env.Append(LIBS = [
'GL',
'X11',
])
env = env.Clone()
sources = [
'gallium.i',
'st_device.c',
'st_sample.c',
'st_hardpipe_winsys.c',
'st_softpipe_winsys.c',
]
env.Tool('python')
env.Prepend(LIBS = [
ws_null,
trace,
gallium,
env.Tool('swig')
env.Append(SWIGPATH = ['#src/gallium/include', '#src/gallium/include/pipe'])
env.Append(SWIGFLAGS = ['-python', '-keyword'])
env.Append(CPPPATH = '.')
if env['platform'] == 'windows':
env.Append(LIBS = [
'opengl32',
'gdi32',
'user32',
'kernel32',
'ws2_32',
])
else:
env.Append(CPPDEFINES = ['GCC_HASCLASSVISIBILITY'])
env.Append(LIBS = [
'GL',
'X11',
])
if env['llvm']:
env.Append(CPPDEFINES = ['HAVE_LLVMPIPE'])
env.Prepend(LIBS = [llvmpipe])
if True:
env.Append(CPPDEFINES = ['HAVE_SOFTPIPE'])
env.Prepend(LIBS = [softpipe])
sources = [
'gallium.i',
'st_device.c',
'st_sample.c',
'st_hardpipe_winsys.c',
'st_softpipe_winsys.c',
]
env['no_import_lib'] = 1
env.Prepend(LIBS = [
ws_null,
trace,
gallium,
])
env.SharedLibrary(
target = '_gallium',
source = sources,
)
if env['llvm']:
env.Append(CPPDEFINES = ['HAVE_LLVMPIPE'])
env.Prepend(LIBS = [llvmpipe])
if True:
env.Append(CPPDEFINES = ['HAVE_SOFTPIPE'])
env.Prepend(LIBS = [softpipe])
env['no_import_lib'] = 1
pyst = env.SharedLibrary(
target = '_gallium',
source = sources,
)
env.Alias('python', pyst)

81
src/gallium/state_trackers/vega/SConscript
View file

@ -3,49 +3,48 @@
Import('*')
if 'egl' in env['statetrackers']:
env = env.Clone()
env = env.Clone()
env.Append(CPPPATH = [
'#/src/mapi',
])
env.Append(CPPPATH = [
'#/src/mapi',
])
vega_sources = [
'api.c',
'api_context.c',
'api_filters.c',
'api_images.c',
'api_masks.c',
'api_misc.c',
'api_paint.c',
'api_params.c',
'api_path.c',
'api_text.c',
'api_transform.c',
'vgu.c',
'vg_context.c',
'vg_manager.c',
'vg_state.c',
'vg_translate.c',
'polygon.c',
'bezier.c',
'path.c',
'paint.c',
'arc.c',
'image.c',
'renderer.c',
'stroker.c',
'mask.c',
'shader.c',
'shaders_cache.c',
]
vega_sources = [
'api.c',
'api_context.c',
'api_filters.c',
'api_images.c',
'api_masks.c',
'api_misc.c',
'api_paint.c',
'api_params.c',
'api_path.c',
'api_text.c',
'api_transform.c',
'vgu.c',
'vg_context.c',
'vg_manager.c',
'vg_state.c',
'vg_translate.c',
'polygon.c',
'bezier.c',
'path.c',
'paint.c',
'arc.c',
'image.c',
'renderer.c',
'stroker.c',
'mask.c',
'shader.c',
'shaders_cache.c',
]
# vgapi_header must be generated first
env.Depends(vega_sources, vgapi_header)
# vgapi_header must be generated first
env.Depends(vega_sources, vgapi_header)
st_vega = env.ConvenienceLibrary(
target = 'st_vega',
source = vega_sources,
)
st_vega = env.ConvenienceLibrary(
target = 'st_vega',
source = vega_sources,
)
Export('st_vega')
Export('st_vega')

2
src/gallium/state_trackers/vega/api_filters.c
View file

@ -37,10 +37,8 @@
#include "pipe/p_state.h"
#include "util/u_inlines.h"
#include "pipe/p_screen.h"
#include "pipe/p_shader_tokens.h"
#include "util/u_format.h"
#include "util/u_memory.h"
#include "util/u_sampler.h"
#include "util/u_string.h"

2
src/gallium/state_trackers/vega/api_images.c
View file

@ -36,9 +36,7 @@
#include "pipe/p_context.h"
#include "pipe/p_screen.h"
#include "util/u_inlines.h"
#include "util/u_blit.h"
#include "util/u_tile.h"
#include "util/u_memory.h"
static INLINE VGboolean supported_image_format(VGImageFormat format)
{

2
src/gallium/state_trackers/vega/api_masks.c
View file

@ -27,7 +27,6 @@
#include "VG/openvg.h"
#include "mask.h"
#include "renderer.h"
#include "api.h"
#include "vg_context.h"
@ -36,7 +35,6 @@
#include "util/u_pack_color.h"
#include "util/u_draw_quad.h"
#include "util/u_memory.h"
#define DISABLE_1_1_MASKING 1

1
src/gallium/state_trackers/vega/api_paint.c
View file

@ -28,7 +28,6 @@
#include "vg_context.h"
#include "paint.h"
#include "image.h"
#include "api.h"
VGPaint vegaCreatePaint(void)

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