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v3d: Enable TFU blits with raster destinations on 7.1 HW (RPi5)
We take advantage or fixing a typo in TFU_IOC formats defines when adding the TFU_IOC_RASTER FORMAT. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38910>
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2 changed files with 15 additions and 9 deletions
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@ -51,11 +51,12 @@
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/* Disable level 0 write, just write following mipmaps */
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#define V3D71_TFU_IOC_DIMTW (1 << 0)
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#define V3D71_TFU_IOC_FORMAT_SHIFT 12
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#define V3D71_TFU_IOC_FORMAT_RASTER 0
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#define V3D71_TFU_IOC_FORMAT_LINEARTILE 3
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#define V3D71_TFU_IOA_FORMAT_UBLINEAR_1_COLUMN 4
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#define V3D71_TFU_IOA_FORMAT_UBLINEAR_2_COLUMN 5
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#define V3D71_TFU_IOA_FORMAT_UIF_NO_XOR 6
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#define V3D71_TFU_IOA_FORMAT_UIF_XOR 7
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#define V3D71_TFU_IOC_FORMAT_UBLINEAR_1_COLUMN 4
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#define V3D71_TFU_IOC_FORMAT_UBLINEAR_2_COLUMN 5
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#define V3D71_TFU_IOC_FORMAT_UIF_NO_XOR 6
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#define V3D71_TFU_IOC_FORMAT_UIF_XOR 7
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#define V3D71_TFU_IOC_STRIDE_SHIFT 16
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#define V3D71_TFU_IOC_NUMMM_SHIFT 4
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@ -56,9 +56,11 @@ v3dX(tfu)(struct pipe_context *pctx,
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if (pdst->target != PIPE_TEXTURE_2D || psrc->target != PIPE_TEXTURE_2D)
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return false;
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#if V3D_VERSION == 42
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/* Can't write to raster. */
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if (dst_base_slice->tiling == V3D_TILING_RASTER)
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return false;
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#endif
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/* When using TFU for blit, we are doing exact copies (both input and
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* output format must be the same, no scaling, etc), so there is no
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@ -84,7 +86,6 @@ v3dX(tfu)(struct pipe_context *pctx,
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assert(for_mipmap);
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return false;
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}
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MESA_TRACE_FUNC();
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v3d_flush_jobs_writing_resource(v3d, psrc, V3D_FLUSH_DEFAULT, false);
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@ -171,9 +172,13 @@ v3dX(tfu)(struct pipe_context *pctx,
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if (last_level != base_level)
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tfu.v71.ioc |= V3D71_TFU_IOC_DIMTW;
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tfu.v71.ioc |= ((V3D71_TFU_IOC_FORMAT_LINEARTILE +
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(dst_base_slice->tiling - V3D_TILING_LINEARTILE)) <<
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V3D71_TFU_IOC_FORMAT_SHIFT);
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if (dst_base_slice->tiling == V3D_TILING_RASTER) {
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tfu.v71.ioc |= V3D71_TFU_IOC_FORMAT_RASTER << V3D71_TFU_IOC_FORMAT_SHIFT;
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} else {
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tfu.v71.ioc |= ((V3D71_TFU_IOC_FORMAT_LINEARTILE +
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(dst_base_slice->tiling - V3D_TILING_LINEARTILE)) <<
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V3D71_TFU_IOC_FORMAT_SHIFT);
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}
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switch (dst_base_slice->tiling) {
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case V3D_TILING_UIF_NO_XOR:
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@ -183,7 +188,7 @@ v3dX(tfu)(struct pipe_context *pctx,
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V3D71_TFU_IOC_STRIDE_SHIFT;
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break;
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case V3D_TILING_RASTER:
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tfu.v71.ioc |= (dst_base_slice->padded_height / dst->cpp) <<
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tfu.v71.ioc |= (dst_base_slice->stride / dst->cpp) <<
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V3D71_TFU_IOC_STRIDE_SHIFT;
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break;
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default:
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