From 19580dfae1c8453b953cfebbd165f7bdc32f72db Mon Sep 17 00:00:00 2001 From: Jose Maria Casanova Crespo Date: Wed, 26 Nov 2025 11:38:06 +0100 Subject: [PATCH] v3d: Enable TFU blits with raster destinations on 7.1 HW (RPi5) We take advantage or fixing a typo in TFU_IOC formats defines when adding the TFU_IOC_RASTER FORMAT. Reviewed-by: Iago Toral Quiroga Part-of: --- src/broadcom/common/v3d_tfu.h | 9 +++++---- src/gallium/drivers/v3d/v3dx_tfu.c | 15 ++++++++++----- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/src/broadcom/common/v3d_tfu.h b/src/broadcom/common/v3d_tfu.h index 572d0074794..f6a880f062c 100644 --- a/src/broadcom/common/v3d_tfu.h +++ b/src/broadcom/common/v3d_tfu.h @@ -51,11 +51,12 @@ /* Disable level 0 write, just write following mipmaps */ #define V3D71_TFU_IOC_DIMTW (1 << 0) #define V3D71_TFU_IOC_FORMAT_SHIFT 12 +#define V3D71_TFU_IOC_FORMAT_RASTER 0 #define V3D71_TFU_IOC_FORMAT_LINEARTILE 3 -#define V3D71_TFU_IOA_FORMAT_UBLINEAR_1_COLUMN 4 -#define V3D71_TFU_IOA_FORMAT_UBLINEAR_2_COLUMN 5 -#define V3D71_TFU_IOA_FORMAT_UIF_NO_XOR 6 -#define V3D71_TFU_IOA_FORMAT_UIF_XOR 7 +#define V3D71_TFU_IOC_FORMAT_UBLINEAR_1_COLUMN 4 +#define V3D71_TFU_IOC_FORMAT_UBLINEAR_2_COLUMN 5 +#define V3D71_TFU_IOC_FORMAT_UIF_NO_XOR 6 +#define V3D71_TFU_IOC_FORMAT_UIF_XOR 7 #define V3D71_TFU_IOC_STRIDE_SHIFT 16 #define V3D71_TFU_IOC_NUMMM_SHIFT 4 diff --git a/src/gallium/drivers/v3d/v3dx_tfu.c b/src/gallium/drivers/v3d/v3dx_tfu.c index a7126b291ff..7df9599ead3 100644 --- a/src/gallium/drivers/v3d/v3dx_tfu.c +++ b/src/gallium/drivers/v3d/v3dx_tfu.c @@ -56,9 +56,11 @@ v3dX(tfu)(struct pipe_context *pctx, if (pdst->target != PIPE_TEXTURE_2D || psrc->target != PIPE_TEXTURE_2D) return false; +#if V3D_VERSION == 42 /* Can't write to raster. */ if (dst_base_slice->tiling == V3D_TILING_RASTER) return false; +#endif /* When using TFU for blit, we are doing exact copies (both input and * output format must be the same, no scaling, etc), so there is no @@ -84,7 +86,6 @@ v3dX(tfu)(struct pipe_context *pctx, assert(for_mipmap); return false; } - MESA_TRACE_FUNC(); v3d_flush_jobs_writing_resource(v3d, psrc, V3D_FLUSH_DEFAULT, false); @@ -171,9 +172,13 @@ v3dX(tfu)(struct pipe_context *pctx, if (last_level != base_level) tfu.v71.ioc |= V3D71_TFU_IOC_DIMTW; - tfu.v71.ioc |= ((V3D71_TFU_IOC_FORMAT_LINEARTILE + - (dst_base_slice->tiling - V3D_TILING_LINEARTILE)) << - V3D71_TFU_IOC_FORMAT_SHIFT); + if (dst_base_slice->tiling == V3D_TILING_RASTER) { + tfu.v71.ioc |= V3D71_TFU_IOC_FORMAT_RASTER << V3D71_TFU_IOC_FORMAT_SHIFT; + } else { + tfu.v71.ioc |= ((V3D71_TFU_IOC_FORMAT_LINEARTILE + + (dst_base_slice->tiling - V3D_TILING_LINEARTILE)) << + V3D71_TFU_IOC_FORMAT_SHIFT); + } switch (dst_base_slice->tiling) { case V3D_TILING_UIF_NO_XOR: @@ -183,7 +188,7 @@ v3dX(tfu)(struct pipe_context *pctx, V3D71_TFU_IOC_STRIDE_SHIFT; break; case V3D_TILING_RASTER: - tfu.v71.ioc |= (dst_base_slice->padded_height / dst->cpp) << + tfu.v71.ioc |= (dst_base_slice->stride / dst->cpp) << V3D71_TFU_IOC_STRIDE_SHIFT; break; default: