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intel/compiler: add more validation for acc register usage

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This is described in Wa_14014617373 and a programming note has
been added to specification.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23682>
This commit is contained in:
Tapani Pälli 2023-03-08 13:21:48 +02:00 • committed by Marge Bot
parent 836990b651
commit 12d7aaf2b8
1 changed files with 11 additions and 0 deletions
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11
src/intel/compiler/brw_fs_validate.cpp
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@ -192,6 +192,17 @@ fs_visitor::validate()
alloc.sizes[inst->src[i].nr]); alloc.sizes[inst->src[i].nr]);
} }
} }
/* Accumulator Registers, bspec 47251:
*
* "When destination is accumulator with offset 0, destination
* horizontal stride must be 1."
*/
if (intel_needs_workaround(devinfo, 14014617373) &&
inst->dst.is_accumulator() &&
inst->dst.offset == 0) {
fsv_assert_eq(inst->dst.stride, 1);
}
} }
#endif #endif
} }