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i965: Apply the miptree offset to surface state for renderbuffers
Previously, we were completely ignoring the mt->offset field for renderbuffers. While it does have some alignment constraints, it is valid to use it. This patch adds the code to each of the 4 surface state setup functions to handle it. Reviewed-by: Neil Roberts <neil@linux.intel.com>
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4 changed files with 8 additions and 4 deletions
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@ -658,8 +658,9 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
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format << BRW_SURFACE_FORMAT_SHIFT);
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/* reloc */
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assert(mt->offset % mt->cpp == 0);
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surf[1] = (intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y) +
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mt->bo->offset64);
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mt->bo->offset64 + mt->offset);
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surf[2] = ((rb->Width - 1) << BRW_SURFACE_WIDTH_SHIFT |
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(rb->Height - 1) << BRW_SURFACE_HEIGHT_SHIFT);
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@ -97,7 +97,8 @@ gen6_update_renderbuffer_surface(struct brw_context *brw,
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SET_FIELD(format, BRW_SURFACE_FORMAT);
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/* reloc */
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surf[1] = mt->bo->offset64;
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assert(mt->offset % mt->cpp == 0);
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surf[1] = mt->bo->offset64 + mt->offset;
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/* In the gen6 PRM Volume 1 Part 1: Graphics Core, Section 7.18.3.7.1
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* (Surface Arrays For all surfaces other than separate stencil buffer):
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@ -517,7 +517,8 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
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surf[0] |= GEN7_SURFACE_IS_ARRAY;
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}
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surf[1] = mt->bo->offset64;
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assert(mt->offset % mt->cpp == 0);
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surf[1] = mt->bo->offset64 + mt->offset;
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assert(brw->has_surface_tile_offset);
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@ -432,7 +432,8 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
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SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) |
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SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A);
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*((uint64_t *) &surf[8]) = mt->bo->offset64; /* reloc */
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assert(mt->offset % mt->cpp == 0);
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*((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */
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if (aux_mt) {
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*((uint64_t *) &surf[10]) = aux_mt->bo->offset64;
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