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radv/gfx10: add missing dcc_tile_swizzle tweak

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Fixes: c90f46700d ("radv/gfx10: mask DCC tile swizzle by alignment")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset 2019-08-01 15:45:11 +02:00
parent 9c9745e8dd
commit 10d08da52c
1 changed files with 3 additions and 1 deletions
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4
src/amd/vulkan/radv_image.c
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@ -484,7 +484,9 @@ si_set_mutable_tex_desc_fields(struct radv_device *device,
if (chip_class <= GFX8) if (chip_class <= GFX8)
meta_va += base_level_info->dcc_offset; meta_va += base_level_info->dcc_offset;
meta_va |= (uint32_t)plane->surface.tile_swizzle << 8; unsigned dcc_tile_swizzle = plane->surface.tile_swizzle << 8;
dcc_tile_swizzle &= plane->surface.dcc_alignment - 1;
meta_va |= dcc_tile_swizzle;
} else if (!is_storage_image && } else if (!is_storage_image &&
radv_image_is_tc_compat_htile(image)) { radv_image_is_tc_compat_htile(image)) {
meta_va = gpu_address + image->htile_offset; meta_va = gpu_address + image->htile_offset;