fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-08 12:50:12 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

broadcom/compiler: prepare TMU spilling code to account for TMU pipelining

Browse source 
Follow-up patches will implement support for TMU pipelining in the
compiler, which basically means that we will be able to have more
than one outstanding TMU operation.

Our spilling code currently relies on properly identifying the end
of a TMU sequence (since we can't emit a new TMU sequence for a spill
in the middle of an existing TMU sequence), however, that code expects
that only one TMU sequence may be outstanding, which won't be true
once we implement pipelining.

This change fixes the 'end of TMU sequence' checks to account for this
in preparation for upcoming patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8825>
This commit is contained in:
Iago Toral Quiroga 2021-01-27 13:00:30 +01:00 • committed by Marge Bot
parent 3926030183
commit 0e96f0f8cd
1 changed files with 9 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
src/broadcom/compiler/vir_register_allocate.c
View file

@ -44,17 +44,20 @@ qinst_writes_tmu(struct qinst *inst)
static bool
is_end_of_tmu_sequence(struct qinst *inst, struct qblock *block)
{
if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
inst->qpu.alu.add.op == V3D_QPU_A_TMUWT)
return true;
if (!inst->qpu.sig.ldtmu)
if (!inst->qpu.sig.ldtmu &&
!(inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
inst->qpu.alu.add.op != V3D_QPU_A_TMUWT)) {
return false;
}
list_for_each_entry_from(struct qinst, scan_inst, inst->link.next,
&block->instructions, link) {
if (scan_inst->qpu.sig.ldtmu)
if (scan_inst->qpu.sig.ldtmu ||
(inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
inst->qpu.alu.add.op == V3D_QPU_A_TMUWT)) {
return false;
}
if (qinst_writes_tmu(scan_inst))
return true;
}