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intel/compiler: Handle new sampler descriptor fields for 16bit sampler

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Update return format field and add SIMD Mode [2] field in sampler
descriptor. Now we can tell sampler to return data in either 32/16 bit
format precision.

v1:
- Drop unnecessary descriptor fields (Jason)
- Handle return format (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11766>
This commit is contained in:
Topi Pohjolainen 2020-07-07 17:40:49 -07:00 • committed by Sagar Ghuge
parent f78e33aa1a
commit 0e61d1fbbb
1 changed files with 12 additions and 0 deletions
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12
src/intel/compiler/brw_eu.h
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@ -396,6 +396,18 @@ brw_sampler_desc(const struct intel_device_info *devinfo,
{
const unsigned desc = (SET_BITS(binding_table_index, 7, 0) |
SET_BITS(sampler, 11, 8));
/* From the CHV Bspec: Shared Functions - Message Descriptor -
* Sampling Engine:
*
* SIMD Mode[2] 29 This field is the upper bit of the 3-bit
* SIMD Mode field.
*/
if (devinfo->ver >= 8)
return desc | SET_BITS(msg_type, 16, 12) |
SET_BITS(simd_mode & 0x3, 18, 17) |
SET_BITS(simd_mode >> 2, 29, 29) |
SET_BITS(return_format, 30, 30);
if (devinfo->ver >= 7)
return (desc | SET_BITS(msg_type, 16, 12) |
SET_BITS(simd_mode, 18, 17));