From 0e61d1fbbb4ad67c03316a56787e8c48d957aa7a Mon Sep 17 00:00:00 2001 From: Topi Pohjolainen Date: Tue, 7 Jul 2020 17:40:49 -0700 Subject: [PATCH] intel/compiler: Handle new sampler descriptor fields for 16bit sampler Update return format field and add SIMD Mode [2] field in sampler descriptor. Now we can tell sampler to return data in either 32/16 bit format precision. v1: - Drop unnecessary descriptor fields (Jason) - Handle return format (Jason) Reviewed-by: Jason Ekstrand Reviewed-by: Francisco Jerez Part-of: --- src/intel/compiler/brw_eu.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index 11f2734e175..99de21d8742 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -396,6 +396,18 @@ brw_sampler_desc(const struct intel_device_info *devinfo, { const unsigned desc = (SET_BITS(binding_table_index, 7, 0) | SET_BITS(sampler, 11, 8)); + + /* From the CHV Bspec: Shared Functions - Message Descriptor - + * Sampling Engine: + * + * SIMD Mode[2] 29 This field is the upper bit of the 3-bit + * SIMD Mode field. + */ + if (devinfo->ver >= 8) + return desc | SET_BITS(msg_type, 16, 12) | + SET_BITS(simd_mode & 0x3, 18, 17) | + SET_BITS(simd_mode >> 2, 29, 29) | + SET_BITS(return_format, 30, 30); if (devinfo->ver >= 7) return (desc | SET_BITS(msg_type, 16, 12) | SET_BITS(simd_mode, 18, 17));