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anv: split 3DSTATE_VFG emission

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Leave the static part in genX_pipeline.c and only repack the dynamic
part in genX_gfx_state.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
This commit is contained in:
Lionel Landwerlin 2023-07-31 18:56:26 +03:00 • committed by Marge Bot
parent 1e081bd680
commit 0ce772bd19
3 changed files with 33 additions and 23 deletions
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1
src/intel/vulkan/anv_private.h
View file

@ -3589,6 +3589,7 @@ struct anv_graphics_pipeline {
uint32_t streamout_state[5]; uint32_t streamout_state[5];
uint32_t gs[10]; uint32_t gs[10];
uint32_t te[4]; uint32_t te[4];
uint32_t vfg[4];
} partial; } partial;
}; };

25
src/intel/vulkan/genX_gfx_state.c
View file

@ -1119,30 +1119,9 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
#if GFX_VERx10 >= 125 #if GFX_VERx10 >= 125
if ((cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE) || if ((cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_IA_PRIMITIVE_RESTART_ENABLE)) { BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_IA_PRIMITIVE_RESTART_ENABLE)) {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VFG), vfg) { anv_batch_emit_merge(&cmd_buffer->batch, GENX(3DSTATE_VFG),
/* If 3DSTATE_TE: TE Enable == 1 then RR_STRICT else RR_FREE*/ pipeline->partial.vfg, vfg) {
vfg.DistributionMode =
anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL) ? RR_STRICT :
RR_FREE;
vfg.DistributionGranularity = BatchLevelGranularity;
/* Wa_14014890652 */
if (intel_device_info_is_dg2(cmd_buffer->device->info))
vfg.GranularityThresholdDisable = 1;
vfg.ListCutIndexEnable = dyn->ia.primitive_restart_enable; vfg.ListCutIndexEnable = dyn->ia.primitive_restart_enable;
/* 192 vertices for TRILIST_ADJ */
vfg.ListNBatchSizeScale = 0;
/* Batch size of 384 vertices */
vfg.List3BatchSizeScale = 2;
/* Batch size of 128 vertices */
vfg.List2BatchSizeScale = 1;
/* Batch size of 128 vertices */
vfg.List1BatchSizeScale = 2;
/* Batch size of 256 vertices for STRIP topologies */
vfg.StripBatchSizeScale = 3;
/* 192 control points for PATCHLIST_3 */
vfg.PatchBatchSizeScale = 1;
/* 192 control points for PATCHLIST_3 */
vfg.PatchBatchSizeMultiplier = 31;
} }
} }
#endif #endif

30
src/intel/vulkan/genX_pipeline.c
View file

@ -303,6 +303,36 @@ emit_vertex_input(struct anv_graphics_pipeline *pipeline,
sgvs.XP2ElementOffset = drawid_slot; sgvs.XP2ElementOffset = drawid_slot;
} }
#endif #endif
#if GFX_VERx10 >= 125
struct anv_device *device = pipeline->base.base.device;
struct GENX(3DSTATE_VFG) vfg = {
GENX(3DSTATE_VFG_header),
/* If 3DSTATE_TE: TE Enable == 1 then RR_STRICT else RR_FREE*/
.DistributionMode =
anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL) ? RR_STRICT :
RR_FREE,
.DistributionGranularity = BatchLevelGranularity,
};
/* Wa_14014890652 */
if (intel_device_info_is_dg2(device->info))
vfg.GranularityThresholdDisable = 1;
/* 192 vertices for TRILIST_ADJ */
vfg.ListNBatchSizeScale = 0;
/* Batch size of 384 vertices */
vfg.List3BatchSizeScale = 2;
/* Batch size of 128 vertices */
vfg.List2BatchSizeScale = 1;
/* Batch size of 128 vertices */
vfg.List1BatchSizeScale = 2;
/* Batch size of 256 vertices for STRIP topologies */
vfg.StripBatchSizeScale = 3;
/* 192 control points for PATCHLIST_3 */
vfg.PatchBatchSizeScale = 1;
/* 192 control points for PATCHLIST_3 */
vfg.PatchBatchSizeMultiplier = 31;
GENX(3DSTATE_VFG_pack)(NULL, pipeline->partial.vfg, &vfg);
#endif
} }
void void