From 0cd0efbbf9dd76c939635a893293db8a21936111 Mon Sep 17 00:00:00 2001
From: Gert Wollny <gert.wollny@collabora.com>
Date: Thu, 11 Sep 2025 14:47:29 +0200
Subject: [PATCH] r600/sfn: Don't assign dest registers in non-write
 interpolation slots

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
---
 .../drivers/r600/sfn/sfn_shader_fs.cpp        | 52 +++++++++++++------
 1 file changed, 37 insertions(+), 15 deletions(-)

diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_fs.cpp b/src/gallium/drivers/r600/sfn/sfn_shader_fs.cpp
index 861780c7521..08030d22f3b 100644
--- a/src/gallium/drivers/r600/sfn/sfn_shader_fs.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_shader_fs.cpp
@@ -975,11 +975,18 @@ FragmentShaderEG::load_interpolated_one_comp(RegisterVec4& dest,
       if (op == op2_interp_z)
          chan += 2;
 
-      ir = new AluInstr(op,
-                        dest[chan],
-                        i & 1 ? params.j : params.i,
-                        new InlineConstant(ALU_SRC_PARAM_BASE + params.base, chan),
-                        i == 0 ? AluInstr::write : AluInstr::empty);
+      if (i == 0)
+         ir = new AluInstr(op,
+                           dest[chan],
+                           params.i,
+                           new InlineConstant(ALU_SRC_PARAM_BASE + params.base, chan),
+                           AluInstr::write);
+      else
+         ir = new AluInstr(op,
+                           chan,
+                           {params.j,
+                            new InlineConstant(ALU_SRC_PARAM_BASE + params.base, chan)},
+                           AluInstr::empty);
 
       ir->set_bank_swizzle(alu_vec_210);
       success = group->add_instruction(ir);
@@ -1002,11 +1009,18 @@ FragmentShaderEG::load_interpolated_two_comp(RegisterVec4& dest,
    assert(params.j);
    assert(params.i);
    for (unsigned i = 0; i < 4; ++i) {
-      ir = new AluInstr(op,
-                        dest[i],
-                        i & 1 ? params.j : params.i,
-                        new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
-                        (writemask & (1 << i)) ? AluInstr::write : AluInstr::empty);
+      if (writemask & (1 << i))
+         ir = new AluInstr(op,
+                           dest[i],
+                           i & 1 ? params.j : params.i,
+                           new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
+                           AluInstr::write);
+      else
+         ir = new AluInstr(op,
+                           i,
+                           {i & 1 ? params.j : params.i,
+                            new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i)},
+                           AluInstr::empty);
       ir->set_bank_swizzle(alu_vec_210);
       success = group->add_instruction(ir);
    }
@@ -1026,11 +1040,19 @@ FragmentShaderEG::load_interpolated_two_comp_for_one(RegisterVec4& dest,
    AluInstr *ir = nullptr;
 
    for (int i = 0; i < 4; ++i) {
-      ir = new AluInstr(op,
-                        dest[i],
-                        i & 1 ? params.j : params.i,
-                        new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
-                        i == comp ? AluInstr::write : AluInstr::empty);
+      if (i == comp) {
+         ir = new AluInstr(op,
+                           dest[i],
+                           i & 1 ? params.j : params.i,
+                           new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
+                           AluInstr::write);
+      } else {
+         ir = new AluInstr(op,
+                           i,
+                           {i & 1 ? params.j : params.i,
+                            new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i)},
+                           AluInstr::empty);
+      }
       ir->set_bank_swizzle(alu_vec_210);
       success = group->add_instruction(ir);
    }