etnaviv: move checking for MC2.0 for TS into screen init

The decision whether to use fast clear aka TS currently checks for two
feature bits: FAST_CEAR and MC20. We check for MC20, as TS on MC1.0 bypasses
the memory offset and we don't have any way to fixup the GPU address to
account for that. It could be done with some support of the kernel driver,
but then GPUs with MC1.0 are very rare to find these days, so not sure if we
are ever going to bother with that.

Instead of checking two separate feature bits to determine if TS can be used,
mask out the FAST_CLEAR bit from the features when MC20 isn't present. This
way we only have to check for a single feature bit.

CC: mesa-stable #22.2
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18232>

src/gallium/drivers/etnaviv/etnaviv_screen.c

@@ -926,6 +926,12 @@ etna_get_specs(struct etna_screen *screen)
 
    screen->specs.use_blt = VIV_FEATURE(screen, chipMinorFeatures5, BLT_ENGINE);
 
+   /* Only allow fast clear with MC2.0, as the TS unit bypasses the memory
+    * offset on MC1.0 and we have no way to fixup the address.
+    */
+   if (!VIV_FEATURE(screen, chipMinorFeatures0, MC20))
+      screen->features[viv_chipFeatures] &= ~chipFeatures_FAST_CLEAR;
+
    return true;
 
 fail:

src/gallium/drivers/etnaviv/etnaviv_surface.c

@@ -105,7 +105,6 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
     * offset and MMU. */
 
    if (VIV_FEATURE(screen, chipFeatures, FAST_CLEAR) &&
-       VIV_FEATURE(screen, chipMinorFeatures0, MC20) &&
        !rsc->ts_bo &&
        /* needs to be RS/BLT compatible for transfer_map/unmap */
        (rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 &&