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radv: don't set sx_blend_opt_epsilon for V_028C70_COLOR_10_11_11

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Matches radeonsi and PAL. From PAL:
// 1 is recommended, but doesn't provide sufficient precision

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4394
Fixes: ed94638156 ("radv: Enable RB+ where possible.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9427>
(cherry picked from commit 524848707b)
This commit is contained in:
Rhys Perry 2021-03-05 10:58:03 +00:00 • committed by Dylan Baker
parent b742fbae84
commit 08f9f29d6f
2 changed files with 2 additions and 4 deletions
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2
.pick_status.json
View file

@ -283,7 +283,7 @@
"description": "radv: don't set sx_blend_opt_epsilon for V_028C70_COLOR_10_11_11",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": "ed9463815644c85c124c72111d96e256db2986b4"
},

4
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -1234,10 +1234,8 @@ radv_emit_rbplus_state(struct radv_cmd_buffer *cmd_buffer)
break;
case V_028C70_COLOR_10_11_11:
if (spi_format == V_028714_SPI_SHADER_FP16_ABGR) {
if (spi_format == V_028714_SPI_SHADER_FP16_ABGR)
sx_ps_downconvert |= V_028754_SX_RT_EXPORT_10_11_11 << (i * 4);
sx_blend_opt_epsilon |= V_028758_11BIT_FORMAT << (i * 4);
}
break;
case V_028C70_COLOR_2_10_10_10: