fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-08 22:08:26 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

intel/genxml: set unused 3DSTATE_PS_EXTRA field as mbz

Browse source 
Wa_14015360517 mentions situations where HW produces invalid
occlusion query results when "Pixel Shader Does not write to RT"
bit is set.

"When Pixel Shader Kills Pixel is set, SW must perform a dummy render
 target write from the shader and not set this bit, so that Occlusion
 Query is correct."

Another situation is when writing to UAV or to NULL render target.
Patch sets field as 'must be zero' to discourage possible use of it.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20849>
This commit is contained in:
Tapani Pälli 2023-01-23 10:57:20 +02:00 • committed by Marge Bot
parent 205d40b8db
commit 0813c1a6fa
5 changed files with 8 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/intel/genxml/gen11.xml
View file

@ -2062,7 +2062,7 @@
</field>
<field name="Pixel Shader Kills Pixel" start="60" end="60" type="bool" />
<field name="oMask Present to Render Target" start="61" end="61" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="mbz" />
<field name="Pixel Shader Valid" start="63" end="63" type="bool" />
</instruction>
<instruction name="3DSTATE_PUSH_CONSTANT_ALLOC_DS" bias="2" length="2" engine="render">

4
src/intel/genxml/gen12.xml
View file

@ -2137,7 +2137,7 @@
</field>
<field name="Pixel Shader Kills Pixel" start="60" end="60" type="bool" />
<field name="oMask Present to Render Target" start="61" end="61" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="mbz" />
<field name="Pixel Shader Valid" start="63" end="63" type="bool" />
</instruction>
<instruction name="3DSTATE_PUSH_CONSTANT_ALLOC_DS" bias="2" length="2" engine="render">
@ -7178,4 +7178,4 @@
<register name="VS_INVOCATION_COUNT" length="2" num="0x2320">
<field name="VS Invocation Count Report" start="0" end="63" type="uint" />
</register>
</genxml>
</genxml>

2
src/intel/genxml/gen125.xml
View file

@ -2380,7 +2380,7 @@
</field>
<field name="Pixel Shader Kills Pixel" start="60" end="60" type="bool" />
<field name="oMask Present to Render Target" start="61" end="61" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="mbz" />
<field name="Pixel Shader Valid" start="63" end="63" type="bool" />
</instruction>
<instruction name="3DSTATE_PUSH_CONSTANT_ALLOC_DS" bias="2" length="2" engine="render">

4
src/intel/genxml/gen8.xml
View file

@ -1499,7 +1499,7 @@
</field>
<field name="Pixel Shader Kills Pixel" start="60" end="60" type="bool" />
<field name="oMask Present to Render Target" start="61" end="61" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="mbz" />
<field name="Pixel Shader Valid" start="63" end="63" type="bool" />
</instruction>
<instruction name="3DSTATE_PUSH_CONSTANT_ALLOC_DS" bias="2" length="2" engine="render">
@ -4744,4 +4744,4 @@
<register name="VS_INVOCATION_COUNT" length="2" num="0x2320">
<field name="VS Invocation Count Report" start="0" end="63" type="uint" />
</register>
</genxml>
</genxml>

4
src/intel/genxml/gen9.xml
View file

@ -1876,7 +1876,7 @@
</field>
<field name="Pixel Shader Kills Pixel" start="60" end="60" type="bool" />
<field name="oMask Present to Render Target" start="61" end="61" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="bool" />
<field name="Pixel Shader Does not write to RT" start="62" end="62" type="mbz" />
<field name="Pixel Shader Valid" start="63" end="63" type="bool" />
</instruction>
<instruction name="3DSTATE_PUSH_CONSTANT_ALLOC_DS" bias="2" length="2" engine="render">
@ -6541,4 +6541,4 @@
<register name="VS_INVOCATION_COUNT" length="2" num="0x2320">
<field name="VS Invocation Count Report" start="0" end="63" type="uint" />
</register>
</genxml>
</genxml>