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iris/gfx12.5: Allocate indirect color state for depth surfaces.
The clear color state has to be allocated since we will be sampling from non-WT HiZ CCS depth surfaces without disabling compression. Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31139>
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1 changed files with 9 additions and 4 deletions
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@ -659,12 +659,17 @@ iris_get_aux_clear_color_state_size(struct iris_screen *screen,
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assert(!isl_surf_usage_is_stencil(res->surf.usage));
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/* Depth packets can't specify indirect clear values. The only time depth
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* buffers can use indirect clear values is when they're accessed by the
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* sampler via render surface state objects.
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/* Depth packets can't specify indirect clear values. The only time
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* depth buffers can use indirect clear values is when they're
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* accessed by the sampler, either because HiZ can remain enabled
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* during sampling or because we have a HIZ_CCS_* usage that allows
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* us to keep the surface CCS-compressed during sampling with a
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* Gfx12.5 partial resolve.
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*/
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if (isl_surf_usage_is_depth(res->surf.usage) &&
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!iris_sample_with_depth_aux(screen->devinfo, res))
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!(iris_sample_with_depth_aux(screen->devinfo, res) ||
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(screen->devinfo->verx10 == 125 &&
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isl_aux_usage_has_ccs(res->aux.usage))))
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return 0;
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return screen->isl_dev.ss.clear_color_state_size;
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