iris/gfx12.5: Allocate indirect color state for depth surfaces.

The clear color state has to be allocated since we will be sampling
from non-WT HiZ CCS depth surfaces without disabling compression.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31139>
This commit is contained in:
Francisco Jerez 2024-09-11 21:53:00 -07:00 committed by Marge Bot
parent 8fdec3d161
commit 06e48229e6

View file

@ -659,12 +659,17 @@ iris_get_aux_clear_color_state_size(struct iris_screen *screen,
assert(!isl_surf_usage_is_stencil(res->surf.usage));
/* Depth packets can't specify indirect clear values. The only time depth
* buffers can use indirect clear values is when they're accessed by the
* sampler via render surface state objects.
/* Depth packets can't specify indirect clear values. The only time
* depth buffers can use indirect clear values is when they're
* accessed by the sampler, either because HiZ can remain enabled
* during sampling or because we have a HIZ_CCS_* usage that allows
* us to keep the surface CCS-compressed during sampling with a
* Gfx12.5 partial resolve.
*/
if (isl_surf_usage_is_depth(res->surf.usage) &&
!iris_sample_with_depth_aux(screen->devinfo, res))
!(iris_sample_with_depth_aux(screen->devinfo, res) ||
(screen->devinfo->verx10 == 125 &&
isl_aux_usage_has_ccs(res->aux.usage))))
return 0;
return screen->isl_dev.ss.clear_color_state_size;