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radeonsi: remove the extra handling for VS/TES primitive id

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We have moved si_nir_assign_param_offsets before output lowering
pass, so there won't be primitive id store output when VS/TES here.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
This commit is contained in:
Qiang Yu 2023-01-04 10:16:19 +08:00 • committed by Marge Bot
parent 59135678cf
commit 048d4de5e5
1 changed files with 0 additions and 9 deletions
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9
src/gallium/drivers/radeonsi/si_shader.c
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@ -1712,15 +1712,6 @@ static void si_nir_assign_param_offsets(nir_shader *nir, struct si_shader *shade
else
outputs_written |= BITFIELD64_BIT(sem.location);
/* primitive id output is added by ngg lowering, so we don't have its
* output info pre-build in si_shader_info. It's handled at last of
* this function.
*/
if ((nir->info.stage == MESA_SHADER_VERTEX ||
nir->info.stage == MESA_SHADER_TESS_EVAL) &&
sem.location == VARYING_SLOT_PRIMITIVE_ID)
continue;
/* Assign the param index if it's unassigned. */
if (nir_slot_is_varying(sem.location) && !sem.no_varying &&
(sem.gs_streams & 0x3) == 0 &&