From 048d4de5e59ee498eef6f01e8634556f7429ff4d Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Wed, 4 Jan 2023 10:16:19 +0800 Subject: [PATCH] radeonsi: remove the extra handling for VS/TES primitive id MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We have moved si_nir_assign_param_offsets before output lowering pass, so there won't be primitive id store output when VS/TES here. Reviewed-by: Marek Olšák Signed-off-by: Qiang Yu Part-of: --- src/gallium/drivers/radeonsi/si_shader.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index a3c85eac3cb..2caa95be07a 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1712,15 +1712,6 @@ static void si_nir_assign_param_offsets(nir_shader *nir, struct si_shader *shade else outputs_written |= BITFIELD64_BIT(sem.location); - /* primitive id output is added by ngg lowering, so we don't have its - * output info pre-build in si_shader_info. It's handled at last of - * this function. - */ - if ((nir->info.stage == MESA_SHADER_VERTEX || - nir->info.stage == MESA_SHADER_TESS_EVAL) && - sem.location == VARYING_SLOT_PRIMITIVE_ID) - continue; - /* Assign the param index if it's unassigned. */ if (nir_slot_is_varying(sem.location) && !sem.no_varying && (sem.gs_streams & 0x3) == 0 &&