From 02679a51fdde8745bbe7c724f4aa43a504b58c18 Mon Sep 17 00:00:00 2001 From: Karol Herbst Date: Sat, 28 Mar 2026 02:35:03 +0100 Subject: [PATCH] radeonsi: set valid_buffer_range for CL buffers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Seems like we never set the range for CL buffers which caused spurious test fails in the CL CTS. Cc: mesa-stable Reviewed-by: Marek Olšák Part-of: --- src/amd/ci/radeonsi-raven-fails.txt | 1 - src/gallium/drivers/radeonsi/si_compute.c | 5 ++++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/amd/ci/radeonsi-raven-fails.txt b/src/amd/ci/radeonsi-raven-fails.txt index 36a97d8c843..a849629daa5 100644 --- a/src/amd/ci/radeonsi-raven-fails.txt +++ b/src/amd/ci/radeonsi-raven-fails.txt @@ -46,7 +46,6 @@ api@clgetdeviceinfo,Fail api@clgetextensionfunctionaddressforplatform,Fail api@clgetkernelarginfo,Fail api@cllinkprogram,Fail -custom@r600 create release buffer bug,Fail program@build@vector-data-types,Fail program@execute@builtin@builtin-float-nextafter-1.0.generated,Fail program@execute@builtin@builtin-float-nextafter-1.0.generated@nextafter float1,Fail diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index 3ef1f6771c0..d03e9bcbb6f 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -233,8 +233,10 @@ static void si_set_global_binding(struct pipe_context *ctx, unsigned first, unsi for (i = 0; i < n; i++) { uint64_t va; uint32_t offset; + struct si_resource *res = si_resource(resources[i]); pipe_resource_reference(&sctx->global_buffers[first + i], resources[i]); - va = si_resource(resources[i])->gpu_address; + util_range_add(&res->b.b, &res->valid_buffer_range, 0, res->b.b.width0); + va = res->gpu_address; offset = util_le32_to_cpu(*handles[i]); va += offset; va = util_cpu_to_le64(va); @@ -925,6 +927,7 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info if (!buffer) { continue; } + util_range_add(&buffer->b.b, &buffer->valid_buffer_range, 0, buffer->b.b.width0); radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, buffer, RADEON_USAGE_READWRITE | RADEON_PRIO_SHADER_RW_BUFFER); }