2024-07-12 16:20:55 -07:00
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/*
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* Copyright © 2010 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "brw_cfg.h"
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2024-08-13 19:01:43 -07:00
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#include "brw_disasm.h"
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2024-07-12 16:20:55 -07:00
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#include "brw_fs.h"
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#include "brw_private.h"
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#include "dev/intel_debug.h"
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#include "util/half_float.h"
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void
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brw_print_instructions(const fs_visitor &s, FILE *file)
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2024-07-12 16:20:55 -07:00
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{
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if (s.cfg && s.grf_used == 0) {
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2024-12-06 21:20:58 -08:00
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const brw_def_analysis &defs = s.def_analysis.require();
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const brw_register_pressure *rp =
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INTEL_DEBUG(DEBUG_REG_PRESSURE) ? &s.regpressure_analysis.require() : NULL;
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unsigned ip = 0, max_pressure = 0;
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unsigned cf_count = 0;
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2024-07-08 16:49:50 -07:00
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foreach_block(block, s.cfg) {
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fprintf(file, "START B%d", block->num);
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foreach_list_typed(bblock_link, link, link, &block->parents) {
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fprintf(file, " <%cB%d",
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link->kind == bblock_link_logical ? '-' : '~',
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link->block->num);
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2024-07-12 16:20:55 -07:00
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}
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fprintf(file, "\n");
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2024-12-07 00:23:07 -08:00
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foreach_inst_in_block(brw_inst, inst, block) {
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if (inst->is_control_flow_end())
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cf_count -= 1;
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if (rp) {
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max_pressure = MAX2(max_pressure, rp->regs_live_at_ip[ip]);
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fprintf(file, "{%3d} ", rp->regs_live_at_ip[ip]);
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}
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2024-07-08 16:49:50 -07:00
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for (unsigned i = 0; i < cf_count; i++)
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fprintf(file, " ");
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brw_print_instruction(s, inst, file, &defs);
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ip++;
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2024-07-08 16:49:50 -07:00
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if (inst->is_control_flow_begin())
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cf_count += 1;
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}
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fprintf(file, "END B%d", block->num);
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foreach_list_typed(bblock_link, link, link, &block->children) {
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fprintf(file, " %c>B%d",
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link->kind == bblock_link_logical ? '-' : '~',
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link->block->num);
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}
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fprintf(file, "\n");
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2024-07-12 16:20:55 -07:00
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}
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if (rp)
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fprintf(file, "Maximum %3d registers live at once.\n", max_pressure);
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2024-07-12 16:32:36 -07:00
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} else if (s.cfg && exec_list_is_empty(&s.instructions)) {
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foreach_block_and_inst(block, brw_inst, inst, s.cfg) {
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brw_print_instruction(s, inst, file);
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}
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} else {
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foreach_in_list(brw_inst, inst, &s.instructions) {
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brw_print_instruction(s, inst, file);
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}
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}
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}
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static const char *
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brw_instruction_name(const struct brw_isa_info *isa, enum opcode op)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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switch (op) {
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case 0 ... NUM_BRW_OPCODES - 1:
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/* The DO instruction doesn't exist on Gfx9+, but we use it to mark the
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* start of a loop in the IR.
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*/
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if (op == BRW_OPCODE_DO)
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return "do";
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/* DPAS instructions may transiently exist on platforms that do not
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* support DPAS. They will eventually be lowered, but in the meantime it
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* must be possible to query the instruction name.
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*/
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if (devinfo->verx10 < 125 && op == BRW_OPCODE_DPAS)
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return "dpas";
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assert(brw_opcode_desc(isa, op)->name);
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return brw_opcode_desc(isa, op)->name;
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case FS_OPCODE_FB_WRITE_LOGICAL:
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return "fb_write_logical";
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case FS_OPCODE_FB_READ_LOGICAL:
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return "fb_read_logical";
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case SHADER_OPCODE_RCP:
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return "rcp";
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case SHADER_OPCODE_RSQ:
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return "rsq";
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case SHADER_OPCODE_SQRT:
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return "sqrt";
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case SHADER_OPCODE_EXP2:
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return "exp2";
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case SHADER_OPCODE_LOG2:
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return "log2";
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case SHADER_OPCODE_POW:
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return "pow";
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case SHADER_OPCODE_INT_QUOTIENT:
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return "int_quot";
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case SHADER_OPCODE_INT_REMAINDER:
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return "int_rem";
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case SHADER_OPCODE_SIN:
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return "sin";
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case SHADER_OPCODE_COS:
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return "cos";
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case SHADER_OPCODE_SEND:
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return "send";
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case SHADER_OPCODE_SEND_GATHER:
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return "send_gather";
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case SHADER_OPCODE_UNDEF:
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return "undef";
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case SHADER_OPCODE_TEX_LOGICAL:
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return "tex_logical";
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case SHADER_OPCODE_TXD_LOGICAL:
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return "txd_logical";
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case SHADER_OPCODE_TXF_LOGICAL:
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return "txf_logical";
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case SHADER_OPCODE_TXL_LOGICAL:
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return "txl_logical";
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case SHADER_OPCODE_TXS_LOGICAL:
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return "txs_logical";
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case FS_OPCODE_TXB_LOGICAL:
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return "txb_logical";
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case SHADER_OPCODE_TXF_CMS_W_LOGICAL:
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return "txf_cms_w_logical";
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case SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL:
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return "txf_cms_w_gfx12_logical";
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case SHADER_OPCODE_TXF_MCS_LOGICAL:
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return "txf_mcs_logical";
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case SHADER_OPCODE_LOD_LOGICAL:
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return "lod_logical";
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case SHADER_OPCODE_TG4_LOGICAL:
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return "tg4_logical";
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case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
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return "tg4_offset_logical";
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case SHADER_OPCODE_TG4_OFFSET_LOD_LOGICAL:
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return "tg4_offset_lod_logical";
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case SHADER_OPCODE_TG4_OFFSET_BIAS_LOGICAL:
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return "tg4_offset_bias_logical";
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case SHADER_OPCODE_TG4_BIAS_LOGICAL:
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return "tg4_b_logical";
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case SHADER_OPCODE_TG4_EXPLICIT_LOD_LOGICAL:
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return "tg4_l_logical";
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case SHADER_OPCODE_TG4_IMPLICIT_LOD_LOGICAL:
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return "tg4_i_logical";
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case SHADER_OPCODE_SAMPLEINFO_LOGICAL:
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return "sampleinfo_logical";
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case SHADER_OPCODE_IMAGE_SIZE_LOGICAL:
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return "image_size_logical";
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case SHADER_OPCODE_MEMORY_FENCE:
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return "memory_fence";
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case FS_OPCODE_SCHEDULING_FENCE:
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return "scheduling_fence";
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case SHADER_OPCODE_INTERLOCK:
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/* For an interlock we actually issue a memory fence via sendc. */
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return "interlock";
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case SHADER_OPCODE_LOAD_PAYLOAD:
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return "load_payload";
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case FS_OPCODE_PACK:
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return "pack";
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case SHADER_OPCODE_SCRATCH_HEADER:
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return "scratch_header";
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case SHADER_OPCODE_URB_WRITE_LOGICAL:
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return "urb_write_logical";
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case SHADER_OPCODE_URB_READ_LOGICAL:
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return "urb_read_logical";
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case SHADER_OPCODE_FIND_LIVE_CHANNEL:
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return "find_live_channel";
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case SHADER_OPCODE_FIND_LAST_LIVE_CHANNEL:
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return "find_last_live_channel";
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case SHADER_OPCODE_LOAD_LIVE_CHANNELS:
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return "load_live_channels";
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case FS_OPCODE_LOAD_LIVE_CHANNELS:
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return "fs_load_live_channels";
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case SHADER_OPCODE_BROADCAST:
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return "broadcast";
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case SHADER_OPCODE_SHUFFLE:
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return "shuffle";
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case SHADER_OPCODE_SEL_EXEC:
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return "sel_exec";
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case SHADER_OPCODE_QUAD_SWIZZLE:
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return "quad_swizzle";
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case SHADER_OPCODE_CLUSTER_BROADCAST:
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return "cluster_broadcast";
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case SHADER_OPCODE_GET_BUFFER_SIZE:
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return "get_buffer_size";
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case FS_OPCODE_DDX_COARSE:
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return "ddx_coarse";
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case FS_OPCODE_DDX_FINE:
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return "ddx_fine";
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case FS_OPCODE_DDY_COARSE:
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return "ddy_coarse";
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case FS_OPCODE_DDY_FINE:
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return "ddy_fine";
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case FS_OPCODE_PIXEL_X:
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return "pixel_x";
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case FS_OPCODE_PIXEL_Y:
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return "pixel_y";
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case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
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return "uniform_pull_const";
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case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:
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return "varying_pull_const_logical";
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case FS_OPCODE_PACK_HALF_2x16_SPLIT:
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return "pack_half_2x16_split";
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case SHADER_OPCODE_HALT_TARGET:
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return "halt_target";
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case FS_OPCODE_INTERPOLATE_AT_SAMPLE:
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return "interp_sample";
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case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET:
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return "interp_shared_offset";
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case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
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return "interp_per_slot_offset";
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case SHADER_OPCODE_BARRIER:
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return "barrier";
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case SHADER_OPCODE_MULH:
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return "mulh";
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case SHADER_OPCODE_ISUB_SAT:
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return "isub_sat";
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case SHADER_OPCODE_USUB_SAT:
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return "usub_sat";
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case SHADER_OPCODE_MOV_INDIRECT:
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return "mov_indirect";
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case SHADER_OPCODE_MOV_RELOC_IMM:
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return "mov_reloc_imm";
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case RT_OPCODE_TRACE_RAY_LOGICAL:
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return "rt_trace_ray_logical";
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case SHADER_OPCODE_RND_MODE:
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return "rnd_mode";
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case SHADER_OPCODE_FLOAT_CONTROL_MODE:
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return "float_control_mode";
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case SHADER_OPCODE_BTD_SPAWN_LOGICAL:
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return "btd_spawn_logical";
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case SHADER_OPCODE_BTD_RETIRE_LOGICAL:
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return "btd_retire_logical";
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case SHADER_OPCODE_READ_ARCH_REG:
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return "read_arch_reg";
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case SHADER_OPCODE_LOAD_SUBGROUP_INVOCATION:
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return "load_subgroup_invocation";
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intel/brw: Introduce new MEMORY_*_LOGICAL opcodes
This is a new unified set of opcodes for memory access loosely patterned
after the new LSC-style data port messages introduced on Alchemist GPUs.
Rather than creating an opcode for every type of memory access, it has
only three opcodes: load, store, and atomic. It has various sources to
indicate the rest:
- Binding type (raw pointer, pointer to surface state, or BT index)
- Address size (A64, A32, A16)
- Data size (bit size, number of components)
- Opcode (atomic opcode, or LOAD/STORE vs. LOAD_CMASK/STORE_CMASK)
- Mode (typed vs. untyped vs. shared-local vs. scratch)
- Address (and its dimensionality)
- Data (0 for loads, 1 for stores, 2 for atomics)
- Whether we want block access
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30828>
2022-12-25 02:00:46 -08:00
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case SHADER_OPCODE_MEMORY_LOAD_LOGICAL:
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2024-08-13 19:01:43 -07:00
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return "memory_load";
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intel/brw: Introduce new MEMORY_*_LOGICAL opcodes
This is a new unified set of opcodes for memory access loosely patterned
after the new LSC-style data port messages introduced on Alchemist GPUs.
Rather than creating an opcode for every type of memory access, it has
only three opcodes: load, store, and atomic. It has various sources to
indicate the rest:
- Binding type (raw pointer, pointer to surface state, or BT index)
- Address size (A64, A32, A16)
- Data size (bit size, number of components)
- Opcode (atomic opcode, or LOAD/STORE vs. LOAD_CMASK/STORE_CMASK)
- Mode (typed vs. untyped vs. shared-local vs. scratch)
- Address (and its dimensionality)
- Data (0 for loads, 1 for stores, 2 for atomics)
- Whether we want block access
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30828>
2022-12-25 02:00:46 -08:00
|
|
|
case SHADER_OPCODE_MEMORY_STORE_LOGICAL:
|
2024-08-13 19:01:43 -07:00
|
|
|
return "memory_store";
|
intel/brw: Introduce new MEMORY_*_LOGICAL opcodes
This is a new unified set of opcodes for memory access loosely patterned
after the new LSC-style data port messages introduced on Alchemist GPUs.
Rather than creating an opcode for every type of memory access, it has
only three opcodes: load, store, and atomic. It has various sources to
indicate the rest:
- Binding type (raw pointer, pointer to surface state, or BT index)
- Address size (A64, A32, A16)
- Data size (bit size, number of components)
- Opcode (atomic opcode, or LOAD/STORE vs. LOAD_CMASK/STORE_CMASK)
- Mode (typed vs. untyped vs. shared-local vs. scratch)
- Address (and its dimensionality)
- Data (0 for loads, 1 for stores, 2 for atomics)
- Whether we want block access
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30828>
2022-12-25 02:00:46 -08:00
|
|
|
case SHADER_OPCODE_MEMORY_ATOMIC_LOGICAL:
|
2024-08-13 19:01:43 -07:00
|
|
|
return "memory_atomic";
|
2024-07-15 15:09:12 -07:00
|
|
|
case SHADER_OPCODE_REDUCE:
|
|
|
|
|
return "reduce";
|
2024-07-16 14:06:12 -07:00
|
|
|
case SHADER_OPCODE_INCLUSIVE_SCAN:
|
|
|
|
|
return "inclusive_scan";
|
|
|
|
|
case SHADER_OPCODE_EXCLUSIVE_SCAN:
|
|
|
|
|
return "exclusive_scan";
|
2024-09-04 10:07:52 -07:00
|
|
|
case SHADER_OPCODE_VOTE_ANY:
|
|
|
|
|
return "vote_any";
|
|
|
|
|
case SHADER_OPCODE_VOTE_ALL:
|
|
|
|
|
return "vote_all";
|
|
|
|
|
case SHADER_OPCODE_VOTE_EQUAL:
|
|
|
|
|
return "vote_equal";
|
2024-09-05 09:23:11 -07:00
|
|
|
case SHADER_OPCODE_BALLOT:
|
|
|
|
|
return "ballot";
|
2024-09-05 17:37:25 -07:00
|
|
|
case SHADER_OPCODE_QUAD_SWAP:
|
|
|
|
|
return "quad_swap";
|
2024-11-29 15:31:05 -08:00
|
|
|
case SHADER_OPCODE_READ_FROM_LIVE_CHANNEL:
|
|
|
|
|
return "read_from_live_channel";
|
|
|
|
|
case SHADER_OPCODE_READ_FROM_CHANNEL:
|
|
|
|
|
return "read_from_channel";
|
2024-07-12 16:20:55 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
unreachable("not reached");
|
|
|
|
|
}
|
|
|
|
|
|
2024-08-13 19:01:43 -07:00
|
|
|
/**
|
|
|
|
|
* Pretty-print a source for a SHADER_OPCODE_MEMORY_LOGICAL instruction.
|
|
|
|
|
*
|
|
|
|
|
* Returns true if the value is fully printed (i.e. an enum) and false if
|
|
|
|
|
* we only printed a label, and the actual source value still needs printing.
|
|
|
|
|
*/
|
|
|
|
|
static bool
|
2024-12-07 00:23:07 -08:00
|
|
|
print_memory_logical_source(FILE *file, const brw_inst *inst, unsigned i)
|
2024-08-13 19:01:43 -07:00
|
|
|
{
|
|
|
|
|
if (inst->is_control_source(i)) {
|
|
|
|
|
assert(inst->src[i].file == IMM && inst->src[i].type == BRW_TYPE_UD);
|
|
|
|
|
assert(!inst->src[i].negate);
|
|
|
|
|
assert(!inst->src[i].abs);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
switch (i) {
|
|
|
|
|
case MEMORY_LOGICAL_OPCODE:
|
|
|
|
|
fprintf(file, " %s", brw_lsc_op_to_string(inst->src[i].ud));
|
|
|
|
|
return true;
|
|
|
|
|
case MEMORY_LOGICAL_MODE: {
|
|
|
|
|
static const char *modes[] = {
|
|
|
|
|
[MEMORY_MODE_TYPED] = "typed",
|
|
|
|
|
[MEMORY_MODE_UNTYPED] = "untyped",
|
|
|
|
|
[MEMORY_MODE_SHARED_LOCAL] = "shared",
|
|
|
|
|
[MEMORY_MODE_SCRATCH] = "scratch",
|
2025-01-02 01:03:46 -08:00
|
|
|
[MEMORY_MODE_CONSTANT] = "const",
|
2024-08-13 19:01:43 -07:00
|
|
|
};
|
|
|
|
|
assert(inst->src[i].ud < ARRAY_SIZE(modes));
|
|
|
|
|
fprintf(file, " %s", modes[inst->src[i].ud]);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
case MEMORY_LOGICAL_BINDING_TYPE:
|
|
|
|
|
fprintf(file, " %s", brw_lsc_addr_surftype_to_string(inst->src[i].ud));
|
|
|
|
|
if (inst->src[i].ud != LSC_ADDR_SURFTYPE_FLAT)
|
|
|
|
|
fprintf(file, ":");
|
|
|
|
|
return true;
|
|
|
|
|
case MEMORY_LOGICAL_BINDING:
|
|
|
|
|
return inst->src[i].file == BAD_FILE;
|
|
|
|
|
case MEMORY_LOGICAL_ADDRESS:
|
|
|
|
|
fprintf(file, " addr: ");
|
|
|
|
|
return false;
|
|
|
|
|
case MEMORY_LOGICAL_COORD_COMPONENTS:
|
|
|
|
|
fprintf(file, " coord_comps:");
|
|
|
|
|
return false;
|
|
|
|
|
case MEMORY_LOGICAL_ALIGNMENT:
|
|
|
|
|
fprintf(file, " align:");
|
|
|
|
|
return false;
|
|
|
|
|
case MEMORY_LOGICAL_DATA_SIZE:
|
|
|
|
|
fprintf(file, " %s", brw_lsc_data_size_to_string(inst->src[i].ud));
|
|
|
|
|
return true;
|
|
|
|
|
case MEMORY_LOGICAL_COMPONENTS:
|
|
|
|
|
fprintf(file, " comps:");
|
|
|
|
|
return false;
|
|
|
|
|
case MEMORY_LOGICAL_FLAGS:
|
|
|
|
|
if (inst->src[i].ud & MEMORY_FLAG_TRANSPOSE)
|
|
|
|
|
fprintf(file, " transpose");
|
|
|
|
|
if (inst->src[i].ud & MEMORY_FLAG_INCLUDE_HELPERS)
|
|
|
|
|
fprintf(file, " helpers");
|
|
|
|
|
return true;
|
|
|
|
|
case MEMORY_LOGICAL_DATA0:
|
|
|
|
|
fprintf(file, " data0: ");
|
|
|
|
|
return false;
|
|
|
|
|
case MEMORY_LOGICAL_DATA1:
|
|
|
|
|
if (inst->src[i].file == BAD_FILE)
|
|
|
|
|
return true;
|
|
|
|
|
fprintf(file, " data1: ");
|
|
|
|
|
return false;
|
|
|
|
|
default:
|
|
|
|
|
unreachable("invalid source");
|
|
|
|
|
}
|
|
|
|
|
}
|
2024-07-12 16:20:55 -07:00
|
|
|
|
|
|
|
|
void
|
2024-12-06 21:20:58 -08:00
|
|
|
brw_print_instruction(const fs_visitor &s, const brw_inst *inst, FILE *file, const brw_def_analysis *defs)
|
2024-07-12 16:20:55 -07:00
|
|
|
{
|
|
|
|
|
if (inst->predicate) {
|
|
|
|
|
fprintf(file, "(%cf%d.%d) ",
|
|
|
|
|
inst->predicate_inverse ? '-' : '+',
|
|
|
|
|
inst->flag_subreg / 2,
|
|
|
|
|
inst->flag_subreg % 2);
|
|
|
|
|
}
|
|
|
|
|
|
2024-07-12 16:32:36 -07:00
|
|
|
fprintf(file, "%s", brw_instruction_name(&s.compiler->isa, inst->opcode));
|
2024-07-12 16:20:55 -07:00
|
|
|
if (inst->saturate)
|
|
|
|
|
fprintf(file, ".sat");
|
|
|
|
|
if (inst->conditional_mod) {
|
|
|
|
|
fprintf(file, "%s", conditional_modifier[inst->conditional_mod]);
|
|
|
|
|
if (!inst->predicate &&
|
|
|
|
|
(inst->opcode != BRW_OPCODE_SEL &&
|
|
|
|
|
inst->opcode != BRW_OPCODE_CSEL &&
|
|
|
|
|
inst->opcode != BRW_OPCODE_IF &&
|
|
|
|
|
inst->opcode != BRW_OPCODE_WHILE)) {
|
|
|
|
|
fprintf(file, ".f%d.%d", inst->flag_subreg / 2,
|
|
|
|
|
inst->flag_subreg % 2);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
fprintf(file, "(%d) ", inst->exec_size);
|
|
|
|
|
|
|
|
|
|
if (inst->mlen) {
|
|
|
|
|
fprintf(file, "(mlen: %d) ", inst->mlen);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (inst->ex_mlen) {
|
|
|
|
|
fprintf(file, "(ex_mlen: %d) ", inst->ex_mlen);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (inst->eot) {
|
|
|
|
|
fprintf(file, "(EOT) ");
|
|
|
|
|
}
|
|
|
|
|
|
intel/brw: Omit type and region in payload sources when printing IR
These are not really used since SEND messages deal with full GRFs.
Before
```
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 0u, g1:UD, g8:UD
send(8) (mlen: 1) g5:UD, 0u, 0u, g4:UD, (null):UD
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 16777216u, g1:D, g6:UD
send(8) (mlen: 1) (EOT) (null):UD, 0u, 0u, g126:UD, (null):UD NoMask
```
and after
```
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 0u, g1, g8
send(8) (mlen: 1) g5, 0u, 0u, g4, (null)
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 16777216u, g1, g6
send(8) (mlen: 1) (EOT) (null), 0u, 0u, g126, (null) NoMask
```
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32259>
2024-11-20 09:21:34 -08:00
|
|
|
const bool is_send = inst->opcode == BRW_OPCODE_SEND ||
|
|
|
|
|
inst->opcode == SHADER_OPCODE_SEND;
|
|
|
|
|
|
2024-07-12 16:20:55 -07:00
|
|
|
switch (inst->dst.file) {
|
|
|
|
|
case VGRF:
|
|
|
|
|
if (defs && defs->get(inst->dst))
|
|
|
|
|
fprintf(file, "%%%d", inst->dst.nr);
|
|
|
|
|
else
|
|
|
|
|
fprintf(file, "v%d", inst->dst.nr);
|
|
|
|
|
break;
|
|
|
|
|
case FIXED_GRF:
|
|
|
|
|
fprintf(file, "g%d", inst->dst.nr);
|
|
|
|
|
if (inst->dst.subnr != 0)
|
|
|
|
|
fprintf(file, ".%d", inst->dst.subnr / brw_type_size_bytes(inst->dst.type));
|
|
|
|
|
break;
|
|
|
|
|
case BAD_FILE:
|
|
|
|
|
fprintf(file, "(null)");
|
|
|
|
|
break;
|
|
|
|
|
case UNIFORM:
|
|
|
|
|
fprintf(file, "***u%d***", inst->dst.nr);
|
|
|
|
|
break;
|
|
|
|
|
case ATTR:
|
|
|
|
|
fprintf(file, "***attr%d***", inst->dst.nr);
|
|
|
|
|
break;
|
2024-12-10 10:49:08 +02:00
|
|
|
case ADDRESS:
|
2024-03-13 11:01:16 +02:00
|
|
|
if (inst->dst.nr == 0)
|
|
|
|
|
fprintf(file, "a0.%d", inst->dst.subnr);
|
|
|
|
|
else
|
|
|
|
|
fprintf(file, "va%u.%d", inst->dst.nr, inst->dst.subnr);
|
2024-12-10 10:49:08 +02:00
|
|
|
break;
|
2024-07-12 16:20:55 -07:00
|
|
|
case ARF:
|
|
|
|
|
switch (inst->dst.nr & 0xF0) {
|
|
|
|
|
case BRW_ARF_NULL:
|
|
|
|
|
fprintf(file, "null");
|
|
|
|
|
break;
|
|
|
|
|
case BRW_ARF_ACCUMULATOR:
|
|
|
|
|
if (inst->dst.subnr == 0)
|
|
|
|
|
fprintf(file, "acc%d", inst->dst.nr & 0x0F);
|
|
|
|
|
else
|
|
|
|
|
fprintf(file, "acc%d.%d", inst->dst.nr & 0x0F, inst->dst.subnr);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_ARF_FLAG:
|
|
|
|
|
fprintf(file, "f%d.%d", inst->dst.nr & 0xf, inst->dst.subnr);
|
|
|
|
|
break;
|
2024-11-20 09:12:22 -08:00
|
|
|
case BRW_ARF_SCALAR:
|
|
|
|
|
fprintf(file, "s0.%d", inst->dst.subnr);
|
|
|
|
|
break;
|
2024-07-12 16:20:55 -07:00
|
|
|
default:
|
|
|
|
|
fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, inst->dst.subnr);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case IMM:
|
|
|
|
|
unreachable("not reached");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (inst->dst.offset ||
|
2024-08-01 13:59:01 -07:00
|
|
|
(!s.grf_used && inst->dst.file == VGRF &&
|
2024-07-12 16:32:36 -07:00
|
|
|
s.alloc.sizes[inst->dst.nr] * REG_SIZE != inst->size_written)) {
|
2024-07-12 16:20:55 -07:00
|
|
|
const unsigned reg_size = (inst->dst.file == UNIFORM ? 4 : REG_SIZE);
|
|
|
|
|
fprintf(file, "+%d.%d", inst->dst.offset / reg_size,
|
|
|
|
|
inst->dst.offset % reg_size);
|
|
|
|
|
}
|
|
|
|
|
|
intel/brw: Omit type and region in payload sources when printing IR
These are not really used since SEND messages deal with full GRFs.
Before
```
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 0u, g1:UD, g8:UD
send(8) (mlen: 1) g5:UD, 0u, 0u, g4:UD, (null):UD
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 16777216u, g1:D, g6:UD
send(8) (mlen: 1) (EOT) (null):UD, 0u, 0u, g126:UD, (null):UD NoMask
```
and after
```
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 0u, g1, g8
send(8) (mlen: 1) g5, 0u, 0u, g4, (null)
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 16777216u, g1, g6
send(8) (mlen: 1) (EOT) (null), 0u, 0u, g126, (null) NoMask
```
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32259>
2024-11-20 09:21:34 -08:00
|
|
|
if (!is_send) {
|
|
|
|
|
if (inst->dst.stride != 1)
|
|
|
|
|
fprintf(file, "<%u>", inst->dst.stride);
|
|
|
|
|
fprintf(file, ":%s", brw_reg_type_to_letters(inst->dst.type));
|
|
|
|
|
}
|
2024-07-12 16:20:55 -07:00
|
|
|
|
|
|
|
|
for (int i = 0; i < inst->sources; i++) {
|
2024-08-13 19:01:43 -07:00
|
|
|
if (inst->opcode == SHADER_OPCODE_MEMORY_LOAD_LOGICAL ||
|
|
|
|
|
inst->opcode == SHADER_OPCODE_MEMORY_STORE_LOGICAL ||
|
|
|
|
|
inst->opcode == SHADER_OPCODE_MEMORY_ATOMIC_LOGICAL) {
|
|
|
|
|
if (print_memory_logical_source(file, inst, i))
|
|
|
|
|
continue;
|
|
|
|
|
} else {
|
|
|
|
|
fprintf(file, ", ");
|
|
|
|
|
}
|
2024-07-12 16:20:55 -07:00
|
|
|
|
|
|
|
|
if (inst->src[i].negate)
|
|
|
|
|
fprintf(file, "-");
|
|
|
|
|
if (inst->src[i].abs)
|
|
|
|
|
fprintf(file, "|");
|
|
|
|
|
switch (inst->src[i].file) {
|
|
|
|
|
case VGRF:
|
|
|
|
|
if (defs && defs->get(inst->src[i]))
|
|
|
|
|
fprintf(file, "%%%d", inst->src[i].nr);
|
|
|
|
|
else
|
|
|
|
|
fprintf(file, "v%d", inst->src[i].nr);
|
|
|
|
|
break;
|
|
|
|
|
case FIXED_GRF:
|
|
|
|
|
fprintf(file, "g%d", inst->src[i].nr);
|
|
|
|
|
break;
|
2024-12-10 10:49:08 +02:00
|
|
|
case ADDRESS:
|
2024-03-13 11:01:16 +02:00
|
|
|
if (inst->src[i].nr == 0)
|
|
|
|
|
fprintf(file, "a0.%d", inst->src[i].subnr);
|
|
|
|
|
else
|
|
|
|
|
fprintf(file, "va%u.%d", inst->src[i].nr, inst->src[i].subnr);
|
2024-12-10 10:49:08 +02:00
|
|
|
break;
|
2024-07-12 16:20:55 -07:00
|
|
|
case ATTR:
|
|
|
|
|
fprintf(file, "attr%d", inst->src[i].nr);
|
|
|
|
|
break;
|
|
|
|
|
case UNIFORM:
|
|
|
|
|
fprintf(file, "u%d", inst->src[i].nr);
|
|
|
|
|
break;
|
|
|
|
|
case BAD_FILE:
|
|
|
|
|
fprintf(file, "(null)");
|
|
|
|
|
break;
|
|
|
|
|
case IMM:
|
|
|
|
|
switch (inst->src[i].type) {
|
|
|
|
|
case BRW_TYPE_HF:
|
|
|
|
|
fprintf(file, "%-ghf", _mesa_half_to_float(inst->src[i].ud & 0xffff));
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_F:
|
|
|
|
|
fprintf(file, "%-gf", inst->src[i].f);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_DF:
|
|
|
|
|
fprintf(file, "%fdf", inst->src[i].df);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_W:
|
|
|
|
|
fprintf(file, "%dw", (int)(int16_t)inst->src[i].d);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_D:
|
|
|
|
|
fprintf(file, "%dd", inst->src[i].d);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_UW:
|
|
|
|
|
fprintf(file, "%duw", inst->src[i].ud & 0xffff);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_UD:
|
|
|
|
|
fprintf(file, "%uu", inst->src[i].ud);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_Q:
|
|
|
|
|
fprintf(file, "%" PRId64 "q", inst->src[i].d64);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_UQ:
|
|
|
|
|
fprintf(file, "%" PRIu64 "uq", inst->src[i].u64);
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_VF:
|
|
|
|
|
fprintf(file, "[%-gF, %-gF, %-gF, %-gF]",
|
|
|
|
|
brw_vf_to_float((inst->src[i].ud >> 0) & 0xff),
|
|
|
|
|
brw_vf_to_float((inst->src[i].ud >> 8) & 0xff),
|
|
|
|
|
brw_vf_to_float((inst->src[i].ud >> 16) & 0xff),
|
|
|
|
|
brw_vf_to_float((inst->src[i].ud >> 24) & 0xff));
|
|
|
|
|
break;
|
|
|
|
|
case BRW_TYPE_V:
|
|
|
|
|
case BRW_TYPE_UV:
|
|
|
|
|
fprintf(file, "%08x%s", inst->src[i].ud,
|
|
|
|
|
inst->src[i].type == BRW_TYPE_V ? "V" : "UV");
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
fprintf(file, "???");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case ARF:
|
|
|
|
|
switch (inst->src[i].nr & 0xF0) {
|
|
|
|
|
case BRW_ARF_NULL:
|
|
|
|
|
fprintf(file, "null");
|
|
|
|
|
break;
|
|
|
|
|
case BRW_ARF_ACCUMULATOR:
|
|
|
|
|
if (inst->src[i].subnr == 0)
|
|
|
|
|
fprintf(file, "acc%d", inst->src[i].nr & 0x0F);
|
|
|
|
|
else
|
|
|
|
|
fprintf(file, "acc%d.%d", inst->src[i].nr & 0x0F, inst->src[i].subnr);
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
case BRW_ARF_FLAG:
|
|
|
|
|
fprintf(file, "f%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr);
|
|
|
|
|
break;
|
2024-11-20 09:12:22 -08:00
|
|
|
case BRW_ARF_SCALAR:
|
|
|
|
|
fprintf(file, "s0.%d", inst->src[i].subnr);
|
|
|
|
|
break;
|
2024-07-12 16:20:55 -07:00
|
|
|
default:
|
|
|
|
|
fprintf(file, "arf%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (inst->src[i].file == FIXED_GRF && inst->src[i].subnr != 0) {
|
|
|
|
|
assert(inst->src[i].offset == 0);
|
|
|
|
|
|
|
|
|
|
fprintf(file, ".%d", inst->src[i].subnr / brw_type_size_bytes(inst->src[i].type));
|
|
|
|
|
} else if (inst->src[i].offset ||
|
2024-08-01 13:59:01 -07:00
|
|
|
(!s.grf_used && inst->src[i].file == VGRF &&
|
2024-06-19 10:50:51 -07:00
|
|
|
s.alloc.sizes[inst->src[i].nr] * REG_SIZE != inst->size_read(s.devinfo, i))) {
|
2024-07-12 16:20:55 -07:00
|
|
|
const unsigned reg_size = (inst->src[i].file == UNIFORM ? 4 : REG_SIZE);
|
|
|
|
|
fprintf(file, "+%d.%d", inst->src[i].offset / reg_size,
|
|
|
|
|
inst->src[i].offset % reg_size);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (inst->src[i].abs)
|
|
|
|
|
fprintf(file, "|");
|
|
|
|
|
|
intel/brw: Omit type and region in payload sources when printing IR
These are not really used since SEND messages deal with full GRFs.
Before
```
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 0u, g1:UD, g8:UD
send(8) (mlen: 1) g5:UD, 0u, 0u, g4:UD, (null):UD
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 16777216u, g1:D, g6:UD
send(8) (mlen: 1) (EOT) (null):UD, 0u, 0u, g126:UD, (null):UD NoMask
```
and after
```
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 0u, g1, g8
send(8) (mlen: 1) g5, 0u, 0u, g4, (null)
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 16777216u, g1, g6
send(8) (mlen: 1) (EOT) (null), 0u, 0u, g126, (null) NoMask
```
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32259>
2024-11-20 09:21:34 -08:00
|
|
|
/* Just print register numbers for payload sources. */
|
|
|
|
|
const bool omit_src_type_and_region = is_send && i >= 2;
|
|
|
|
|
|
|
|
|
|
if (inst->src[i].file != IMM && !omit_src_type_and_region) {
|
2024-07-12 16:20:55 -07:00
|
|
|
unsigned stride;
|
|
|
|
|
if (inst->src[i].file == ARF || inst->src[i].file == FIXED_GRF) {
|
2024-11-20 09:47:49 -08:00
|
|
|
fprintf(file, "<%u,%u,%u>", inst->src[i].vstride == 0 ? 0 : (1 << (inst->src[i].vstride - 1)),
|
|
|
|
|
1 << inst->src[i].width,
|
|
|
|
|
inst->src[i].hstride == 0 ? 0 : (1 << (inst->src[i].hstride - 1)));
|
2024-07-12 16:20:55 -07:00
|
|
|
} else {
|
|
|
|
|
stride = inst->src[i].stride;
|
2024-11-20 09:47:49 -08:00
|
|
|
if (stride != 1)
|
|
|
|
|
fprintf(file, "<%u>", stride);
|
2024-07-12 16:20:55 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fprintf(file, ":%s", brw_reg_type_to_letters(inst->src[i].type));
|
|
|
|
|
}
|
2024-09-05 17:37:25 -07:00
|
|
|
|
|
|
|
|
if (inst->opcode == SHADER_OPCODE_QUAD_SWAP && i == 1) {
|
|
|
|
|
assert(inst->src[i].file == IMM);
|
|
|
|
|
const char *name = NULL;
|
|
|
|
|
switch (inst->src[i].ud) {
|
|
|
|
|
case BRW_SWAP_HORIZONTAL: name = "horizontal"; break;
|
|
|
|
|
case BRW_SWAP_VERTICAL: name = "vertical"; break;
|
|
|
|
|
case BRW_SWAP_DIAGONAL: name = "diagonal"; break;
|
|
|
|
|
default:
|
|
|
|
|
unreachable("invalid brw_swap_direction");
|
|
|
|
|
}
|
|
|
|
|
fprintf(file, " (%s)", name);
|
|
|
|
|
}
|
2024-07-12 16:20:55 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fprintf(file, " ");
|
|
|
|
|
|
|
|
|
|
if (inst->force_writemask_all)
|
|
|
|
|
fprintf(file, "NoMask ");
|
|
|
|
|
|
2024-07-12 16:32:36 -07:00
|
|
|
if (inst->exec_size != s.dispatch_width)
|
2024-07-12 16:20:55 -07:00
|
|
|
fprintf(file, "group%d ", inst->group);
|
|
|
|
|
|
|
|
|
|
if (inst->has_no_mask_send_params)
|
|
|
|
|
fprintf(file, "NoMaskParams ");
|
|
|
|
|
|
2024-11-20 16:18:40 -08:00
|
|
|
if (inst->sched.regdist || inst->sched.mode) {
|
2024-07-12 16:20:55 -07:00
|
|
|
fprintf(file, "{ ");
|
2024-07-12 16:32:36 -07:00
|
|
|
brw_print_swsb(file, s.devinfo, inst->sched);
|
2024-07-12 16:20:55 -07:00
|
|
|
fprintf(file, " } ");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fprintf(file, "\n");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
brw_print_swsb(FILE *f, const struct intel_device_info *devinfo, const tgl_swsb swsb)
|
|
|
|
|
{
|
|
|
|
|
if (swsb.regdist) {
|
|
|
|
|
fprintf(f, "%s@%d",
|
|
|
|
|
(devinfo && devinfo->verx10 < 125 ? "" :
|
|
|
|
|
swsb.pipe == TGL_PIPE_FLOAT ? "F" :
|
|
|
|
|
swsb.pipe == TGL_PIPE_INT ? "I" :
|
|
|
|
|
swsb.pipe == TGL_PIPE_LONG ? "L" :
|
|
|
|
|
swsb.pipe == TGL_PIPE_ALL ? "A" :
|
2024-11-19 13:06:35 -08:00
|
|
|
swsb.pipe == TGL_PIPE_MATH ? "M" :
|
|
|
|
|
swsb.pipe == TGL_PIPE_SCALAR ? "S" : "" ),
|
2024-07-12 16:20:55 -07:00
|
|
|
swsb.regdist);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (swsb.mode) {
|
|
|
|
|
if (swsb.regdist)
|
|
|
|
|
fprintf(f, " ");
|
|
|
|
|
|
|
|
|
|
fprintf(f, "$%d%s", swsb.sbid,
|
|
|
|
|
(swsb.mode & TGL_SBID_SET ? "" :
|
|
|
|
|
swsb.mode & TGL_SBID_DST ? ".dst" : ".src"));
|
|
|
|
|
}
|
|
|
|
|
}
|