2018-05-24 11:37:51 -07:00
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/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <gtest/gtest.h>
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#include "nir.h"
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2018-05-22 18:18:07 -07:00
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#include "nir_builder.h"
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2018-05-24 11:37:51 -07:00
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#include "util/half_float.h"
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2019-03-27 00:59:03 +01:00
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static void count_sequence(nir_const_value c[NIR_MAX_VEC_COMPONENTS],
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2019-06-13 12:59:29 -07:00
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nir_alu_type full_type, int first);
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2019-03-27 00:59:03 +01:00
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static void negate(nir_const_value dst[NIR_MAX_VEC_COMPONENTS],
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const nir_const_value src[NIR_MAX_VEC_COMPONENTS],
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nir_alu_type full_type, unsigned components);
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2018-05-24 11:37:51 -07:00
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class const_value_negative_equal_test : public ::testing::Test {
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protected:
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const_value_negative_equal_test()
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{
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2019-07-31 15:40:05 +03:00
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glsl_type_singleton_init_or_ref();
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2019-03-27 00:59:03 +01:00
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memset(c1, 0, sizeof(c1));
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memset(c2, 0, sizeof(c2));
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2018-05-24 11:37:51 -07:00
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}
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~const_value_negative_equal_test()
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{
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2019-07-31 15:40:05 +03:00
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glsl_type_singleton_decref();
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2018-05-24 11:37:51 -07:00
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}
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2019-03-27 00:59:03 +01:00
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nir_const_value c1[NIR_MAX_VEC_COMPONENTS];
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nir_const_value c2[NIR_MAX_VEC_COMPONENTS];
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2018-05-24 11:37:51 -07:00
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};
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2018-05-22 18:18:07 -07:00
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class alu_srcs_negative_equal_test : public ::testing::Test {
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protected:
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alu_srcs_negative_equal_test()
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{
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glsl_type_singleton_init_or_ref();
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2018-05-22 18:18:07 -07:00
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static const nir_shader_compiler_options options = { };
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2020-10-26 11:37:25 -07:00
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bld = nir_builder_init_simple_shader(MESA_SHADER_VERTEX, &options,
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"negative equal tests");
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memset(c1, 0, sizeof(c1));
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memset(c2, 0, sizeof(c2));
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2018-05-22 18:18:07 -07:00
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}
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~alu_srcs_negative_equal_test()
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{
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ralloc_free(bld.shader);
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glsl_type_singleton_decref();
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2018-05-22 18:18:07 -07:00
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}
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struct nir_builder bld;
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nir_const_value c1[NIR_MAX_VEC_COMPONENTS];
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nir_const_value c2[NIR_MAX_VEC_COMPONENTS];
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};
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2018-05-24 11:37:51 -07:00
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TEST_F(const_value_negative_equal_test, float32_zero)
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{
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/* Verify that 0.0 negative-equals 0.0. */
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EXPECT_TRUE(nir_const_value_negative_equal(c1[0], c1[0], nir_type_float32));
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2018-05-24 11:37:51 -07:00
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}
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TEST_F(const_value_negative_equal_test, float64_zero)
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{
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/* Verify that 0.0 negative-equals 0.0. */
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EXPECT_TRUE(nir_const_value_negative_equal(c1[0], c1[0], nir_type_float64));
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}
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/* Compare an object with non-zero values to itself. This should always be
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* false.
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*/
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#define compare_with_self(full_type) \
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TEST_F(const_value_negative_equal_test, full_type ## _self) \
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2018-05-24 11:37:51 -07:00
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{ \
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count_sequence(c1, full_type, 1); \
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EXPECT_FALSE(nir_const_value_negative_equal(c1[0], c1[0], full_type)); \
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2018-05-24 11:37:51 -07:00
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}
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2019-06-13 12:59:29 -07:00
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compare_with_self(nir_type_float16)
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compare_with_self(nir_type_float32)
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compare_with_self(nir_type_float64)
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compare_with_self(nir_type_int8)
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compare_with_self(nir_type_uint8)
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compare_with_self(nir_type_int16)
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compare_with_self(nir_type_uint16)
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compare_with_self(nir_type_int32)
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compare_with_self(nir_type_uint32)
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compare_with_self(nir_type_int64)
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compare_with_self(nir_type_uint64)
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#undef compare_with_self
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2018-05-24 11:37:51 -07:00
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/* Compare an object with the negation of itself. This should always be true.
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*/
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#define compare_with_negation(full_type) \
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TEST_F(const_value_negative_equal_test, full_type ## _trivially_true) \
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{ \
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count_sequence(c1, full_type, 1); \
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negate(c2, c1, full_type, 1); \
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EXPECT_TRUE(nir_const_value_negative_equal(c1[0], c2[0], full_type)); \
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2018-05-24 11:37:51 -07:00
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}
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2019-06-13 12:59:29 -07:00
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compare_with_negation(nir_type_float16)
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compare_with_negation(nir_type_float32)
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compare_with_negation(nir_type_float64)
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compare_with_negation(nir_type_int8)
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compare_with_negation(nir_type_uint8)
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compare_with_negation(nir_type_int16)
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compare_with_negation(nir_type_uint16)
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compare_with_negation(nir_type_int32)
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compare_with_negation(nir_type_uint32)
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compare_with_negation(nir_type_int64)
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compare_with_negation(nir_type_uint64)
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2019-06-13 13:55:30 -07:00
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#undef compare_with_negation
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2018-05-24 11:37:51 -07:00
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2018-05-22 18:18:07 -07:00
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TEST_F(alu_srcs_negative_equal_test, trivial_float)
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{
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nir_ssa_def *two = nir_imm_float(&bld, 2.0f);
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nir_ssa_def *negative_two = nir_imm_float(&bld, -2.0f);
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nir_ssa_def *result = nir_fadd(&bld, two, negative_two);
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nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
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ASSERT_NE((void *) 0, instr);
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EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 1, 1));
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}
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TEST_F(alu_srcs_negative_equal_test, trivial_int)
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{
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nir_ssa_def *two = nir_imm_int(&bld, 2);
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nir_ssa_def *negative_two = nir_imm_int(&bld, -2);
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nir_ssa_def *result = nir_iadd(&bld, two, negative_two);
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nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
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ASSERT_NE((void *) 0, instr);
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EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 1, 1));
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}
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TEST_F(alu_srcs_negative_equal_test, trivial_negation_float)
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{
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/* Cannot just do the negation of a nir_load_const_instr because
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* nir_alu_srcs_negative_equal expects that constant folding will convert
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* fneg(2.0) to just -2.0.
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*/
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nir_ssa_def *two = nir_imm_float(&bld, 2.0f);
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nir_ssa_def *two_plus_two = nir_fadd(&bld, two, two);
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nir_ssa_def *negation = nir_fneg(&bld, two_plus_two);
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nir_ssa_def *result = nir_fadd(&bld, two_plus_two, negation);
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nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
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ASSERT_NE((void *) 0, instr);
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EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 1, 1));
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}
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TEST_F(alu_srcs_negative_equal_test, trivial_negation_int)
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{
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/* Cannot just do the negation of a nir_load_const_instr because
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* nir_alu_srcs_negative_equal expects that constant folding will convert
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* ineg(2) to just -2.
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*/
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nir_ssa_def *two = nir_imm_int(&bld, 2);
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nir_ssa_def *two_plus_two = nir_iadd(&bld, two, two);
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nir_ssa_def *negation = nir_ineg(&bld, two_plus_two);
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nir_ssa_def *result = nir_iadd(&bld, two_plus_two, negation);
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nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
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ASSERT_NE((void *) 0, instr);
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EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0));
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 1, 1));
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}
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2019-06-13 13:55:30 -07:00
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/* Compare an object with non-zero values to itself. This should always be
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* false.
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*/
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#define compare_with_self(full_type) \
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TEST_F(alu_srcs_negative_equal_test, full_type ## _self) \
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{ \
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count_sequence(c1, full_type, 1); \
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nir_ssa_def *a = nir_build_imm(&bld, \
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NIR_MAX_VEC_COMPONENTS, \
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nir_alu_type_get_type_size(full_type), \
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c1); \
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nir_ssa_def *result; \
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if (nir_alu_type_get_base_type(full_type) == nir_type_float) \
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result = nir_fadd(&bld, a, a); \
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else \
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result = nir_iadd(&bld, a, a); \
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nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr); \
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ASSERT_NE((void *) 0, instr); \
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0)); \
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 1)); \
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 1, 0)); \
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EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 1, 1)); \
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}
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compare_with_self(nir_type_float16)
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compare_with_self(nir_type_float32)
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compare_with_self(nir_type_float64)
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compare_with_self(nir_type_int8)
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compare_with_self(nir_type_uint8)
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compare_with_self(nir_type_int16)
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compare_with_self(nir_type_uint16)
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compare_with_self(nir_type_int32)
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compare_with_self(nir_type_uint32)
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compare_with_self(nir_type_int64)
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compare_with_self(nir_type_uint64)
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/* Compare an object with the negation of itself. This should always be true.
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*/
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#define compare_with_negation(full_type) \
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TEST_F(alu_srcs_negative_equal_test, full_type ## _trivially_true) \
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{ \
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count_sequence(c1, full_type, 1); \
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negate(c2, c1, full_type, NIR_MAX_VEC_COMPONENTS); \
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nir_ssa_def *a = nir_build_imm(&bld, \
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NIR_MAX_VEC_COMPONENTS, \
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nir_alu_type_get_type_size(full_type), \
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c1); \
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nir_ssa_def *b = nir_build_imm(&bld, \
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NIR_MAX_VEC_COMPONENTS, \
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nir_alu_type_get_type_size(full_type), \
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c2); \
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nir_ssa_def *result; \
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if (nir_alu_type_get_base_type(full_type) == nir_type_float) \
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result = nir_fadd(&bld, a, b); \
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else \
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result = nir_iadd(&bld, a, b); \
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nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr); \
|
|
|
|
|
ASSERT_NE((void *) 0, instr); \
|
|
|
|
|
EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0)); \
|
|
|
|
|
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1)); \
|
|
|
|
|
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 1, 0)); \
|
|
|
|
|
EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 1, 1)); \
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
compare_with_negation(nir_type_float16)
|
|
|
|
|
compare_with_negation(nir_type_float32)
|
|
|
|
|
compare_with_negation(nir_type_float64)
|
|
|
|
|
compare_with_negation(nir_type_int8)
|
|
|
|
|
compare_with_negation(nir_type_uint8)
|
|
|
|
|
compare_with_negation(nir_type_int16)
|
|
|
|
|
compare_with_negation(nir_type_uint16)
|
|
|
|
|
compare_with_negation(nir_type_int32)
|
|
|
|
|
compare_with_negation(nir_type_uint32)
|
|
|
|
|
compare_with_negation(nir_type_int64)
|
|
|
|
|
compare_with_negation(nir_type_uint64)
|
|
|
|
|
|
nir: Handle swizzle in nir_alu_srcs_negative_equal
When I added this function, I was not sure if swizzles of immediate
values were a thing that occurred in NIR. The only existing user of
these functions is the partial redundancy elimination for compares.
Since comparison instructions are inherently scalar, this does not
occur.
However, a couple later patches, "nir/algebraic: Recognize
open-coded flrp(-1, 1, a) and flrp(1, -1, a)" combined with "intel/vec4:
Try to emit a single load for multiple 3-src instruction operands",
collaborate to create a few thousand instances.
No shader-db changes on any Intel platform.
v2: Handle the swizzle in nir_alu_srcs_negative_equal and leave
nir_const_value_negative_equal unchanged. Suggested by Jason.
v3: Correctly handle write masks. Add note (and assertion) that the
caller is responsible for various compatibility checks. The single
existing caller only calls this for combinations of scalar fadd and
float comparison instructions, so all of the requirements are met. A
later patch (intel/vec4: Try to emit a single load for multiple 3-src
instruction operands) will call this for sources of the same
instruction, so all of the requirements are met.
v4: Add unit test for nir_opt_comparison_pre that is fixed by this
commit.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-06-10 15:05:14 -07:00
|
|
|
TEST_F(alu_srcs_negative_equal_test, swizzle_scalar_to_vector)
|
|
|
|
|
{
|
|
|
|
|
nir_ssa_def *v = nir_imm_vec2(&bld, 1.0, -1.0);
|
|
|
|
|
const uint8_t s0[4] = { 0, 0, 0, 0 };
|
|
|
|
|
const uint8_t s1[4] = { 1, 1, 1, 1 };
|
|
|
|
|
|
|
|
|
|
/* We can't use nir_swizzle here because it inserts an extra MOV. */
|
|
|
|
|
nir_alu_instr *instr = nir_alu_instr_create(bld.shader, nir_op_fadd);
|
|
|
|
|
|
|
|
|
|
instr->src[0].src = nir_src_for_ssa(v);
|
|
|
|
|
instr->src[1].src = nir_src_for_ssa(v);
|
|
|
|
|
|
|
|
|
|
memcpy(&instr->src[0].swizzle, s0, sizeof(s0));
|
|
|
|
|
memcpy(&instr->src[1].swizzle, s1, sizeof(s1));
|
|
|
|
|
|
|
|
|
|
nir_builder_alu_instr_finish_and_insert(&bld, instr);
|
|
|
|
|
|
|
|
|
|
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
TEST_F(alu_srcs_negative_equal_test, unused_components_mismatch)
|
|
|
|
|
{
|
|
|
|
|
nir_ssa_def *v1 = nir_imm_vec4(&bld, -2.0, 18.0, 43.0, 1.0);
|
|
|
|
|
nir_ssa_def *v2 = nir_imm_vec4(&bld, 2.0, 99.0, 76.0, -1.0);
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *result = nir_fadd(&bld, v1, v2);
|
|
|
|
|
|
|
|
|
|
nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
|
|
|
|
|
|
|
|
|
|
/* Disable the channels that aren't negations of each other. */
|
|
|
|
|
instr->dest.dest.is_ssa = false;
|
|
|
|
|
instr->dest.write_mask = 8 + 1;
|
|
|
|
|
|
|
|
|
|
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
|
|
|
|
|
}
|
|
|
|
|
|
2019-03-27 00:59:03 +01:00
|
|
|
static void
|
2019-06-13 12:59:29 -07:00
|
|
|
count_sequence(nir_const_value c[NIR_MAX_VEC_COMPONENTS],
|
|
|
|
|
nir_alu_type full_type, int first)
|
2018-05-24 11:37:51 -07:00
|
|
|
{
|
2019-06-13 12:59:29 -07:00
|
|
|
switch (full_type) {
|
|
|
|
|
case nir_type_float16:
|
|
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
c[i].u16 = _mesa_float_to_half(float(i + first));
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_float32:
|
|
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
c[i].f32 = float(i + first);
|
2018-05-24 11:37:51 -07:00
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_float64:
|
|
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
c[i].f64 = double(i + first);
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int8:
|
|
|
|
|
case nir_type_uint8:
|
|
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
c[i].i8 = i + first;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int16:
|
|
|
|
|
case nir_type_uint16:
|
|
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
c[i].i16 = i + first;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int32:
|
|
|
|
|
case nir_type_uint32:
|
|
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
c[i].i32 = i + first;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int64:
|
|
|
|
|
case nir_type_uint64:
|
|
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
c[i].i64 = i + first;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_type_bool:
|
|
|
|
|
default:
|
|
|
|
|
unreachable("invalid base type");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-03-27 00:59:03 +01:00
|
|
|
static void
|
|
|
|
|
negate(nir_const_value dst[NIR_MAX_VEC_COMPONENTS],
|
|
|
|
|
const nir_const_value src[NIR_MAX_VEC_COMPONENTS],
|
2019-06-13 12:59:29 -07:00
|
|
|
nir_alu_type full_type, unsigned components)
|
2018-05-24 11:37:51 -07:00
|
|
|
{
|
2019-06-13 12:59:29 -07:00
|
|
|
switch (full_type) {
|
|
|
|
|
case nir_type_float16:
|
|
|
|
|
for (unsigned i = 0; i < components; i++)
|
|
|
|
|
dst[i].u16 = _mesa_float_to_half(-_mesa_half_to_float(src[i].u16));
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_float32:
|
|
|
|
|
for (unsigned i = 0; i < components; i++)
|
|
|
|
|
dst[i].f32 = -src[i].f32;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_float64:
|
|
|
|
|
for (unsigned i = 0; i < components; i++)
|
|
|
|
|
dst[i].f64 = -src[i].f64;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int8:
|
|
|
|
|
case nir_type_uint8:
|
|
|
|
|
for (unsigned i = 0; i < components; i++)
|
|
|
|
|
dst[i].i8 = -src[i].i8;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int16:
|
|
|
|
|
case nir_type_uint16:
|
|
|
|
|
for (unsigned i = 0; i < components; i++)
|
|
|
|
|
dst[i].i16 = -src[i].i16;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int32:
|
|
|
|
|
case nir_type_uint32:
|
|
|
|
|
for (unsigned i = 0; i < components; i++)
|
|
|
|
|
dst[i].i32 = -src[i].i32;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
break;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
2019-06-13 12:59:29 -07:00
|
|
|
case nir_type_int64:
|
|
|
|
|
case nir_type_uint64:
|
|
|
|
|
for (unsigned i = 0; i < components; i++)
|
|
|
|
|
dst[i].i64 = -src[i].i64;
|
2018-05-24 11:37:51 -07:00
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_type_bool:
|
|
|
|
|
default:
|
|
|
|
|
unreachable("invalid base type");
|
|
|
|
|
}
|
|
|
|
|
}
|