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the ring as they are sent by the client (enabled with
MACH64_NO_BATCH_DISPATCH). For the "no batch dispatch" path:
- The DMA end of list flag is moved in the COMMIT_RING macro.
- The flush function only starts a new pass if the card has gone idle and
there are descriptors on the ring still unprocessed. This could be
better optimized to flush only when there is a large enough queue on
the card, but we'll always need to flush if we run out of freeable
buffers.
- This path is working up to a point, but lockups still occur. There is a
small performance improvement.
136 lines
4.7 KiB
C
136 lines
4.7 KiB
C
/* mach64.h -- ATI Mach 64 DRM template customization -*- linux-c -*-
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* Created: Wed Feb 14 16:07:10 2001 by gareth@valinux.com
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*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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* Leif Delgass <ldelgass@retinalburn.net>
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*/
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#ifndef __MACH64_H__
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#define __MACH64_H__
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/* This remains constant for all DRM template files.
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*/
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#define DRM(x) mach64_##x
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/* General customization:
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*/
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#define __HAVE_AGP 1
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#define __MUST_HAVE_AGP 0
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#define __HAVE_MTRR 1
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#define __HAVE_CTX_BITMAP 1
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#define __HAVE_PCI_DMA 1
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/* DMA customization:
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*/
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#define __HAVE_DMA 1
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#define __HAVE_DMA_FREELIST 0
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#if 0
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#define __HAVE_DMA_IRQ 1
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#define __HAVE_DMA_IRQ_BH 1
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#define __HAVE_SHARED_IRQ 1
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#endif
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/* called before installing service routine in _irq_install */
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#define DRIVER_PREINSTALL() \
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do { \
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u32 tmp; \
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drm_mach64_private_t *dev_priv = dev->dev_private; \
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\
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tmp = MACH64_READ(MACH64_CRTC_INT_CNTL); \
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DRM_DEBUG("Before PREINSTALL: CRTC_INT_CNTL = 0x%08x\n", tmp); \
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/* clear active interrupts */ \
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if ( tmp & (MACH64_CRTC_VBLANK_INT \
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| MACH64_CRTC_BUSMASTER_EOL_INT) ) { \
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/* ack bits are the same as active interrupt bits, */ \
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/* so write back tmp to clear active interrupts */ \
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MACH64_WRITE( MACH64_CRTC_INT_CNTL, tmp ); \
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} \
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\
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/* disable interrupts */ \
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tmp &= ~(MACH64_CRTC_VBLANK_INT_EN \
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| MACH64_CRTC_BUSMASTER_EOL_INT_EN); \
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MACH64_WRITE( MACH64_CRTC_INT_CNTL, tmp ); \
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DRM_DEBUG("After PREINSTALL: CRTC_INT_CNTL = 0x%08x\n", tmp); \
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\
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} while(0)
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/* called after installing service routine in _irq_install */
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#define DRIVER_POSTINSTALL() \
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do { \
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/* clear and enable interrupts */ \
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u32 tmp; \
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drm_mach64_private_t *dev_priv = dev->dev_private; \
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\
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tmp = MACH64_READ(MACH64_CRTC_INT_CNTL); \
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DRM_DEBUG("Before POSTINSTALL: CRTC_INT_CNTL = 0x%08x\n", tmp); \
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/* clear active interrupts */ \
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if ( tmp & (MACH64_CRTC_VBLANK_INT \
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| MACH64_CRTC_BUSMASTER_EOL_INT) ) { \
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/* ack bits are the same as active interrupt bits, */ \
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/* so write back tmp to clear active interrupts */ \
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MACH64_WRITE( MACH64_CRTC_INT_CNTL, tmp ); \
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} \
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\
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/* enable interrupts */ \
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tmp |= (MACH64_CRTC_VBLANK_INT_EN \
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| MACH64_CRTC_BUSMASTER_EOL_INT_EN); \
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MACH64_WRITE( MACH64_CRTC_INT_CNTL, tmp ); \
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DRM_DEBUG("After POSTINSTALL: CRTC_INT_CNTL = 0x%08x\n", tmp); \
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\
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} while(0)
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/* called before freeing irq in _irq_uninstall */
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#define DRIVER_UNINSTALL() \
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do { \
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u32 tmp; \
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drm_mach64_private_t *dev_priv = dev->dev_private; \
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if (dev_priv) { \
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tmp = MACH64_READ(MACH64_CRTC_INT_CNTL); \
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DRM_DEBUG("Before UNINSTALL: CRTC_INT_CNTL = 0x%08x\n", tmp); \
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/* clear active interrupts */ \
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if ( tmp & (MACH64_CRTC_VBLANK_INT \
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| MACH64_CRTC_BUSMASTER_EOL_INT) ) { \
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/* ack bits are the same as active interrupt bits, */ \
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/* so write back tmp to clear active interrupts */ \
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MACH64_WRITE( MACH64_CRTC_INT_CNTL, tmp ); \
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} \
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\
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/* disable interrupts */ \
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tmp &= ~(MACH64_CRTC_VBLANK_INT_EN \
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| MACH64_CRTC_BUSMASTER_EOL_INT_EN); \
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MACH64_WRITE( MACH64_CRTC_INT_CNTL, tmp ); \
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DRM_DEBUG("After UNINSTALL: CRTC_INT_CNTL = 0x%08x\n", tmp); \
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} \
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} while(0)
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/* Buffer customization:
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*/
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#define DRIVER_AGP_BUFFERS_MAP( dev ) \
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((drm_mach64_private_t *)((dev)->dev_private))->buffers
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#endif
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