Commit graph

1430 commits

Author SHA1 Message Date
Dave Airlie
49075b678f r500: add two more register ranges for mesa driver to setup 2008-05-23 09:40:26 +10:00
Dave Airlie
74a9ea896e drm: fix nouveau warning 2008-05-23 09:40:26 +10:00
Eric Anholt
d6f7968577 [gem] Replace ring throttling hack with actual time measurement. 2008-05-21 16:40:14 -07:00
Dave Airlie
91c6c4b240 rs690/r500: vblank support.
The new display controller has the vblank interrupts in a different place.

Add support for vbl interrupts for these chips
2008-05-21 21:27:33 +10:00
Eric Anholt
af8e087157 [gem] Use a separate sequence number field from classic/ttm
This lets us get some qualities we desire, such as using the full 32-bit
range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active
sequence numbers to request structs, which will be used soon for throttling
and interrupt-driven list cleanup.
2008-05-20 14:16:26 -07:00
Eric Anholt
ab36a6f983 [gem] Rename sequence numbers from "cookie" to "seqno" 2008-05-20 10:53:10 -07:00
Eric Anholt
6c3ac484b0 [gem] Clean up active/inactive list handling using helper functions.
Additionally, a boolean active field is added to indicate which list an
object is on, rather than smashing last_rendering_cookie to 0 to show
inactive.  This will help with flush-reduction later on, and makes the code
clearer.
2008-05-20 10:52:39 -07:00
Dave Airlie
8399656106 r500: add more register ranges for Mesa driver 2008-05-17 10:22:12 +10:00
Eric Anholt
7dced2f33a [gem] Hold dev->struct_mutex to protect structure data. 2008-05-15 18:45:23 -07:00
Eric Anholt
3ab152da66 [gem] Rename the GTT LRU lists to active (executing) and inactive (idle). 2008-05-15 11:59:58 -07:00
Alex Deucher
caace3692f RS4xx: separate out RS400 and RS480 IGP chips
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups.  Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Eric Anholt
f650d7240a [GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen. 2008-05-12 13:17:01 -07:00
Keith Packard
7e7ea313c4 [intel] When polling for ring space, sleep for a lot longer (10ms)
If the ring is full, the engine will surely be running for more than 10ms.
2008-05-12 13:03:16 -07:00
Alex Deucher
10d754f0a2 RADEON: fix copy/pasto in last commit 2008-05-12 14:49:43 -04:00
Alex Deucher
75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher
e16a7101e8 RADEON: cleanup radeon_do_engine_reset() 2008-05-12 09:35:06 -04:00
Alex Deucher
5532b8d2a0 R300+: fixup pixcache flush 2008-05-12 09:30:47 -04:00
Alex Deucher
3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher
d26af273f8 RADEON: write AGP_BASE_2 on chips that support it 2008-05-12 09:21:45 -04:00
Alex Deucher
c307e50724 R300+: fixup PURGE/FLUSH macros 2008-05-12 09:18:28 -04:00
Alex Deucher
fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher
68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher
a34025ce22 Radeon IGP: clean up registers and magic numbers 2008-05-12 08:56:11 -04:00
Keith Packard
ff39db099b [GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
Keith Packard
1f9eaceb71 Merge commit 'anholt/drm-gem' into drm-gem 2008-05-10 21:05:25 -07:00
Keith Packard
a37ac493da [intel-GEM] Clean up GEM ioctl naming.
Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
Eric Anholt
c5c59eab80 GEM: Separate the LRU into execution list and LRU list.
Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
Keith Packard
1e26ca44c9 [gem] API cleanup. allocate->create unreference->close name->flink
Make the API names a bit more consistent.
2008-05-09 12:18:09 -07:00
Keith Packard
9af4c49743 [intel-gem] Move domains to relocation records. add set_domain ioctl.
Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.

This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
Eric Anholt
5f5f01ed91 GEM: Extend cache domain stuff for 965.
One of our MI_FLUSH bits is reserved on 965, being always implied, and there's
a vertex cache that was forgotten.
2008-05-07 12:46:06 -07:00
Keith Packard
6a6c37af9e [intel-GEM] ref count objects in gtt-lru.
If objects on the lru aren't ref counted, they'll get pulled from the gtt as
soon as they are freed. This change does cause objects to get stuck in the
gtt until they're forced out by new requests. The lru should get cleaned
when the irq occurs.
2008-05-06 21:59:06 -07:00
Keith Packard
2b9ef32669 Merge commit 'anholt/drm-gem' into drm-gem 2008-05-06 14:43:56 -07:00
Keith Packard
631e86c5c4 Start coding up memory domains 2008-05-06 14:43:49 -07:00
Eric Anholt
d2373b2a34 GEM: Use irq-based fencing rather than syncing and evicting every exec. 2008-05-06 13:28:26 -07:00
Keith Packard
91cba3ae17 Dump last batch buffer when hardware lockup is detected. 2008-05-05 22:10:02 -07:00
Keith Packard
ed6657fa8e Monitor ACTHD register while polling for idle ring.
When batch buffers are executing, the ring may be stuck for a long time.
Monitor the ACTHD pointer which will show if the execution engine is
actually hung.
2008-05-05 22:09:34 -07:00
Keith Packard
d59a9300ec Remove some debug messages. 2008-05-05 14:32:01 -07:00
Keith Packard
4511e6cd80 Correct execbuffer offset. Add memory barrier and chipset flush. 2008-05-05 11:27:06 -07:00
Keith Packard
b6f173c430 Add i915_dispatch_gem_execbuffer (broken).
This function submits a gem-based execbuffer to the ring.
It doesn't work yet.
2008-05-05 10:51:49 -07:00
Dave Airlie
d015219bd0 r500: add allowed range for us config/pixsize 2008-05-05 17:03:27 +10:00
Keith Packard
39e20bcd5f Add name/open ioctls, separate handle and pointer ref counts.
Names are just another unique integer set (from another idr object).
Names are removed when the user refernces (handles) are all destroyed --
this required that handles for objects be counted separately from
internal kernel references (so that we can tell when the handles are all
gone).
2008-05-02 12:29:17 -07:00
Keith Packard
49e8e3372a Remove drm_driver argument to functions taking drm_gem_object.
Now that drm_gem_object has a drm_driver * in it, functions don't need both
parameters.
2008-05-02 10:36:00 -07:00
Keith Packard
5b5b68ffd2 Fix nouveau warning when returning pointers in uint64_t objects. 2008-05-02 10:34:46 -07:00
Keith Packard
0d547c9ed9 Add alignment to all aperture allocation requests.
When pinning buffers, or using execbuffer, allow the application to specify
the necessary aperture allocation alignment constraints.
2008-05-01 20:41:55 -07:00
Keith Packard
30efad5113 Fix gem ioctls to be 32/64-bit clean.
mixed 32/64 bit systems need 'special' help for ioctl where the user-space
and kernel-space datatypes differ. Fixing the datatypes to be the same size,
and align the same way for both 32 and 64-bit ppc and x86 environments will
elimiante the need to have magic 32/64-bit ioctl translation code.
2008-05-01 20:31:16 -07:00
Eric Anholt
7d5f783eca Make GEM object handles be nonzero. 2008-05-01 16:38:37 -07:00
Eric Anholt
d2529d1396 Remove _args from gem ioctl argument structure tags. 2008-05-01 16:27:03 -07:00
Eric Anholt
793549116e Add pin/unpin object ioctls for gem. 2008-05-01 15:40:02 -07:00
Eric Anholt
ccd1bae0f6 checkpoint: relocations support. 2008-05-01 15:22:21 -07:00
Eric Anholt
5af87acbc2 checkpoint: gtt binding written. 2008-05-01 14:20:44 -07:00