Commit graph

105 commits

Author SHA1 Message Date
Alexandr Akulich
399ac8bafa libdrm/amdgpu: Fixed drm.h include.
The include type changed from system to own.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alexandr Akulich <akulichalexander@gmail.com>
2015-08-05 13:47:52 -04:00
Leo Liu
d2cbe9ecbe amdgpu: add VCE harvesting instance query
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Alex Deucher
cf5646001e amdgpu: update to the latest kernel header
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
933091e1d6 amdgpu: cleanup VA IOCTL handling
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Jammy Zhou
d273d84754 amdgpu: merge amdgpu_drm.h from kernel
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák
76af5c249f amdgpu: remove bo_handle from amdgpu_cs_ib_info, IBs should be in buffer list
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:51 -04:00
Ken Wang
ef9aa370bb amdgpu: add ib_start_alignment and ib_size_alignment for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
cdd1edcae0 amdgpu: add ce_ram_size for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
4bf29413a3 amdgpu: add vram_type and vram_bit_width for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
fc9fc7dd11 amdgpu: add max_memory_clock for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák
745081395e amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT
No users.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:50 -04:00
Christian König
942a5dbe6c amdgpu: stop checking flag masks
The kernel is responsible for parameter checking, not libdrm.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák
7c50f0d984 amdgpu: add new AMDGPU_TILING flags
Copied from the kernel.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák
4b39a8e7cf amdgpu: implement amdgpu_cs_query_reset_state
v2: also return the number of hangs

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
241cf6d105 amdgpu: validate the upper limit of virtual address v2
Only 8GB virtual address space is used by default now

v2: use -ENOSPC for the error case

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
db126d1d8a amdgpu: reuse the kernel IB flags v2
v2: remove 'CE' from the preamble flag

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
d9c431dd02 amdgpu: add ctx_id for wait_cs
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
a4c8321179 amdgpu: remove AMDGPU_GEM_CREATE_CPU_GTT_UC
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:49 -04:00
Alex Deucher
0936139536 drm: add libdrm_amdgpu (v7)
This is the new ioctl wrapper used by the new admgpu driver.
It's primarily used by xf86-video-amdgpu and mesa.

v2: fix amdgpu_drm.h install
v3: Integrate some of the sugestions from Emil:
    clean up Makefile.am, configure.ac
    capitalize header guards
    fix _FILE_OFFSET_BITS with config.h
    use drm_mmap/drm_munmap
    Remove unused ARRAY_SIZE macro
    use shared list implementation
    use shared math implementation
    use drmGetNodeTypeFromFd helper
v4: remove unused tiling defines
v5: include amdgpu.h in Makefile.am
v6: update amdgpu_drm.h
v7: libdrm.h -> libdrm_macros.h

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:48 -04:00
Daniel Stone
32471b265c Add blob property create/destroy ioctl wrappers
v2: Use memclear to zero out structure.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-06-29 19:19:22 +01:00
Ville Syrjälä
ed44e0b958 Support atomic modesetting ioctl
Add support for the atomic modesetting ioctl through a property-set API.

v1: Squashed intermediate patches from Ville, Rob and myself. Updated
    for current kernel interface (no blobs).
v2: Rewrite user-facing API to provide transactional/cursor interface.
    Use memclear to zero out ioctl.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Daniel Stone <daniels@collabora.com>

v3 [Emil Velikov]: Remove DRM_CAP_ATOMIC - superseded by
DRM_CLIENT_CAP_ATOMIC.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-29 19:01:19 +01:00
Alexandre Courbot
a1acffd4e0 nouveau: add coherent BO attribute
Add a flag allowing Nouveau to specify that an object should be coherent
at allocation time. This is required for some class of objects like
fences which are randomly-accessed by both the CPU and GPU. This flag
instructs the kernel driver to make sure the object remains coherent
even on architectures for which coherency is not guaranteed by the bus.

Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2015-05-21 21:20:29 +03:00
Neil Roberts
8576527cfa intel: Merge latest i915_drm.h
The main incentive to do this is to get I915_PARAM_REVISION.

v2: Rebase on top of some changes that were made to the header without
    copying the whole file from the kernel source.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-03-19 17:19:46 +00:00
Jeff McGee
d556e068a7 intel: Export total subslice and EU counts
Update kernel interface with new I915_GETPARAM ioctl entries for
subslice total and EU total. Add a wrapping function for each
parameter. Userspace drivers need these values when constructing
GPGPU commands. This kernel query method is intended to replace
the PCI ID-based tables that userspace drivers currently maintain.
The kernel driver can employ fuse register reads as needed to
ensure the most accurate determination of GT config attributes.
This first became important with Cherryview in which the config
could differ between devices with the same PCI ID.

The kernel detection of these values is device-specific. Userspace
drivers should continue to maintain ID-based tables for older
devices which return ENODEV when using this query.

v2: remove unnecessary include of <stdbool.h> and increment the
    I915_GETPARAM indices to match updated kernel patch.

For: VIZ-4636
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-03-18 18:15:37 +00:00
Adam Cheney
566c3ce877 Add new DRM_MODE_CONNECTOR and _ENCODER defines
Update drm_mode.h defines from kernel upstream for connector and
encoder types to expose DSI and other newly defined types.

Signed-off-by: Adam Cheney <acheney@nvidia.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-01-05 14:30:57 -05:00
Thierry Reding
7b5e652689 tegra: Add SET/GET_FLAGS IOCTLs
The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a
buffer object after it has been allocated or imported. Flags associated
with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS
IOCTL.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-27 17:20:32 +01:00
Thierry Reding
5ad2eef6ea tegra: Add GET/SET_TILING IOCTLs
Currently the tiling parameters of buffer objects can only be set at
allocation time, and only a single tiled mode is supported. This new
DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also
allows the tiling mode to be changed after the allocation. This will
enable the Tegra DRM driver to import buffers from a GPU and directly
scan them out by configuring the display controller appropriately.

To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the
current tiling mode of a buffer object. This is necessary when importing
buffers via handle (as is done in Mesa for example) so that userspace
can determine the proper parameters for the 2D or 3D engines.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-27 17:20:32 +01:00
Thierry Reding
d6a4c2cbd1 libdrm: Add NVIDIA Tegra support
Add the libdrm_tegra helper library to encapsulate Tegra-specific
interfaces to the DRM.

Furthermore, Tegra is added to the list of supported chips in the
modetest and vbltest programs.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-27 17:05:35 +01:00
Rob Clark
fb4177046d update signed/object prop types
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-11-24 19:56:50 -05:00
Emil Velikov
deb690f78d Remove i810_drm.h and i830_drm.h from the distribution tarball
Both of these headers are not installed since they were imported.
They  are not even used internally. The latter no longer exist in the
kernel...

Note the * symbol in EXTRA_DIST causes 'make distcheck' to fail. When
was the last time we ran it ?

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-28 17:09:33 +01:00
Emil Velikov
98ec08d836 automake: remove obsolete makefiles
Rather than having two extra makefiles in order to ship ~10 headers
just fold its 5 lines of code into the top one makefile.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-09-28 17:09:33 +01:00
Emil Velikov
4255d3d51d libdrm, freedreno, intel, nouveau, radeon: add Makefile.sources
Will be used to consolidate the required sources lists as well as the
install-able headers. This is turn will help us to avoid the
duplication with the upcoming Android build support.

v2: Rename the headers variable to *_H_FILES.
v3: Rebase on top of symbol visibility patches.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-01 16:06:01 +01:00
Andreas Boll
8bdb4cfa45 libdrm: Fix drm.h include in qxl drm header file
Use "drm.h" instead of "drm/drm.h" as used in the other header files.
Fixes xserver-xorg-video-qxl build with KMS support on Debian, where this
file is installed in /usr/include/libdrm.

Fixes Debian bug #746807

Reported-by: Bastian Blank <waldi@debian.org>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-07-28 17:35:29 +02:00
Tvrtko Ursulin
4fddc92e04 intel: Add new userptr ioctl
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2014-06-19 18:35:05 +01:00
Damien Lespiau
20edfb9a16 intel: Sync typo fix from the kernel sources.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-06-19 18:29:20 +01:00
Damien Lespiau
3cde43f566 intel: Sync the command parser version parameter from kernel
Cc: Bradley Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Brad Volkin <bradley.d.volkin@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-06-19 18:29:02 +01:00
Matt Roper
8fc62ca8ac drm: Add universal plane capability bit and plane type enums
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-05-19 19:43:16 -04:00
Marek Olšák
4e77991424 radeon: sync with radeon_drm.h from kernel headers
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-04-04 19:07:55 +02:00
Ben Widawsky
a254cb5041 intel: Merge latest i915_drm.h
This was not done as a straight copy because reset_stats IOCTL landed in
libdrm before upstream kernel.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2014-01-10 11:05:50 -08:00
Marek Olšák
4c5de721c4 Bump the version to 2.4.50 2013-12-03 19:50:22 +01:00
Marek Olšák
67d92404d6 radeon: implement 2D tiling for CIK
Bug fixes and simplification by Marek.
We have to use the tile index of 0 for non-MSAA depth-stencil after all.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-23 00:35:39 +01:00
Ian Romanick
5a41b02504 intel: Add support for GPU reset status query ioctl
I would have just used the drmIoctl interface directly in Mesa, but the
ioctl needs some data from the drm_intel_context that is not exposed
outside libdrm.

This ioctl is in the drm-intel-next tree as b635991.

v2: Update based on Mika's kernel work.

v3: Fix compile failures from last-minute typos.  Sigh.

v4: Import the actual changes from the kernel i915_drm.h.  Only comments
on some fields of drm_i915_reset_stats differed.  There are still some
deltas between the kernel i915_drm.h and the one in libdrm, but those
can be resolved in other patches.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v3]
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-15 11:31:49 -08:00
Dave Airlie
da738d1ed0 Revert "intel: Add support for GPU reset status query ioctl"
This reverts commit 6335e1d28c.

No taxation without representation, in other words no userspace without kernel
stuff being in a stable location, either drm-next but I'll accept drm-intel-next
for intel specific stuff.
2013-11-08 16:40:18 +10:00
Ian Romanick
6335e1d28c intel: Add support for GPU reset status query ioctl
I would have just used the drmIoctl interface directly in Mesa, but the
ioctl needs some data from the drm_intel_context that is not exposed
outside libdrm.

v2: Update based on Mika's kernel work.

v3: Fix compile failures from last-minute typos.  Sigh.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-07 19:14:31 -08:00
Keith Packard
ebff7a1e22 Add DRM_MODE_PAGE_FLIP_ASYNC define
This exposes the kernel API for performing asynchronous flips

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-11-06 19:49:39 -08:00
Damien Lespiau
2dd7054781 drm: Sync the DRM_SET_CLIENT_CAP ioctl definition
v2: SET_CAP -> SET_CLIENT_CAP renaming

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-09-30 13:35:49 +01:00
Damien Lespiau
edf5c7cde5 drm: Synchronize the stereo 3D mode flags from the kernel headers
v2: stereo layouts are now an enum (Daniel Vetter)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-09-30 13:35:49 +01:00
Daniel Kurtz
0f4452bb51 libdrm: Make some drm headers compatible with gcc -std=c89 -pedantic
The following minor changes were needed to these headers:
 * Convert // comments to /* */
 * No , after final member of enum

With these changes, these header files can be included by a program that
is built with gcc options:
  -std=c89 -Werror -pedantic

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-09-22 13:30:46 -07:00
Michel Dänzer
a48d6e5621 radeon: Fix tiling mode index for 1D tiled depth/stencil surfaces on CIK
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-18 18:28:51 +02:00
Imre Deak
f8f1f6e37a libdrm: add missing DRM_CAP_TIMESTAMP_MONOTONIC
Just add the definition according the kernel's copy of drm.h

Signed-off-by: Imre Deak <imre.deak@intel.com>
2013-07-04 11:03:52 +03:00