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radeon: Fix tiling mode index for 1D tiled depth/stencil surfaces on CIK

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Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Michel Dänzer 2013-09-18 15:43:05 +02:00 • committed by Michel Dänzer
parent b6da447c04
commit a48d6e5621
2 changed files with 14 additions and 3 deletions
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2
include/drm/radeon_drm.h
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@ -1004,4 +1004,6 @@ struct drm_radeon_info {
#define SI_TILE_MODE_DEPTH_STENCIL_2D_4AA 3
#define SI_TILE_MODE_DEPTH_STENCIL_2D_8AA 2
#define CIK_TILE_MODE_DEPTH_STENCIL_1D 5
#endif

15
radeon/radeon_surface.c
View file

@ -1382,10 +1382,16 @@ static int si_surface_sanity(struct radeon_surface_manager *surf_man,
break;
case RADEON_SURF_MODE_1D:
if (surf->flags & RADEON_SURF_SBUFFER) {
*stencil_tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
if (surf_man->family >= CHIP_BONAIRE)
*stencil_tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
else
*stencil_tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
}
if (surf->flags & RADEON_SURF_ZBUFFER) {
*tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
if (surf_man->family >= CHIP_BONAIRE)
*tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
else
*tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
} else if (surf->flags & RADEON_SURF_SCANOUT) {
*tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
} else {
@ -1643,7 +1649,10 @@ static int si_surface_init_2d(struct radeon_surface_manager *surf_man,
tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
break;
case SI_TILE_MODE_DEPTH_STENCIL_2D:
tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
if (surf_man->family >= CHIP_BONAIRE)
tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
else
tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
break;
default:
return -EINVAL;