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1981 commits

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Author SHA1 Message Date
Wang Zhenyu
80095ffe01 i915: Add 965GM pci id update 2007-02-13 16:20:45 +08:00
Wang Zhenyu
2a2d726233 Merge branch 'master' into crestline 2007-02-13 16:18:15 +08:00
Wang Zhenyu
3234b29058 Revert "Add Intel 965GM chipset support" 
This would be updated with external pci id file change.
 2007-02-13 16:17:38 +08:00
Adam Jackson
5bd13c5e15 Fix some outdated URLs, remove others. 2007-02-12 15:45:51 -05:00
Eric Anholt
898aca1a66 Warning fix: correct type of i915_mmio argument. 2007-02-07 21:26:02 -08:00
Eric Anholt
ef9a9d3cd1 Define __iomem for systems without it. 2007-02-07 21:26:01 -08:00
Eric Anholt
8918748058 Add chip family flags to i915 driver, and fix a missing '"' in mach64 ID list. 2007-02-07 21:26:01 -08:00
Stephane Marchesin
17985f07d6 nouveau: more work on the nv04 context switch code. 2007-02-06 01:17:32 +01:00
Stephane Marchesin
8c663b4e56 nouveau: and of course, I was missing the last nv04 piece. 2007-02-03 06:13:27 +01:00
Stephane Marchesin
ebf22aed9a nouveau: add missing nv04_graph.c symlink. 2007-02-03 06:02:12 +01:00
Stephane Marchesin
0c13657c33 nouveau: plugin the nv04 graph init function. 2007-02-03 06:00:29 +01:00
Stephane Marchesin
7ab9e7f36f nouveau: cleanup the nv04 pgraph save/restore mechanism. 2007-02-03 05:56:42 +01:00
Stephane Marchesin
d69902db3b nouveau: fix nv04 graph routines for new register names. 2007-02-03 05:25:36 +01:00
Stephane Marchesin
5a072f32c8 nouveau: rename registers to their proper names. 2007-02-03 04:57:06 +01:00
Stephane Marchesin
e64dbef911 nouveau: add NV04 registers required for PGRAPH context switching. 2007-02-03 04:23:09 +01:00
Matthieu Castet
55f7859a25 nouveau: nv ctx switch opps the size of array was wrong 2007-02-02 23:01:03 +01:00
Matthieu Castet
63cf3b3da7 nouveau: nv10 ctx switch, some regs are nv17+ only 2007-02-02 20:08:33 +01:00
Michel Dänzer
8c17edf23c Make git ignore generated config.h.in. 2007-02-02 13:24:19 +01:00
Thomas Hellstrom
6c04185857 via: Try to improve command-buffer chaining. 
Bump driver date and patchlevel.
 2007-02-02 09:22:30 +01:00
Thomas Hellstrom
70bba11bc7 Disable AGP DMA for chips with the new 3D engine. 2007-02-02 09:22:15 +01:00
Wang Zhenyu
77a6d8ae93 Add Intel 965GM chipset support 2007-02-02 09:52:37 +08:00
Wang Zhenyu
9907b32c67 Revert origin crestline pci id patch 2007-02-02 09:51:38 +08:00
Thomas Hellstrom
07fabc3fd8 Make the utility runnable also for normal users. 2007-01-31 11:41:44 +01:00
Thomas Hellstrom
36d50687dd Fix an error-path oops. 2007-01-31 11:03:53 +01:00
Thomas Hellstrom
d399fcf46f Add a buffer object transfer function. 
Creates a placeholder for the old buffer contents
when it is transfered to / from static memory like VRAM.
 2007-01-30 16:20:23 +01:00
Thomas Hellstrom
0932269656 Indent according to xorg rules. 2007-01-30 14:54:12 +01:00
Thomas Hellstrom
2bc925430b Add license header. 2007-01-30 14:54:12 +01:00
Thomas Hellstrom
9968a21be1 Add some relevant tests for the new buffer object interface. 2007-01-30 14:54:12 +01:00
Thomas Hellstrom
c01fe2cdd4 Add the ttmtest test utility. 2007-01-30 14:54:12 +01:00
Thomas Hellstrom
9bbdc0fb10 Clean up buffer object destruction somewhat. 2007-01-30 12:35:49 +01:00
Thomas Hellstrom
9a654e71bd Use pre-defined list_splice function. 2007-01-29 13:37:02 +01:00
Thomas Hellstrom
45418bb1b1 s/buf/bo/ for consistency. 2007-01-29 13:37:02 +01:00
Thomas Hellstrom
1e4c7d69f5 Some cleanup. A buffer object should only have one active memory type. 2007-01-29 13:37:02 +01:00
Ben Skeggs
ee4ac5c897 nouveau: determine chipset type at startup, instead of every time we use it. 2007-01-28 23:48:33 +11:00
Matthieu Castet
c744bfde2d make works ctx switch on nv10. 2007-01-26 21:57:44 +01:00
Patrice Mandin
9c03ca81e7 nouveau: oops, wrong indexing in nv17 regs 2007-01-26 21:05:59 +01:00
Patrice Mandin
5534c90ff3 nouveau: read gpu type once 2007-01-26 19:54:35 +01:00
Patrice Mandin
05d3ed472e nouveau: only save/restore nv17 regs on nv17,18 hw 2007-01-26 19:25:49 +01:00
Patrice Mandin
e7ba15a003 nouveau: add extra pgraph registers 2007-01-26 19:24:34 +01:00
Patrice Mandin
d4c9f135b5 nouveau: add some nv10 pgraph defines 2007-01-26 18:10:31 +01:00
Patrice Mandin
6d9ef1a960 nouveau: simplify and fix BIG_ENDIAN flags 2007-01-25 23:06:48 +01:00
Nian Wu
3886b7e629 Merge branch 'master' into crestline 2007-01-25 13:30:46 -08:00
Thomas Hellstrom
582637641a Remove a scary error printed when we were leaking memory caches. 
We don't use memory caches anymore...

Fix memory accounting initialization to only use low or DMA32 memory.
 2007-01-25 14:27:29 +01:00
Ben Skeggs
90ae39d2f0 nouveau: nv4c default context 2007-01-25 11:11:01 +11:00
Ben Skeggs
aa7266385e nouveau: always print nsource/nstatus regs on PGRAPH errors 2007-01-25 08:16:23 +11:00
Zou Nan hai
7d4e6b1445 vblank interrupt fix 2007-01-24 16:33:21 +08:00
Ben Skeggs
19ba074938 nouveau: fix getparam from 32-bit client on 64-bit kernel 2007-01-19 15:41:51 +11:00
Ben Skeggs
4291df69bd nouveau: re-add 6150 Go pciid (0x0244) 2007-01-19 15:16:18 +11:00
Jeremy Kolb
a40de938fa nouveau: cleanup nv30_graph.c 2007-01-18 21:40:21 -05:00
Jeremy Kolb
ab72a7714e nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching. 2007-01-18 21:40:21 -05:00