Commit graph

107 commits

Author SHA1 Message Date
Emil Velikov
104c895f65 drm: remove no longer needed VISIBILITY_CFLAGS
With earlier commits we've annotated the private symbols, thus
we no longer require the -fvisibility=hidden CFLAGS.

Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-28 11:19:15 +01:00
Emil Velikov
42465feb97 drm: rename libdrm{,_macros}.h
Provide a more meaningful name, considering what it does.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-28 11:19:15 +01:00
Emil Velikov
552de225bf radeon: add symbols test
Will allow us to catch when the library exports more symbols than
the ones in the public headers.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-28 11:18:43 +01:00
Emil Velikov
ab84a95e85 radeon: move bof.[ch] out of libdrm_radeon
The functions(files) are used if one explicitly modifies radeon_cs_gem.c
by setting CS_BOF_DUMP to 1. As bof.[ch] is used (copied) to other
out-of-tree projects, keep them around in the distribution tarball.

Cc: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-28 11:18:43 +01:00
Emil Velikov
d9b6a69252 autotools: remove ${srcdir} from the includes
Already handled by the build system.

v2: s/compiler/build system/

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-20 17:18:01 +00:00
Emil Velikov
ff021215ea android: remove LOCAL_COPY_HEADERS* variables
With earlier changes we've implicitly add the relevant directories
to the includes list, via LOCAL_EXPORT_C_INCLUDES_DIRS.

v2: Update the top Android.mk as well.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-20 17:02:56 +00:00
Emil Velikov
c277cbdd15 android: remove ${srcdir} from the includes
Already handled by the build system.

v2: s/compiler/build system/. Spotted by Chih-Wei.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-20 16:59:58 +00:00
Emil Velikov
af4379f759 android: simplify LOCAL_C_INCLUDES
Each of the libdrm_${hw} modules pull libdrm for linking as such:

libdrm's LOCAL_EXPORT_C_INCLUDE_DIRS are added to the includes list.
The former of which is already set to ${top} and ${top}/include/drm.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-20 16:59:22 +00:00
Emil Velikov
24ac8cd7db android: correcly set LOCAL_EXPORT_C_INCLUDE_DIRS
- Don't add ${hw}/${hw}, but ${hw} to the includes path. The former
does not exist.
 - Set the variable for libkms.

Inspired by the work of from Chih-Wei from the Android-x86 project.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-20 16:59:22 +00:00
Chih-Wei Huang
5c1c09e0d2 android: remove duplicate libdrm in LOCAL_SHARED_LIBRARIES
v2: Fold libpciaccess and libdrm into a single local_shared_libraries

Acked-by: Jan Vesely <jan.vesely@rutgers.edu>
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-23 09:27:49 +00:00
Dave Airlie
eca91cf163 radeon: align r600/700 fmask to 128 X blocks.
After much searching and empricial testing, and reading of
things I've no justifcation for this fix, other than it really
appears this is what the hw is doing or close enough.

It makes sense that each entry in the FMASK corresponds to
an entry in the CMASKm and the CMASK is organised into 128x128
blocks, but I can't find anything in any of the docs/info from AMD.

But I've spent a lot of time on this, and this seems to be the
simplest fix, in that we don't over allocate things too much,
once this fix in place we can nuke the extra multiplier in mesa.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-01-19 16:47:34 +10:00
Michel Dänzer
c866dc7c00 radeon: Always multiply pitch_bytes by nsamples, not by slice_pt
slice_pt is tileb[0] / tile_split, which isn't directly related to the
pitch.

This caused pitch_bytes to be too large in some cases.

[0] Tile size in bytes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-29 16:50:06 +09:00
Emil Velikov
6281cf1b43 radeon: use drm_mmap/drm_munmap wrappers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-09-28 17:09:34 +01:00
Emil Velikov
268dce4192 automake: pick up all files for distribution.
Autotools is already smart enough to pick the *.pc.in files but it
needs some help with the Android.mk ones.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-09-28 17:09:34 +01:00
Emil Velikov
adb1cdcdde radeon: add Android build support
v2 Rename the headers variable(s) to *_H_FILES.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-01 16:06:02 +01:00
Emil Velikov
4255d3d51d libdrm, freedreno, intel, nouveau, radeon: add Makefile.sources
Will be used to consolidate the required sources lists as well as the
install-able headers. This is turn will help us to avoid the
duplication with the upcoming Android build support.

v2: Rename the headers variable to *_H_FILES.
v3: Rebase on top of symbol visibility patches.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-01 16:06:01 +01:00
Maks Naumov
391bba9c4c radeon: Fix surf->bankh init by default value when surf->tile_split == 0
Signed-off-by: Maks Naumov <maksqwe1@ukr.net>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-08-25 13:07:12 +02:00
Alex Deucher
22b995d8cb radeon: add new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-21 11:06:33 -04:00
Alex Deucher
3ad801bf1f radeon: add new CIK pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-21 11:04:51 -04:00
Maarten Lankhorst
58ce9d6292 radeon: Use symbol visibility.
All the bof_* symbols are now no longer exported.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-04 09:22:36 +02:00
Marek Olšák
2169dce96c radeon: fix typo in sample split / fixes MSAA on Hawaii
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-07-29 00:24:32 +02:00
Thomas Klausner
72f84b85af radeon: Remove superfluous parentheses.
Signed-off-by: Thomas Klausner <wiz@NetBSD.org>
2014-07-16 12:15:29 +09:00
Samuel Li
3bdf1f78d8 radeon: add Mullins pci ids
Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-05-02 11:05:31 -04:00
Samuel Li
c2bc8ad438 radeon: add Mullins chip family
Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-05-02 11:05:20 -04:00
Alex Deucher
e8cbc57965 radeon: fix sumo2 pci id
0x9649 is sumo2, not sumo.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 15:19:34 -05:00
Alex Deucher
1543c96e15 radeon: avoid possible divide by 0 in surface manager
Some users report hitting a divide by 0 with the tile split in
certain apps.  Tile_split shouldn't ever be 0 unless the surface
structure was not properly initialized.  I think there may be some
cases where mesa uses an improperly initialized surface struct,
but I haven't had time to track it down.

Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=72425

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-12-24 15:17:06 -05:00
Michel Dänzer
c8a437f4c7 radeon: Update unaligned offset for 2D->1D tiling transition on SI
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71983

Tested-by: Arek Ruśniak <arek.rusi@gmail.com>
2013-11-26 18:16:03 +09:00
Marek Olšák
3f46489022 radeon: handle P16 pipe configs for Hawaii 2013-11-23 00:35:42 +01:00
Michel Dänzer
f0e399d8f0 radeon: don't overallocate stencil by 4 on SI and CIK
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2013-11-23 00:35:42 +01:00
Marek Olšák
67d92404d6 radeon: implement 2D tiling for CIK
Bug fixes and simplification by Marek.
We have to use the tile index of 0 for non-MSAA depth-stencil after all.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-23 00:35:39 +01:00
Michel Dänzer
ce8af45425 radeon: fix mipmap level 0 and 1 alignment for SI and CIK
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-23 00:35:34 +01:00
Alex Deucher
1a84eea45b radeon: add hawaii pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-13 11:33:31 -05:00
Alex Deucher
efcc456030 radeon: add hawaii chip family
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-13 11:33:21 -05:00
Marek Olšák
75f747b919 radeon: fix pitch alignment for non-power-of-two mipmaps on SI
This fixes VM protection faults.

I have a new piglit test which can iterate over all possible widths, heights,
and depths (including NPOT) and tests mipmapping with various texture targets.

After this is committed, I'll make a new release of libdrm and bump
the libdrm version requirement in Mesa.
2013-09-29 14:44:23 +02:00
Michel Dänzer
a48d6e5621 radeon: Fix tiling mode index for 1D tiled depth/stencil surfaces on CIK
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-18 18:28:51 +02:00
Alex Deucher
58d0088831 radeon: pad CS to 8 DW
Aligns the IB to 8 DWs.  The aligns the IB to the
CP fetch size.  r6xx also require at least 4 DW
alignment to avoid a hw bug.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-06 15:58:56 -04:00
Alex Deucher
8a2e0fa917 radeon: add berlin pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-06 15:39:37 -04:00
Alex Deucher
378bb47a78 radeon: add kabini pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28 14:44:17 -04:00
Alex Deucher
96c04c23fc radeon: add Bonaire pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28 14:44:10 -04:00
Alex Deucher
0ff7f2760d radeon: add CIK chip families
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28 14:44:02 -04:00
Mark Kettenis
a0178c00c7 radeon: correct RADEON_GEM_WAIT_IDLE use
RADEON_GEM_WAIT_IDLE is declared DRM_IOW but libdrm
uses it with drmCommandWriteRead instead of drmCommandWrite
which leads to the ioctl being unmatched and returning an
error on at least OpenBSD.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
2013-06-06 16:19:38 +02:00
Marek Olšák
e5e51c2110 radeon: add RADEON_SURF_FMASK flag which disables 2D->1D tiling transition
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-15 19:15:42 +02:00
Alex Deucher
96e90aabc4 radeon: add HAINAN pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-13 16:16:14 -04:00
Alex Deucher
c56729cc15 radeon: add HAINAN family
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-13 16:16:08 -04:00
Alex Deucher
ec3c257eb6 radeon: add new richland pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 14:13:52 -04:00
Alex Deucher
439d7d7432 radeon: add new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 14:12:50 -04:00
Jerome Glisse
a36cdb858e radeon: add si tiling support v5
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
v4: Split radeon_drm.h update to its own patch
v5: update against lastest next tree for radeon

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-04-12 09:46:40 -04:00
Alex Deucher
36a2daad24 radeon: add pci ids for Richland APUs
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-08 14:12:32 -05:00
Jerome Glisse
ade2ad2d66 radeonsi: make sure tile_split field are not garbage
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2013-03-07 09:47:16 -05:00
Alex Deucher
353f073bc1 radeon: add OLAND pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-04 15:03:55 -05:00