Add a new field userq_num_hqds to drm_amdgpu_info_hw_ip to expose the
number of available hardware queue descriptors (HQDs) for user queues.
This allows userspace to query the maximum number of user queues that
can be created for a particular IP block.
the patch link in driver side:
https://lists.freedesktop.org/archives/amd-gfx/2025-June/126686.htmlhttps://lists.freedesktop.org/archives/amd-gfx/2025-July/126981.html
v2: rename userq_num_hqds to userq_num_slots (Marek)
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Add queue id support to the user queue wait IOCTL
drm_amdgpu_userq_wait structure.
This is required to retrieve the wait user queue and maintain
the fence driver references in it so that the user queue in
the same context releases their reference to the fence drivers
at some point before queue destruction.
Otherwise, we would gather those references until we
don't have any more space left and crash.
Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This patch extends the user queue creation API to support:
1. Queue priority levels (normal low, low, normal high, high)
- High priority is restricted to admin-only
2. Secure queue flag for protected content access
The changes include:
- Adding a `flags` parameter to `amdgpu_create_userqueue()`
- Defining priority and security flags in `amdgpu_drm.h`
- Updating the `drm_amdgpu_userq_in` struct to replace padding with flags
- Documenting the new flags field
Related driver patches provided by Alex:
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122782.htmlhttps://lists.freedesktop.org/archives/amd-gfx/2025-April/122780.htmlhttps://lists.freedesktop.org/archives/amd-gfx/2025-April/122786.html
Cc: Koenig, Christian <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This patch adds UAPI interface changes for AMDGPU usermode
queues, semaphore and new AMDGPU GEM domain for doorbells.
Usermode queues allow a userspace process to create
and submit its graphics/compute/sdma work directly to the GPU.
v2:(Marek)
- Add csa support for SDMA queue.
- Rename UAPI objects and struct as per UAPI review. (Shashank)
v3:(Yogesh)
- Rename UAPI timeline* objects as per UAPI review. (Arvind)
v4: (Marek)
- Drop AMDGPU_USERQ_BO_WRITE as this should not be a global option
of the IOCTL, It should be option per buffer. Hence adding separate
array for read and write BO handles. (Arun)
- Modify num_fences to __u16, flags changed to __u16 and placed
the num_fences next to flags for optimal padding and size. (Arun)
- Fix 32-bit holes issue in sturct drm_amdgpu_gem_va as per
UAPI review (Arvind).
v5:(Marek/Pierre-Eric)
- add more detail params description for signal and wait IOCTL calls.
- Remove the unused structure fields in signal and wait structs.
- Add separate array of read and write for BO handles. (Arun)
- Removes the unused flags parameter from the usermode queue UAPI structure
- Clarify comments on top of drm_amdgpu_userq_in
- Clarify comment for queue_id (in)
- Clarify comment for mqd
- Clarify comment for compute MQD size
- Clarify comment for queue_id (out)
- Adds padding variables in userqueue in/out structures. (Shashank)
v6:(Pierre-Eric)
- Modify the function parameter names and struct
field names as per the review comments. (Arun)
v7:(Marek)
- Modify the structure field name and comments. (Arun)
- Rename vm_timeline_syncobj and add comment for
vm_timeline_point.
- Remove GDS buffer support from MQD. (Arvind)
v8:(Pierre-Eric)
- Modify the function parameter names.
Cc: Koenig, Christian <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
This patch:
- adds a new subquery (AMDGPU_INFO_UQ_FW_AREAS) in AMDGPU_INFO_IOCTL
to get the size and alignment of shadow and csa objects from the
kernel. This information is required for a userqueue consumer (like
MESA/libdrm) to create the userqueue metadata objects properly.
- also adds supporting metadata structures and a high level wrapper
function (amdgpu_query_uq_metadata_info) to the query, to make it
easy to use.
The corresponding kernel changes for this UAPI extension can be found
in amd-gfx mailing list, link:
https://patchwork.freedesktop.org/patch/621390/?series=139715&rev=2
This patch adds support only for the GFX IP, and the other engines may
be supported in subsequent development.
V2: fix the build error due to exporting of helper function
V3: make an entry for amdgpu_query_uq_metadata_info in
amdgpu-symbols.txt
V4: Rename the subquery to AMDGPU_INFO_UQ_FW_AREAS (Marek, Pierre-Eric)
V5: Addressed review comments (Pierre-Eric):
- Fix the API comment to match the new IOCTL name
- remove the unused uq_metadata parameter
Cc: Marek Olsak <marek.olsak@amd.com>
Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Cc: Arvind Yadav <arvind.yadav@amd.com>
Reviewed-by: Marek Olsak <marek.olsak@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
From VCN4, AMDGPU_HW_IP_VCN_ENC is re-used to support both encoding
and decoding jobs.
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 8a02ea42bc1d4c448caf1bab0e05899dad503f74
Some changes were omitted, e.g., to nouveau_drm.h, i915_drm.h, and
msm_drm.h, as the nouveau and i915 changes looked to me as if they
could break compatibility or require other compatibility fixes to
libdrm which i can not judge. msm_drm.h broke the build, as there
are definitely changes needed to libdrm's msm support code.
The shortlog below is edited to only list what corresponds to files
that are included here, because it looked safe to me.
The changes were as follows (shortlog from
b10733527bfd864605c33ab2e9a886eec317ec39..HEAD):
Aaron Liu (1):
drm/amdgpu: add uapi to define yellow carp series
Alex Deucher (1):
drm/amdgpu: add INFO ioctl support for querying video caps (v4)
Christian Gmeiner (1):
drm/etnaviv: provide more ID values via GET_PARAM ioctl.
Felix Kuehling (1):
drm/amdgpu: Add new placement for preemptible SG BOs
Jiawei Gu (1):
drm/amdgpu: Add vbios info ioctl interface
Lionel Landwerlin (1):
drm: fix drm_mode_create_blob comment
Mario Kleiner (1):
drm/fourcc: Add 16 bpc fixed point framebuffer formats.
Nirmoy Das (1):
drm/amdgpu: remove AMDGPU_GEM_CREATE_SHADOW flag
Noralf Trønnes (1):
drm/uapi: Add USB connector type
Radhakrishna Sripada (1):
drm/framebuffer: Format modifier for Intel Gen 12 render compression with Clear Color
Simon Ser (13):
drm: improve kernel-docs in drm_mode.h
drm: document drm_mode_get_connector
drm: document drm_mode_modeinfo
drm: document that user-space should force-probe connectors
drm/doc: atomic implicitly enables other caps
drm/doc: re-format drm.h file comment
drm/doc: demote old doc-comments in drm.h
drm/fourcc: fix Amlogic format modifier masks
drm/uapi: document kernel capabilities
drm/connector: demote connector force-probes for non-master clients
drm: reference mode flags in DRM_CLIENT_CAP_* docs
drm: clarify and linkify DRM_CLIENT_CAP_WRITEBACK_CONNECTORS docs
drm: document minimum kernel version for DRM_CLIENT_CAP_*
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
From drm-next:
commit 2cbcb78c9ee5520c8d836c7ff57d1b60ebe8e9b7
Merge: 06debd6e1b28 8c44390d8872
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri Mar 26 15:52:01 2021 +0100
Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.13-2021-03-23:
amdgpu:
...
UAPI:
- amdgpu: Add a new INFO ioctl interface to query video capabilities
rather than hardcoding them in userspace. This allows us to provide
fine grained asic capabilities (e.g., if a particular part is
bandwidth limited, we can limit the capabilities). Proposed userspace:
https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_capshttps://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps
...
Danvet: A bunch of conflicts all over, but it seems to compile ... I
did put the call to dc_allow_idle_optimizations() on a single line
since it looked a bit too jarring to be left alone.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210324040147.1990338-1-alexander.deucher@amd.com
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
What are these headers?
Adding currently missing stuff from https://cgit.freedesktop.org/drm/drm/tree/include/uapi/drm/amdgpu_drm.h based on
the latest commit there:
commit f730f39eb981af249d57336b47cfe3925632a7fd (HEAD -> drm-next, tag: drm-next-2021-02-19, origin/drm-next, origin/HEAD)
Merge: 4f8ad4045b38 81ce8f04aa96
Author: Dave Airlie <airlied@redhat.com>
Date: Fri Feb 19 13:54:29 2021 +1000
Merge tag 'drm-intel-next-fixes-2021-02-18' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Which headers go where?
From https://cgit.freedesktop.org/drm/drm/tree/include/uapi/drm/amdgpu_drm.h to
https://cgit.freedesktop.org/mesa/drm/tree/include/drm/amdgpu_drm.h
When and which headers to update?
If the kernel uapi drm header changes, the header here should be sync-ed.
When and how to update these files
The steps for generating this patch:
- Switch to freedesktop drm-next kernel branch (https://cgit.freedesktop.org/drm/drm);
- Install the headers via `make headers_install';
- Copy from kernel "include/uapi/drm/amdgpu_drm.h" to libdrm "include/drm/amdgpu_drm.h";
- generate the patch;
The commits from drm-next (https://cgit.freedesktop.org/drm/drm) are:
Mauro Carvalho Chehab (1)
c45dd3bda1c809eb120452597097e14a96b58c1f drm/amdgpu: fix some kernel-doc markups
Huang Rui(3)
6fbcb00c7984fa7d49af2c361453c0397cdea400 drm/amdgpu: add TOC firmware definition
1e483203965bdab466af0739c1edf7da07da241d drm/amdgpu: add uapi to define van gogh memory type
f7b2cdb23abf62bc3d33c2e0b0009a09412ff475 drm/amdgpu: add uapi to define van gogh series
Pierre-Eric Pelloux-Prayer(1)
16c642ec3fe9a144fbe1e97dc56f13a6308f1381 drm/amdgpu: new ids flag for tmz (v2)
Yong Zhao(1)
130c88931f6cbdb4513d307b4a13fcfff08a8041 drm/amdgpu: Improve the MTYPE comments
Signed-off-by: Leo Liu <leo.liu@amd.com>
From drm-next:
commit c41219fda6e04255c44d37fd2c0d898c1c46abf1
Merge: e20bb857dea2 d96536f0fe69
Author: Dave Airlie <airlied@redhat.com>
Date: Thu May 21 10:44:32 2020 +1000
Merge tag 'drm-intel-next-fixes-2020-05-20' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Fix for TypeC power domain toggling on resets (Cc: stable).
Two compile time warning fixes.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200520123227.GA21104@jlahtine-desk.ger.corp.intel.com
Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
AMDGPU_VRAM_TYPE_GDDR6 is a new vram type for navi10
Reviewed-by: Tim Writer <Tim.Writer@amd.com>
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
pa_sc_tile_steering_override is a new member introduced for gfx10
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Saw a couple of typos fixes in the patch DragonFlyBSD carries [1], so
I ran codespell (a spell checker for code) on the whole repo.
[1] https://github.com/DragonFlyBSD/DPorts/blob/master/graphics/libdrm/files/patch-xf86drm.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
From drm-next commit b4e4538a0ab5079ae5dc401970e11f0ff2ba13a7
Adds support for:
- RAS queries
- context priority updates
- CS chunks support for scheduled dependencies
- IB flag for GDS max wave id
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 2dc7bad71cd310dc94d1c9907909324dd2b0618f
The changes were as follows :-
core: (drm.h, drm_fourcc.h, drm_mode.h)
- Added client capabilities for ASPECT_RATIO and WRITEBACK_CONNECTORS
- Added Arm AFBC modifiers
- Added BROADCOM's SAND and UIF modifiers
- Added Qualcomm's modifiers
- Added some picture aspect ratio and content type options
- Added some drm mode flags
- Added writeback connector id
amdgpu:
- Added GEM domain mask
- Added some GEM flags
- Added some hardware ip flags
- Added chunk id and IB fence.
- Added some query ids
i915:
-Added an IOCTL (I915_PARAM_MMAP_GTT_COHERENT)
qxl:
- Minor changes
tegra:
- Added some comments about struct drm_tegra* members
- Modified DRM_IOCTL_TEGRA_CLOSE_CHANNEL
vc4:
- Added some members for 'struct drm_vc4_submit_cl'
Changes in v2:
- Mentioned 'libdrm' in the commit header.
Changes in v3:
- Removed the changes to radeon_drm.h, sis_drm.h and via_drm.h as suggested by
Emil Velikov <emil.l.velikov@gmail.com>
Changes in v4:
- Removed the changes to vmwgfx_drm.h as it caused a build break ie
'make check' failed.
Change-Id: I018a06f65bf4a6a68400ab252b9cd05d041299b3
Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Taken from the drm-next pull for 4.17-rc1 (694f54f680f7), and manually
reconciled:
core:
- Dropped DRM_MODE_TYPE_ALL and DRM_MODE_FLAG_ALL; these are purely
internal details of the bits accepted by the currently running
kernel, and can not be generally relied on by userspace
- Add HDCP flags
- Note CTM entry representation is sign-magnitude format, not
two's-complement
amdgpu:
- Add QUERY_STATE2 context op
- Add VCN firmware version query
etnaviv:
- Add more GPU feature flags
i915:
- Add caps, params and ioctls for PMU / perf-stream
- Add support for explicit fencing
nouveau:
- Add TILE_COMP layout
vc4:
- Add perfmon ioctls
virtgpu:
- Add capset-fix param
vmware:
- Add handle-close ioctl and explicit-fencing support
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Add sensor_info type
AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK
AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Generated using make headers_install from:
airlied/drm-next 282dc83 Merge tag 'drm-intel-next-2017-10-12' ...
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This syncs the amdgpu_drm header with my drm-next branch as of
6d61e70ccc21606ffb8a0a03bd3aba24f659502b.
It brings over the VM and semaphore API changes.
Generated using make headers_install.
Generated from git://people.freedesktop.org/~airlied/linux drm-next commit 6d61e70ccc2.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Changes include: PRT and preemption flags, sensor info, and some more
changes for Vega10.
Generated using make headers_install from airlied/drm-next commit
320d8c3d38739fa8e31a076b86cbdafcf8897d5e.
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
With this flag specified, VRAM buffer will be cleared at
allocation time.
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
The include type changed from system to own.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alexandr Akulich <akulichalexander@gmail.com>
