amdgpu: Add queue priority and secure flags support for user queues

This patch extends the user queue creation API to support:
1. Queue priority levels (normal low, low, normal high, high)
   - High priority is restricted to admin-only
2. Secure queue flag for protected content access

The changes include:
- Adding a `flags` parameter to `amdgpu_create_userqueue()`
- Defining priority and security flags in `amdgpu_drm.h`
- Updating the `drm_amdgpu_userq_in` struct to replace padding with flags
- Documenting the new flags field

Related driver patches provided by Alex:
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122782.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122780.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122786.html

Cc: Koenig, Christian <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>

Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Jie1zhang 2025-04-11 03:32:12 +00:00 committed by Jesse.zhang@amd.com
parent 43e8a3f86a
commit fdf384d4b5
3 changed files with 18 additions and 1 deletions

View file

@ -2026,6 +2026,7 @@ int amdgpu_create_userqueue(amdgpu_device_handle dev,
uint64_t wptr_va,
uint64_t rptr_va,
void *mqd_in,
uint32_t flags,
uint32_t *queue_id);
/**

View file

@ -37,6 +37,7 @@ amdgpu_create_userqueue(amdgpu_device_handle dev,
uint64_t wptr_va,
uint64_t rptr_va,
void *mqd_in,
uint32_t flags,
uint32_t *queue_id)
{
int ret;
@ -75,6 +76,7 @@ amdgpu_create_userqueue(amdgpu_device_handle dev,
userq.in.mqd = (uint64_t)mqd_in;
userq.in.mqd_size = mqd_size;
userq.in.flags = flags;
ret = drmCommandWriteRead(dev->fd, DRM_AMDGPU_USERQ,
&userq, sizeof(userq));

View file

@ -327,6 +327,16 @@ union drm_amdgpu_ctx {
#define AMDGPU_USERQ_OP_CREATE 1
#define AMDGPU_USERQ_OP_FREE 2
/* queue priority levels */
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
/* for queues that need access to protected content */
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
/*
* This structure is a container to pass input configuration
* info for all supported userqueue related operations.
@ -353,7 +363,11 @@ struct drm_amdgpu_userq_in {
* and doorbell_offset in the doorbell bo.
*/
__u32 doorbell_offset;
__u32 _pad;
/**
* @flags: flags used for queue parameters
*/
__u32 flags;
/**
* @queue_va: Virtual address of the GPU memory which holds the queue
* object. The queue holds the workload packets.