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https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-08 12:48:05 +02:00
Cleanup, parameter tweaks
This commit is contained in:
Keith Whitwell
parent
2753541c30
commit
fadd3ba484
1 changed files with 60 additions and 25 deletions
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@ -54,11 +54,9 @@
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#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
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#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
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#define MGA_MAX_G400_PIPES 16
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#define MGA_MAX_G200_PIPES 8 /* no multitex */
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#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
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#define MGA_CARD_TYPE_G200 1
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@ -87,14 +85,13 @@ typedef struct drm_mga_init {
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int depthOffset;
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int textureOffset;
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int textureSize;
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int agpTextureOffset;
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int agpTextureSize;
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int cpp;
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int stride;
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int sgram;
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int chipset;
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mgaWarpIndex WarpIndex[MGA_MAX_WARP_PIPES];
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/* Redundant?
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*/
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int mAccess;
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} drm_mga_init_t;
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@ -105,12 +102,12 @@ typedef struct _xf86drmClipRectRec {
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unsigned short y2;
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} xf86drmClipRectRec;
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#define MGA_CLEAR_FRONT 0x1
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#define MGA_CLEAR_BACK 0x2
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#define MGA_CLEAR_DEPTH 0x4
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#define MGA_FRONT 0x1
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#define MGA_BACK 0x2
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#define MGA_DEPTH 0x4
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/* Each context has a state:
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/* 3d state excluding texture units:
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*/
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#define MGA_CTXREG_DSTORG 0 /* validated */
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#define MGA_CTXREG_MACCESS 1
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@ -143,8 +140,6 @@ typedef struct _xf86drmClipRectRec {
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#define MGA_TEXREG_HEIGHT 10
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#define MGA_TEX_SETUP_SIZE 11
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/* What needs to be changed for the current vertex dma buffer?
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*/
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#define MGA_UPLOAD_CTX 0x1
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@ -156,8 +151,8 @@ typedef struct _xf86drmClipRectRec {
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#define MGA_UPLOAD_2D 0x40
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#define MGA_WAIT_AGE 0x80 /* handled client-side */
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#define MGA_UPLOAD_CLIPRECTS 0x100
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#define MGA_DMA_FLUSH 0x200
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/* dirty flag when someone gets the lock quiescent */
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#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
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quiescent */
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/* 64 buffers of 16k each, total 1 meg.
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@ -167,14 +162,23 @@ typedef struct _xf86drmClipRectRec {
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#define MGA_DMA_BUF_NR 63
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/* Keep this small for testing
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/* Keep these small for testing.
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*/
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#define MGA_NR_SAREA_CLIPRECTS 2
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#define MGA_NR_SAREA_CLIPRECTS 8
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/* Upto 128 regions. Minimum region size of 256k.
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/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
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* regions, subject to a minimum region size of (1<<16) == 64k.
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*
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* Clients may subdivide regions internally, but when sharing between
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* clients, the region size is the minimum granularity.
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*/
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#define MGA_CARD_HEAP 0
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#define MGA_AGP_HEAP 1
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#define MGA_NR_TEX_HEAPS 2
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#define MGA_NR_TEX_REGIONS 128
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#define MGA_LOG_MIN_TEX_REGION_SIZE 18
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#define MGA_LOG_MIN_TEX_REGION_SIZE 16
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typedef struct {
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unsigned char next, prev;
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@ -182,28 +186,59 @@ typedef struct {
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int age;
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} mgaTexRegion;
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typedef struct
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{
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/* The channel for communication of state information to the kernel
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* on firing a vertex dma buffer.
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*/
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unsigned int ContextState[MGA_CTX_SETUP_SIZE];
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unsigned int ServerState[MGA_2D_SETUP_SIZE];
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unsigned int TexState[2][MGA_TEX_SETUP_SIZE];
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unsigned int WarpPipe;
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unsigned int dirty;
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unsigned int nbox;
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xf86drmClipRectRec boxes[MGA_NR_SAREA_CLIPRECTS];
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/* Information about the most recently used 3d drawable. The
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* client fills in the req_* fields, the server fills in the
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* exported_ fields and puts the cliprects into boxes, above.
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*
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* The client clears the exported_drawable field before
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* clobbering the boxes data.
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*/
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unsigned int req_drawable; /* the X drawable id */
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unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
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unsigned int exported_drawable;
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unsigned int exported_index;
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unsigned int exported_stamp;
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unsigned int exported_buffers;
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unsigned int exported_nfront;
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unsigned int exported_nback;
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int exported_back_x, exported_front_x, exported_w;
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int exported_back_y, exported_front_y, exported_h;
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/* Counters for aging textures and for client-side throttling.
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*/
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int last_enqueue; /* last time a buffer was enqueued */
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int last_dispatch; /* age of the most recently dispatched buffer */
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int last_quiescent; /* */
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/* kernel doesn't touch from here down */
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/* LRU lists for texture memory in agp space and on the card
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*/
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mgaTexRegion texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
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int texAge[MGA_NR_TEX_HEAPS];
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/* Mechanism to validate card state.
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*/
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int ctxOwner;
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mgaTexRegion texList[MGA_NR_TEX_REGIONS+1];
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int texAge;
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} drm_mga_sarea_t;
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@ -238,15 +273,15 @@ typedef struct {
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* the number of a bogus buffer, real_idx is the real buffer to be
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* rendered multiple times.
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*
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* This is a hack to work around the 'generalized gamma driver'
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* known as the drm.
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* This is a hack to work around assumptions built into the drm, and
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* may shortly be removed.
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*/
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typedef struct {
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int idx; /* buffer to queue and free on completion */
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int real_idx; /* buffer to execute */
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int real_used; /* buf->used in for real buffer */
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int age;
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int discard;
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int age;
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int discard;
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} drm_mga_vertex_t;
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