From fadd3ba48426e0fe710b4d5fe08cc1506e99c517 Mon Sep 17 00:00:00 2001
From: Keith Whitwell <keith@tungstengraphics.com>
Date: Tue, 22 Feb 2000 16:05:02 +0000
Subject: [PATCH] Cleanup, parameter tweaks

---
 linux/mga_drm_public.h | 85 +++++++++++++++++++++++++++++-------------
 1 file changed, 60 insertions(+), 25 deletions(-)

diff --git a/linux/mga_drm_public.h b/linux/mga_drm_public.h
index 1c0a4a9e..12545c7a 100644
--- a/linux/mga_drm_public.h
+++ b/linux/mga_drm_public.h
@@ -54,11 +54,9 @@
 #define MGA_WARP_T2GZSA         (MGA_T2|MGA_S|MGA_A)
 #define MGA_WARP_T2GZSAF        (MGA_T2|MGA_S|MGA_F|MGA_A)
 
-
 #define MGA_MAX_G400_PIPES 16
 #define MGA_MAX_G200_PIPES  8	/* no multitex */
 
-
 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
 
 #define MGA_CARD_TYPE_G200 1
@@ -87,14 +85,13 @@ typedef struct drm_mga_init {
    	int depthOffset;
    	int textureOffset;
    	int textureSize;
+        int agpTextureOffset;
+        int agpTextureSize;
    	int cpp;
    	int stride;
    	int sgram;
 	int chipset;
    	mgaWarpIndex WarpIndex[MGA_MAX_WARP_PIPES];
-
-	/* Redundant?
-	 */
 	int mAccess;
 } drm_mga_init_t;
 
@@ -105,12 +102,12 @@ typedef struct _xf86drmClipRectRec {
    	unsigned short y2;
 } xf86drmClipRectRec;
 
-#define MGA_CLEAR_FRONT 0x1
-#define MGA_CLEAR_BACK  0x2
-#define MGA_CLEAR_DEPTH 0x4
+#define MGA_FRONT   0x1
+#define MGA_BACK    0x2
+#define MGA_DEPTH   0x4
 
 
-/* Each context has a state:
+/* 3d state excluding texture units:
  */
 #define MGA_CTXREG_DSTORG   0	/* validated */
 #define MGA_CTXREG_MACCESS  1	
@@ -143,8 +140,6 @@ typedef struct _xf86drmClipRectRec {
 #define MGA_TEXREG_HEIGHT     10
 #define MGA_TEX_SETUP_SIZE    11
 
-
-
 /* What needs to be changed for the current vertex dma buffer?
  */
 #define MGA_UPLOAD_CTX        0x1
@@ -156,8 +151,8 @@ typedef struct _xf86drmClipRectRec {
 #define MGA_UPLOAD_2D 	      0x40
 #define MGA_WAIT_AGE          0x80 /* handled client-side */
 #define MGA_UPLOAD_CLIPRECTS  0x100
-#define MGA_DMA_FLUSH	      0x200 
-/* dirty flag when someone gets the lock quiescent */
+#define MGA_DMA_FLUSH	      0x200 /* set when someone gets the lock
+                                       quiescent */
 
 
 /* 64 buffers of 16k each, total 1 meg.
@@ -167,14 +162,23 @@ typedef struct _xf86drmClipRectRec {
 #define MGA_DMA_BUF_NR        63
 
 
-/* Keep this small for testing
+/* Keep these small for testing.
  */
-#define MGA_NR_SAREA_CLIPRECTS 2
+#define MGA_NR_SAREA_CLIPRECTS 8
 
-/* Upto 128 regions.  Minimum region size of 256k.
+
+
+/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
+ * regions, subject to a minimum region size of (1<<16) == 64k. 
+ *
+ * Clients may subdivide regions internally, but when sharing between
+ * clients, the region size is the minimum granularity. 
  */
+#define MGA_CARD_HEAP 0
+#define MGA_AGP_HEAP  1
+#define MGA_NR_TEX_HEAPS 2
 #define MGA_NR_TEX_REGIONS 128
-#define MGA_LOG_MIN_TEX_REGION_SIZE 18
+#define MGA_LOG_MIN_TEX_REGION_SIZE 16
 
 typedef struct {
 	unsigned char next, prev;	
@@ -182,28 +186,59 @@ typedef struct {
 	int age;			
 } mgaTexRegion;
 
+
+
 typedef struct 
 {
+	/* The channel for communication of state information to the kernel
+	 * on firing a vertex dma buffer.
+	 */
    	unsigned int ContextState[MGA_CTX_SETUP_SIZE];
    	unsigned int ServerState[MGA_2D_SETUP_SIZE];
    	unsigned int TexState[2][MGA_TEX_SETUP_SIZE];
-
    	unsigned int WarpPipe;
    	unsigned int dirty;
 
+   
    	unsigned int nbox;
    	xf86drmClipRectRec boxes[MGA_NR_SAREA_CLIPRECTS];
 
+
+	/* Information about the most recently used 3d drawable.  The
+	 * client fills in the req_* fields, the server fills in the 
+	 * exported_ fields and puts the cliprects into boxes, above.
+	 *
+	 * The client clears the exported_drawable field before
+	 * clobbering the boxes data.
+	 */
+        unsigned int req_drawable;	 /* the X drawable id */
+	unsigned int req_draw_buffer;	 /* MGA_FRONT or MGA_BACK */
+
+        unsigned int exported_drawable;	 
+	unsigned int exported_index; 
+        unsigned int exported_stamp;	
+        unsigned int exported_buffers;	 
+        unsigned int exported_nfront;
+        unsigned int exported_nback;
+	int exported_back_x, exported_front_x, exported_w;	
+	int exported_back_y, exported_front_y, exported_h;
    
+	/* Counters for aging textures and for client-side throttling.
+	 */
         int last_enqueue;	/* last time a buffer was enqueued */
 	int last_dispatch;	/* age of the most recently dispatched buffer */
 	int last_quiescent;     /*  */
 
 
-	/* kernel doesn't touch from here down */
+	/* LRU lists for texture memory in agp space and on the card
+	 */
+	mgaTexRegion texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];	
+	int texAge[MGA_NR_TEX_HEAPS];	      
+	
+	/* Mechanism to validate card state.
+	 */
    	int ctxOwner;		
-	mgaTexRegion texList[MGA_NR_TEX_REGIONS+1];
-	int texAge;	      
+
 } drm_mga_sarea_t;	
 
 
@@ -238,15 +273,15 @@ typedef struct {
  * the number of a bogus buffer, real_idx is the real buffer to be
  * rendered multiple times.  
  *
- * This is a hack to work around the 'generalized gamma driver' 
- * known as the drm.  
+ * This is a hack to work around assumptions built into the drm, and
+ * may shortly be removed.
  */
 typedef struct {
    	int idx;		/* buffer to queue and free on completion */
    	int real_idx;		/* buffer to execute */
 	int real_used;		/* buf->used in for real buffer */
-   int age;
-   int discard;
+	int age;
+	int discard;
 } drm_mga_vertex_t;