mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-25 13:00:20 +01:00
Fixed up I810 driver for Keith
This commit is contained in:
parent
3e69b2967e
commit
5cd0a096d8
9 changed files with 439 additions and 754 deletions
|
|
@ -36,129 +36,57 @@
|
|||
|
||||
#include <linux/interrupt.h> /* For task queue support */
|
||||
|
||||
#define I810_REG(reg) 0 /* for now */
|
||||
#define I810_REG(reg) 2
|
||||
#define I810_BASE(reg) ((unsigned long) \
|
||||
dev->maplist[I810_REG(reg)]->handle)
|
||||
#define I810_ADDR(reg) (I810_BASE(reg) + I810_OFF(reg))
|
||||
#define I810_ADDR(reg) (I810_BASE(reg) + reg)
|
||||
#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
|
||||
#define I810_READ(reg) I810_DEREF(reg)
|
||||
#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
|
||||
|
||||
typedef _i810_primary_buffer {
|
||||
u32 *head;
|
||||
u32 *dma_ptr;
|
||||
u8 tempIndex[4];
|
||||
int outcount;
|
||||
int num_dwords;
|
||||
int max_dwords;
|
||||
unsigned long phys_head;
|
||||
} i810PrimBuf;
|
||||
void i810_dma_init(drm_device_t *dev)
|
||||
{
|
||||
printk(KERN_INFO "i810_dma_init\n");
|
||||
}
|
||||
|
||||
static i810PrimBuf buffer;
|
||||
typedef enum {
|
||||
TT_GENERAL,
|
||||
TT_BLIT,
|
||||
TT_VECTOR,
|
||||
TT_VERTEX
|
||||
} transferType_t;
|
||||
|
||||
#define DWGREG0 0x1c00
|
||||
#define DWGREG0_END 0x1dff
|
||||
|
||||
#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END)
|
||||
#define ADRINDEX0(r) (u8)((r - DWGREG0) >> 2)
|
||||
#define ADRINDEX1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
|
||||
#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
|
||||
|
||||
#define DMAOUTREG(reg, val) do { \
|
||||
buffer.tempIndex[buffer.outcount]=ADRINDEX(reg); \
|
||||
buffer.dma_ptr[1+buffer.outcount] = val; \
|
||||
if( ++buffer.outcount == 4) { \
|
||||
buffer.outcount = 0; \
|
||||
buffer.dma_ptr[0] = *(u32 *)tempIndex; \
|
||||
buffer.dma_ptr+=5; \
|
||||
buffer.num_dwords += 5; \
|
||||
} \
|
||||
}while (0)
|
||||
|
||||
#define CHECK_OVERFLOW(length) do { \
|
||||
if((buffer.max_dwords - buffer.num_dwords) < length) { \
|
||||
i810_prim_overflow(); \
|
||||
} \
|
||||
}while(0)
|
||||
|
||||
#define PDEA_pagpxfer_enable 0x2
|
||||
void i810_dma_cleanup(drm_device_t *dev)
|
||||
{
|
||||
printk(KERN_INFO "i810_dma_cleanup\n");
|
||||
}
|
||||
|
||||
static inline void i810_dma_dispatch(drm_device_t *dev, unsigned long address,
|
||||
unsigned long length)
|
||||
unsigned long length)
|
||||
{
|
||||
transferType_t transferType = TT_GENERAL;
|
||||
int use_agp = PDEA_pagpxfer_enable;
|
||||
|
||||
CHECK_OVERFLOW(10);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_SECADDRESS, address | transferType);
|
||||
DMAOUTREG(I810REG_SECEND, (address + length) | use_agp);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_DWGSYNC, 0);
|
||||
DMAOUTREG(I810REG_SOFTRAP, 0);
|
||||
/* Needs to write out to PRIMEND */
|
||||
printk(KERN_INFO "i810_dma_dispatch\n");
|
||||
}
|
||||
|
||||
static inline void i810_dma_quiescent(drm_device_t *dev)
|
||||
{
|
||||
#if 0
|
||||
while (GAMMA_READ(GAMMA_DMACOUNT))
|
||||
;
|
||||
while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3)
|
||||
;
|
||||
GAMMA_WRITE(GAMMA_BROADCASTMASK, 3);
|
||||
GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10);
|
||||
GAMMA_WRITE(GAMMA_SYNC, 0);
|
||||
|
||||
/* Read from first MX */
|
||||
do {
|
||||
while (!GAMMA_READ(GAMMA_OUTFIFOWORDS))
|
||||
;
|
||||
} while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG);
|
||||
|
||||
|
||||
/* Read from second MX */
|
||||
do {
|
||||
while (!GAMMA_READ(GAMMA_OUTFIFOWORDS + 0x10000))
|
||||
;
|
||||
} while (GAMMA_READ(GAMMA_OUTPUTFIFO + 0x10000) != GAMMA_SYNC_TAG);
|
||||
#endif
|
||||
printk(KERN_INFO "i810_dma_quiescent\n");
|
||||
}
|
||||
|
||||
static inline void i810_dma_ready(drm_device_t *dev)
|
||||
{
|
||||
#if 0
|
||||
while (GAMMA_READ(GAMMA_DMACOUNT))
|
||||
;
|
||||
#endif
|
||||
i810_dma_quiescent(dev);
|
||||
printk(KERN_INFO "i810_dma_ready\n");
|
||||
}
|
||||
|
||||
static inline int i810_dma_is_ready(drm_device_t *dev)
|
||||
{
|
||||
#if 0
|
||||
return !GAMMA_READ(GAMMA_DMACOUNT);
|
||||
#endif
|
||||
|
||||
i810_dma_quiescent(dev);
|
||||
|
||||
printk(KERN_INFO "i810_dma_is_ready\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
static void i810_dma_service(int irq, void *device, struct pt_regs *regs)
|
||||
{
|
||||
#if 0
|
||||
drm_device_t *dev = (drm_device_t *)device;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
|
||||
atomic_inc(&dev->total_irq);
|
||||
GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */
|
||||
GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8);
|
||||
GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001);
|
||||
if (i810_dma_is_ready(dev)) {
|
||||
/* Free previous buffer */
|
||||
if (test_and_set_bit(0, &dev->dma_flag)) {
|
||||
|
|
@ -175,7 +103,6 @@ static void i810_dma_service(int irq, void *device, struct pt_regs *regs)
|
|||
queue_task(&dev->tq, &tq_immediate);
|
||||
mark_bh(IMMEDIATE_BH);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Only called by i810_dma_schedule. */
|
||||
|
|
@ -206,8 +133,9 @@ static int i810_do_dma(drm_device_t *dev, int locked)
|
|||
}
|
||||
|
||||
buf = dma->next_buffer;
|
||||
address = (unsigned long)buf->address;
|
||||
address = (unsigned long)buf->bus_address;
|
||||
length = buf->used;
|
||||
|
||||
|
||||
DRM_DEBUG("context %d, buffer %d (%ld bytes)\n",
|
||||
buf->context, buf->idx, length);
|
||||
|
|
@ -310,7 +238,6 @@ static void i810_dma_schedule_tq_wrapper(void *dev)
|
|||
|
||||
int i810_dma_schedule(drm_device_t *dev, int locked)
|
||||
{
|
||||
#if 0
|
||||
int next;
|
||||
drm_queue_t *q;
|
||||
drm_buf_t *buf;
|
||||
|
|
@ -391,7 +318,6 @@ again:
|
|||
- schedule_start)]);
|
||||
#endif
|
||||
return retcode;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int i810_dma_priority(drm_device_t *dev, drm_dma_t *d)
|
||||
|
|
@ -507,6 +433,11 @@ static int i810_dma_priority(drm_device_t *dev, drm_dma_t *d)
|
|||
buf->time_dispatched = buf->time_queued;
|
||||
#endif
|
||||
i810_dma_dispatch(dev, address, length);
|
||||
if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
|
||||
DRM_KERNEL_CONTEXT)) {
|
||||
DRM_ERROR("\n");
|
||||
}
|
||||
|
||||
atomic_add(length, &dma->total_bytes);
|
||||
atomic_inc(&dma->total_dmas);
|
||||
|
||||
|
|
@ -599,7 +530,8 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
int retcode = 0;
|
||||
drm_dma_t d;
|
||||
|
||||
copy_from_user_ret(&d, (drm_dma_t *)arg, sizeof(d), -EFAULT);
|
||||
printk("i810_dma start\n");
|
||||
copy_from_user_ret(&d, (drm_dma_t *)arg, sizeof(d), -EFAULT);
|
||||
DRM_DEBUG("%d %d: %d send, %d req\n",
|
||||
current->pid, d.context, d.send_count, d.request_count);
|
||||
|
||||
|
|
@ -608,6 +540,7 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
current->pid, d.context);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (d.send_count < 0 || d.send_count > dma->buf_count) {
|
||||
DRM_ERROR("Process %d trying to send %d buffers (of %d max)\n",
|
||||
current->pid, d.send_count, dma->buf_count);
|
||||
|
|
@ -620,10 +553,15 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
}
|
||||
|
||||
if (d.send_count) {
|
||||
#if 0
|
||||
if (d.flags & _DRM_DMA_PRIORITY)
|
||||
retcode = i810_dma_priority(dev, &d);
|
||||
else
|
||||
retcode = i810_dma_send_buffers(dev, &d);
|
||||
#endif
|
||||
printk("i810_dma priority\n");
|
||||
|
||||
retcode = i810_dma_priority(dev, &d);
|
||||
}
|
||||
|
||||
d.granted_count = 0;
|
||||
|
|
@ -636,6 +574,7 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
current->pid, d.granted_count);
|
||||
copy_to_user_ret((drm_dma_t *)arg, &d, sizeof(d), -EFAULT);
|
||||
|
||||
printk("i810_dma end (granted)\n");
|
||||
return retcode;
|
||||
}
|
||||
|
||||
|
|
@ -670,8 +609,7 @@ int i810_irq_install(drm_device_t *dev, int irq)
|
|||
|
||||
|
||||
/* Before installing handler */
|
||||
I810_WRITE(I810REG_IEN, 0);
|
||||
|
||||
/* TODO */
|
||||
/* Install handler */
|
||||
if ((retcode = request_irq(dev->irq,
|
||||
i810_dma_service,
|
||||
|
|
@ -685,7 +623,7 @@ int i810_irq_install(drm_device_t *dev, int irq)
|
|||
}
|
||||
|
||||
/* After installing handler */
|
||||
I810_WRITE(I810REG_IEN, 0x00000001);
|
||||
/* TODO */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -702,8 +640,8 @@ int i810_irq_uninstall(drm_device_t *dev)
|
|||
|
||||
DRM_DEBUG("%d\n", irq);
|
||||
|
||||
I810_WRITE(I810REG_IEN, 0);
|
||||
free_irq(irq, dev);
|
||||
/* TODO : Disable interrupts */
|
||||
free_irq(irq, dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -716,7 +654,10 @@ int i810_control(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
drm_device_t *dev = priv->dev;
|
||||
drm_control_t ctl;
|
||||
int retcode;
|
||||
|
||||
|
||||
printk(KERN_INFO "i810_control\n");
|
||||
i810_dma_init(dev);
|
||||
|
||||
copy_from_user_ret(&ctl, (drm_control_t *)arg, sizeof(ctl), -EFAULT);
|
||||
|
||||
switch (ctl.func) {
|
||||
|
|
@ -757,12 +698,17 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
printk("i810_lock\n");
|
||||
printk("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
|
||||
if (lock.context < 0 || lock.context >= dev->queue_count)
|
||||
if (lock.context < 0 || lock.context >= dev->queue_count) {
|
||||
printk("lock.context = %d, dev->queue_count = %d", lock.context,
|
||||
dev->queue_count);
|
||||
printk("return lock.context\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
q = dev->queuelist[lock.context];
|
||||
|
||||
ret = drm_flush_block_and_flush(dev, lock.context, lock.flags);
|
||||
|
|
@ -776,6 +722,7 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
/* Can't take lock if we just had it and
|
||||
there is contention. */
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
printk("schedule_timeout\n");
|
||||
schedule_timeout(j);
|
||||
}
|
||||
}
|
||||
|
|
@ -792,12 +739,14 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
dev->lock.lock_time = jiffies;
|
||||
atomic_inc(&dev->total_locks);
|
||||
atomic_inc(&q->total_locks);
|
||||
printk("Got lock\n");
|
||||
break; /* Got lock */
|
||||
}
|
||||
|
||||
/* Contention */
|
||||
atomic_inc(&dev->total_sleeps);
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
printk("Contention\n");
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -ERESTARTSYS;
|
||||
|
|
@ -816,7 +765,7 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
if (lock.flags & _DRM_LOCK_QUIESCENT)
|
||||
i810_dma_quiescent(dev);
|
||||
}
|
||||
DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
printk("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* i810_drv.c -- i810 driver -*- linux-c -*-
|
||||
/* i810_drv.c -- I810 driver -*- linux-c -*-
|
||||
* Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
|
||||
*
|
||||
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
|
||||
|
|
@ -37,7 +37,7 @@ EXPORT_SYMBOL(i810_init);
|
|||
EXPORT_SYMBOL(i810_cleanup);
|
||||
|
||||
#define I810_NAME "i810"
|
||||
#define I810_DESC "Intel i810"
|
||||
#define I810_DESC "Matrox g200/g400"
|
||||
#define I810_DATE "19991213"
|
||||
#define I810_MAJOR 0
|
||||
#define I810_MINOR 0
|
||||
|
|
@ -63,52 +63,47 @@ static struct miscdevice i810_misc = {
|
|||
};
|
||||
|
||||
static drm_ioctl_desc_t i810_ioctls[] = {
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { i810_version, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { i810_version, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { i810_control, 1, 1 },
|
||||
#endif
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { i810_control, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { i810_addbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { i810_markbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { i810_infobufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { i810_mapbufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { i810_freebufs, 1, 0 },
|
||||
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { i810_addbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { i810_markbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { i810_infobufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { i810_mapbufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { i810_freebufs, 1, 0 },
|
||||
#endif
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { drm_addctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { drm_rmctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { drm_modctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { drm_getctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { drm_switchctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { drm_newctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { drm_resctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { i810_addctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { i810_rmctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { i810_modctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { i810_getctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { i810_switchctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { i810_newctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { i810_resctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { i810_dma, 1, 0 },
|
||||
#endif
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { i810_lock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { i810_unlock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { i810_dma, 1, 0 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = {drm_agp_acquire, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = {drm_agp_release, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = {drm_agp_enable, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = {drm_agp_info, 1, 0},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = {drm_agp_alloc, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = {drm_agp_free, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = {drm_agp_unbind, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = {drm_agp_bind, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { i810_lock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { i810_unlock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
|
||||
};
|
||||
|
||||
#define I810_IOCTL_COUNT DRM_ARRAY_SIZE(i810_ioctls)
|
||||
|
|
@ -119,13 +114,14 @@ void cleanup_module(void);
|
|||
static char *i810 = NULL;
|
||||
|
||||
MODULE_AUTHOR("Precision Insight, Inc., Cedar Park, Texas.");
|
||||
MODULE_DESCRIPTION("Matrox g200/g400");
|
||||
MODULE_DESCRIPTION("Intel I810");
|
||||
MODULE_PARM(i810, "s");
|
||||
|
||||
/* init_module is called when insmod is used to load the module */
|
||||
|
||||
int init_module(void)
|
||||
{
|
||||
printk("doing i810_init()\n");
|
||||
return i810_init();
|
||||
}
|
||||
|
||||
|
|
@ -233,7 +229,7 @@ static int i810_takedown(drm_device_t *dev)
|
|||
|
||||
DRM_DEBUG("\n");
|
||||
|
||||
/* if (dev->irq) i810_irq_uninstall(dev); */
|
||||
if (dev->irq) i810_irq_uninstall(dev);
|
||||
|
||||
down(&dev->struct_sem);
|
||||
del_timer(&dev->timer);
|
||||
|
|
@ -258,19 +254,24 @@ static int i810_takedown(drm_device_t *dev)
|
|||
}
|
||||
/* Clear AGP information */
|
||||
if (dev->agp) {
|
||||
drm_agp_mem_t *temp;
|
||||
drm_agp_mem_t *temp_next;
|
||||
|
||||
temp = dev->agp->memory;
|
||||
while(temp != NULL) {
|
||||
temp_next = temp->next;
|
||||
drm_free_agp(temp->memory, temp->pages);
|
||||
drm_free(temp, sizeof(*temp), DRM_MEM_AGPLISTS);
|
||||
temp = temp_next;
|
||||
drm_agp_mem_t *entry;
|
||||
drm_agp_mem_t *nexte;
|
||||
|
||||
/* Remove AGP resources, but leave dev->agp
|
||||
intact until r128_cleanup is called. */
|
||||
for (entry = dev->agp->memory; entry; entry = nexte) {
|
||||
nexte = entry->next;
|
||||
if (entry->bound) drm_unbind_agp(entry->memory);
|
||||
drm_free_agp(entry->memory, entry->pages);
|
||||
drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
|
||||
}
|
||||
if(dev->agp->acquired) (*drm_agp.release)();
|
||||
drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
|
||||
dev->agp = NULL;
|
||||
dev->agp->memory = NULL;
|
||||
|
||||
if (dev->agp->acquired && drm_agp.release)
|
||||
(*drm_agp.release)();
|
||||
|
||||
dev->agp->acquired = 0;
|
||||
dev->agp->enabled = 0;
|
||||
}
|
||||
/* Clear vma list (only built for debugging) */
|
||||
if (dev->vmalist) {
|
||||
|
|
@ -363,7 +364,7 @@ int i810_init(void)
|
|||
#ifdef MODULE
|
||||
drm_parse_options(i810);
|
||||
#endif
|
||||
|
||||
printk("doing misc_register\n");
|
||||
if ((retcode = misc_register(&i810_misc))) {
|
||||
DRM_ERROR("Cannot register \"%s\"\n", I810_NAME);
|
||||
return retcode;
|
||||
|
|
@ -371,9 +372,13 @@ int i810_init(void)
|
|||
dev->device = MKDEV(MISC_MAJOR, i810_misc.minor);
|
||||
dev->name = I810_NAME;
|
||||
|
||||
printk("doing mem init\n");
|
||||
drm_mem_init();
|
||||
printk("doing proc init\n");
|
||||
drm_proc_init(dev);
|
||||
printk("doing agp init\n");
|
||||
dev->agp = drm_agp_init();
|
||||
printk("doing ctxbitmap init\n");
|
||||
if((retcode = drm_ctxbitmap_init(dev))) {
|
||||
DRM_ERROR("Cannot allocate memory for context bitmap.\n");
|
||||
drm_proc_cleanup();
|
||||
|
|
@ -381,6 +386,10 @@ int i810_init(void)
|
|||
i810_takedown(dev);
|
||||
return retcode;
|
||||
}
|
||||
#if 0
|
||||
printk("doing i810_dma_init\n");
|
||||
i810_dma_init(dev);
|
||||
#endif
|
||||
|
||||
DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
|
||||
I810_NAME,
|
||||
|
|
@ -408,7 +417,12 @@ void i810_cleanup(void)
|
|||
DRM_INFO("Module unloaded\n");
|
||||
}
|
||||
drm_ctxbitmap_cleanup(dev);
|
||||
i810_dma_cleanup(dev);
|
||||
i810_takedown(dev);
|
||||
if (dev->agp) {
|
||||
drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
|
||||
dev->agp = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
int i810_version(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
|
|
@ -531,86 +545,6 @@ int i810_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
return retcode;
|
||||
}
|
||||
|
||||
int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
DECLARE_WAITQUEUE(entry, current);
|
||||
int ret = 0;
|
||||
drm_lock_t lock;
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
cycles_t start;
|
||||
|
||||
dev->lck_start = start = get_cycles();
|
||||
#endif
|
||||
|
||||
copy_from_user_ret(&lock, (drm_lock_t *)arg, sizeof(lock), -EFAULT);
|
||||
|
||||
if (lock.context == DRM_KERNEL_CONTEXT) {
|
||||
DRM_ERROR("Process %d using kernel context %d\n",
|
||||
current->pid, lock.context);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
|
||||
if (!ret) {
|
||||
add_wait_queue(&dev->lock.lock_queue, &entry);
|
||||
for (;;) {
|
||||
if (!dev->lock.hw_lock) {
|
||||
/* Device has been unregistered */
|
||||
ret = -EINTR;
|
||||
break;
|
||||
}
|
||||
if (drm_lock_take(&dev->lock.hw_lock->lock,
|
||||
lock.context)) {
|
||||
dev->lock.pid = current->pid;
|
||||
dev->lock.lock_time = jiffies;
|
||||
atomic_inc(&dev->total_locks);
|
||||
break; /* Got lock */
|
||||
}
|
||||
|
||||
/* Contention */
|
||||
atomic_inc(&dev->total_sleeps);
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
current->policy |= SCHED_YIELD;
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -ERESTARTSYS;
|
||||
break;
|
||||
}
|
||||
}
|
||||
current->state = TASK_RUNNING;
|
||||
remove_wait_queue(&dev->lock.lock_queue, &entry);
|
||||
}
|
||||
|
||||
if (!ret) {
|
||||
if (lock.flags & _DRM_LOCK_READY) {
|
||||
/* Wait for space in DMA/FIFO */
|
||||
}
|
||||
if (lock.flags & _DRM_LOCK_QUIESCENT) {
|
||||
/* Make hardware quiescent */
|
||||
}
|
||||
}
|
||||
|
||||
if (lock.context != i810_res_ctx.handle) {
|
||||
current->counter = 5;
|
||||
current->priority = DEF_PRIORITY/4;
|
||||
}
|
||||
|
||||
DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
int i810_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
|
|
@ -633,7 +567,7 @@ int i810_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
|
||||
atomic_inc(&dev->total_contends);
|
||||
drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
|
||||
/* i810_dma_schedule(dev, 1); */
|
||||
i810_dma_schedule(dev, 1);
|
||||
if (!dev->context_flag) {
|
||||
if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
|
||||
DRM_KERNEL_CONTEXT)) {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* i810_drv.h -- Private header for the i810 -*- linux-c -*-
|
||||
/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
|
||||
* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
|
||||
*
|
||||
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
|
||||
|
|
@ -41,8 +41,6 @@ extern int i810_open(struct inode *inode, struct file *filp);
|
|||
extern int i810_release(struct inode *inode, struct file *filp);
|
||||
extern int i810_ioctl(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_lock(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_unlock(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
|
||||
|
|
@ -54,6 +52,11 @@ extern int i810_irq_install(drm_device_t *dev, int irq);
|
|||
extern int i810_irq_uninstall(drm_device_t *dev);
|
||||
extern int i810_control(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_lock(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern void i810_dma_init(drm_device_t *dev);
|
||||
extern void i810_dma_cleanup(drm_device_t *dev);
|
||||
|
||||
|
||||
/* i810_bufs.c */
|
||||
extern int i810_addbufs(struct inode *inode, struct file *filp,
|
||||
|
|
@ -66,25 +69,8 @@ extern int i810_freebufs(struct inode *inode, struct file *filp,
|
|||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_mapbufs(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
|
||||
/* i810_context.c */
|
||||
extern int i810_resctx(struct inode *inode, struct file *filp,
|
||||
extern int i810_addmap(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_addctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_modctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_getctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_switchctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_newctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_rmctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
|
||||
extern int i810_context_switch(drm_device_t *dev, int old, int new);
|
||||
extern int i810_context_switch_complete(drm_device_t *dev, int new);
|
||||
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ MGAHEADERS= mga_drv.h $(DRMHEADERS)
|
|||
R128OBJS= r128_drv.o r128_context.o
|
||||
R128HEADERS= r128_drv.h $(DRMHEADERS)
|
||||
|
||||
I810OBJS= i810_drv.o i810_context.o
|
||||
I810OBJS= i810_drv.o i810_dma.o i810_bufs.o
|
||||
I810HEADERS= i810_drv.h $(DRMHEADERS)
|
||||
|
||||
PROGOBJS= drmstat.po xf86drm.po xf86drmHash.po xf86drmRandom.po sigio.po
|
||||
|
|
|
|||
|
|
@ -34,10 +34,134 @@
|
|||
#include "drmP.h"
|
||||
#include "linux/un.h"
|
||||
|
||||
int i810_addbufs(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
int i810_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_buf_desc_t request;
|
||||
drm_buf_entry_t *entry;
|
||||
drm_buf_t *buf;
|
||||
unsigned long offset;
|
||||
unsigned long agp_offset;
|
||||
int count;
|
||||
int order;
|
||||
int size;
|
||||
int alignment;
|
||||
int page_order;
|
||||
int total;
|
||||
int byte_count;
|
||||
int i;
|
||||
|
||||
if (!dma) return -EINVAL;
|
||||
|
||||
copy_from_user_ret(&request,
|
||||
(drm_buf_desc_t *)arg,
|
||||
sizeof(request),
|
||||
-EFAULT);
|
||||
|
||||
count = request.count;
|
||||
order = drm_order(request.size);
|
||||
size = 1 << order;
|
||||
agp_offset = request.agp_start;
|
||||
alignment = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size) :size;
|
||||
page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
|
||||
total = PAGE_SIZE << page_order;
|
||||
byte_count = 0;
|
||||
|
||||
if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) return -EINVAL;
|
||||
if (dev->queue_count) return -EBUSY; /* Not while in use */
|
||||
spin_lock(&dev->count_lock);
|
||||
if (dev->buf_use) {
|
||||
spin_unlock(&dev->count_lock);
|
||||
return -EBUSY;
|
||||
}
|
||||
atomic_inc(&dev->buf_alloc);
|
||||
spin_unlock(&dev->count_lock);
|
||||
|
||||
down(&dev->struct_sem);
|
||||
entry = &dma->bufs[order];
|
||||
if (entry->buf_count) {
|
||||
up(&dev->struct_sem);
|
||||
atomic_dec(&dev->buf_alloc);
|
||||
return -ENOMEM; /* May only call once for each order */
|
||||
}
|
||||
|
||||
entry->buflist = drm_alloc(count * sizeof(*entry->buflist),
|
||||
DRM_MEM_BUFS);
|
||||
if (!entry->buflist) {
|
||||
up(&dev->struct_sem);
|
||||
atomic_dec(&dev->buf_alloc);
|
||||
return -ENOMEM;
|
||||
}
|
||||
memset(entry->buflist, 0, count * sizeof(*entry->buflist));
|
||||
|
||||
entry->buf_size = size;
|
||||
entry->page_order = page_order;
|
||||
|
||||
while(entry->buf_count < count) {
|
||||
for(offset = 0; offset + size <= total && entry->buf_count < count;
|
||||
offset += alignment, ++entry->buf_count) {
|
||||
buf = &entry->buflist[entry->buf_count];
|
||||
buf->idx = dma->buf_count + entry->buf_count;
|
||||
buf->total = alignment;
|
||||
buf->order = order;
|
||||
buf->used = 0;
|
||||
buf->offset = agp_offset - dev->agp->base + offset;/* ?? */
|
||||
buf->bus_address = agp_offset + offset;
|
||||
buf->address = agp_offset + offset + dev->agp->base;
|
||||
buf->next = NULL;
|
||||
buf->waiting = 0;
|
||||
buf->pending = 0;
|
||||
init_waitqueue_head(&buf->dma_wait);
|
||||
buf->pid = 0;
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
buf->time_queued = 0;
|
||||
buf->time_dispatched = 0;
|
||||
buf->time_completed = 0;
|
||||
buf->time_freed = 0;
|
||||
#endif
|
||||
DRM_DEBUG("buffer %d @ %p\n",
|
||||
entry->buf_count, buf->address);
|
||||
}
|
||||
byte_count += PAGE_SIZE << page_order;
|
||||
}
|
||||
|
||||
dma->buflist = drm_realloc(dma->buflist,
|
||||
dma->buf_count * sizeof(*dma->buflist),
|
||||
(dma->buf_count + entry->buf_count)
|
||||
* sizeof(*dma->buflist),
|
||||
DRM_MEM_BUFS);
|
||||
for (i = dma->buf_count; i < dma->buf_count + entry->buf_count; i++)
|
||||
dma->buflist[i] = &entry->buflist[i - dma->buf_count];
|
||||
|
||||
dma->buf_count += entry->buf_count;
|
||||
dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order);
|
||||
|
||||
drm_freelist_create(&entry->freelist, entry->buf_count);
|
||||
for (i = 0; i < entry->buf_count; i++) {
|
||||
drm_freelist_put(dev, &entry->freelist, &entry->buflist[i]);
|
||||
}
|
||||
|
||||
up(&dev->struct_sem);
|
||||
|
||||
request.count = entry->buf_count;
|
||||
request.size = size;
|
||||
|
||||
copy_to_user_ret((drm_buf_desc_t *)arg,
|
||||
&request,
|
||||
sizeof(request),
|
||||
-EFAULT);
|
||||
|
||||
atomic_dec(&dev->buf_alloc);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i810_addbufs_pci(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_buf_desc_t request;
|
||||
|
|
@ -195,6 +319,22 @@ int i810_addbufs(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
return 0;
|
||||
}
|
||||
|
||||
int i810_addbufs(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_buf_desc_t request;
|
||||
|
||||
copy_from_user_ret(&request,
|
||||
(drm_buf_desc_t *)arg,
|
||||
sizeof(request),
|
||||
-EFAULT);
|
||||
|
||||
if(request.flags & _DRM_AGP_BUFFER)
|
||||
return i810_addbufs_agp(inode, filp, cmd, arg);
|
||||
else
|
||||
return i810_addbufs_pci(inode, filp, cmd, arg);
|
||||
}
|
||||
|
||||
int i810_infobufs(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
|
|
@ -377,8 +517,25 @@ int i810_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
-EFAULT);
|
||||
|
||||
if (request.count >= dma->buf_count) {
|
||||
virtual = do_mmap(filp, 0, dma->byte_count,
|
||||
PROT_READ|PROT_WRITE, MAP_SHARED, 0);
|
||||
if(dma->flags & _DRM_DMA_USE_AGP) {
|
||||
/* This is an ugly vicious hack */
|
||||
drm_map_t *map = NULL;
|
||||
for(i = 0; i < dev->map_count; i++) {
|
||||
map = dev->maplist[i];
|
||||
if(map->type == _DRM_AGP) break;
|
||||
}
|
||||
if (i >= dev->map_count || !map) {
|
||||
retcode = -EINVAL;
|
||||
goto done;
|
||||
}
|
||||
|
||||
virtual = do_mmap(filp, 0, map->size, PROT_READ|PROT_WRITE,
|
||||
MAP_SHARED, (unsigned long)map->handle);
|
||||
}
|
||||
else {
|
||||
virtual = do_mmap(filp, 0, dma->byte_count,
|
||||
PROT_READ|PROT_WRITE, MAP_SHARED, 0);
|
||||
}
|
||||
if (virtual > -1024UL) {
|
||||
/* Real error */
|
||||
retcode = (signed long)virtual;
|
||||
|
|
|
|||
|
|
@ -1,210 +0,0 @@
|
|||
/* i810_context.c -- IOCTLs for i810 contexts -*- linux-c -*-
|
||||
* Created: Thu Jan 6 01:42:46 2000 by jhartmann@precisioninsight.com
|
||||
*
|
||||
* Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com>
|
||||
* Jeff Hartmann <jhartmann@precisioninsight.com>
|
||||
*
|
||||
* $XFree86$
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/sched.h>
|
||||
|
||||
#define __NO_VERSION__
|
||||
#include "drmP.h"
|
||||
#include "i810_drv.h"
|
||||
|
||||
extern drm_ctx_t i810_res_ctx;
|
||||
|
||||
static int i810_alloc_queue(drm_device_t *dev)
|
||||
{
|
||||
return drm_ctxbitmap_next(dev);
|
||||
}
|
||||
|
||||
int i810_context_switch(drm_device_t *dev, int old, int new)
|
||||
{
|
||||
char buf[64];
|
||||
|
||||
atomic_inc(&dev->total_ctx);
|
||||
|
||||
if (test_and_set_bit(0, &dev->context_flag)) {
|
||||
DRM_ERROR("Reentering -- FIXME\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
dev->ctx_start = get_cycles();
|
||||
#endif
|
||||
|
||||
DRM_DEBUG("Context switch from %d to %d\n", old, new);
|
||||
|
||||
if (new == dev->last_context) {
|
||||
clear_bit(0, &dev->context_flag);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (drm_flags & DRM_FLAG_NOCTX) {
|
||||
i810_context_switch_complete(dev, new);
|
||||
} else {
|
||||
sprintf(buf, "C %d %d\n", old, new);
|
||||
drm_write_string(dev, buf);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i810_context_switch_complete(drm_device_t *dev, int new)
|
||||
{
|
||||
dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
|
||||
dev->last_switch = jiffies;
|
||||
|
||||
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
||||
DRM_ERROR("Lock isn't held after context switch\n");
|
||||
}
|
||||
|
||||
/* If a context switch is ever initiated
|
||||
when the kernel holds the lock, release
|
||||
that lock here. */
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
atomic_inc(&dev->histo.ctx[drm_histogram_slot(get_cycles()
|
||||
- dev->ctx_start)]);
|
||||
|
||||
#endif
|
||||
clear_bit(0, &dev->context_flag);
|
||||
wake_up(&dev->context_wait);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int i810_resctx(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_ctx_res_t res;
|
||||
drm_ctx_t ctx;
|
||||
int i;
|
||||
|
||||
DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS);
|
||||
copy_from_user_ret(&res, (drm_ctx_res_t *)arg, sizeof(res), -EFAULT);
|
||||
if (res.count >= DRM_RESERVED_CONTEXTS) {
|
||||
memset(&ctx, 0, sizeof(ctx));
|
||||
for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
|
||||
ctx.handle = i;
|
||||
copy_to_user_ret(&res.contexts[i],
|
||||
&i,
|
||||
sizeof(i),
|
||||
-EFAULT);
|
||||
}
|
||||
}
|
||||
res.count = DRM_RESERVED_CONTEXTS;
|
||||
copy_to_user_ret((drm_ctx_res_t *)arg, &res, sizeof(res), -EFAULT);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int i810_addctx(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_ctx_t ctx;
|
||||
|
||||
copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT);
|
||||
if ((ctx.handle = i810_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) {
|
||||
/* Skip kernel's context and get a new one. */
|
||||
ctx.handle = i810_alloc_queue(dev);
|
||||
}
|
||||
DRM_DEBUG("%d\n", ctx.handle);
|
||||
if (ctx.handle == -1) {
|
||||
DRM_DEBUG("Not enough free contexts.\n");
|
||||
/* Should this return -EBUSY instead? */
|
||||
return -ENOMEM;
|
||||
}
|
||||
copy_to_user_ret((drm_ctx_t *)arg, &ctx, sizeof(ctx), -EFAULT);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i810_modctx(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_ctx_t ctx;
|
||||
|
||||
copy_from_user_ret(&ctx, (drm_ctx_t*)arg, sizeof(ctx), -EFAULT);
|
||||
if (ctx.flags==_DRM_CONTEXT_PRESERVED)
|
||||
i810_res_ctx.handle=ctx.handle;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i810_getctx(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_ctx_t ctx;
|
||||
|
||||
copy_from_user_ret(&ctx, (drm_ctx_t*)arg, sizeof(ctx), -EFAULT);
|
||||
/* This is 0, because we don't hanlde any context flags */
|
||||
ctx.flags = 0;
|
||||
copy_to_user_ret((drm_ctx_t*)arg, &ctx, sizeof(ctx), -EFAULT);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i810_switchctx(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_ctx_t ctx;
|
||||
|
||||
copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT);
|
||||
DRM_DEBUG("%d\n", ctx.handle);
|
||||
return i810_context_switch(dev, dev->last_context, ctx.handle);
|
||||
}
|
||||
|
||||
int i810_newctx(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_ctx_t ctx;
|
||||
|
||||
copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT);
|
||||
DRM_DEBUG("%d\n", ctx.handle);
|
||||
i810_context_switch_complete(dev, ctx.handle);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i810_rmctx(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_ctx_t ctx;
|
||||
|
||||
copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT);
|
||||
DRM_DEBUG("%d\n", ctx.handle);
|
||||
drm_ctxbitmap_free(dev, ctx.handle);
|
||||
|
||||
return 0;
|
||||
}
|
||||
165
linux/i810_dma.c
165
linux/i810_dma.c
|
|
@ -36,129 +36,57 @@
|
|||
|
||||
#include <linux/interrupt.h> /* For task queue support */
|
||||
|
||||
#define I810_REG(reg) 0 /* for now */
|
||||
#define I810_REG(reg) 2
|
||||
#define I810_BASE(reg) ((unsigned long) \
|
||||
dev->maplist[I810_REG(reg)]->handle)
|
||||
#define I810_ADDR(reg) (I810_BASE(reg) + I810_OFF(reg))
|
||||
#define I810_ADDR(reg) (I810_BASE(reg) + reg)
|
||||
#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
|
||||
#define I810_READ(reg) I810_DEREF(reg)
|
||||
#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
|
||||
|
||||
typedef _i810_primary_buffer {
|
||||
u32 *head;
|
||||
u32 *dma_ptr;
|
||||
u8 tempIndex[4];
|
||||
int outcount;
|
||||
int num_dwords;
|
||||
int max_dwords;
|
||||
unsigned long phys_head;
|
||||
} i810PrimBuf;
|
||||
void i810_dma_init(drm_device_t *dev)
|
||||
{
|
||||
printk(KERN_INFO "i810_dma_init\n");
|
||||
}
|
||||
|
||||
static i810PrimBuf buffer;
|
||||
typedef enum {
|
||||
TT_GENERAL,
|
||||
TT_BLIT,
|
||||
TT_VECTOR,
|
||||
TT_VERTEX
|
||||
} transferType_t;
|
||||
|
||||
#define DWGREG0 0x1c00
|
||||
#define DWGREG0_END 0x1dff
|
||||
|
||||
#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END)
|
||||
#define ADRINDEX0(r) (u8)((r - DWGREG0) >> 2)
|
||||
#define ADRINDEX1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
|
||||
#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
|
||||
|
||||
#define DMAOUTREG(reg, val) do { \
|
||||
buffer.tempIndex[buffer.outcount]=ADRINDEX(reg); \
|
||||
buffer.dma_ptr[1+buffer.outcount] = val; \
|
||||
if( ++buffer.outcount == 4) { \
|
||||
buffer.outcount = 0; \
|
||||
buffer.dma_ptr[0] = *(u32 *)tempIndex; \
|
||||
buffer.dma_ptr+=5; \
|
||||
buffer.num_dwords += 5; \
|
||||
} \
|
||||
}while (0)
|
||||
|
||||
#define CHECK_OVERFLOW(length) do { \
|
||||
if((buffer.max_dwords - buffer.num_dwords) < length) { \
|
||||
i810_prim_overflow(); \
|
||||
} \
|
||||
}while(0)
|
||||
|
||||
#define PDEA_pagpxfer_enable 0x2
|
||||
void i810_dma_cleanup(drm_device_t *dev)
|
||||
{
|
||||
printk(KERN_INFO "i810_dma_cleanup\n");
|
||||
}
|
||||
|
||||
static inline void i810_dma_dispatch(drm_device_t *dev, unsigned long address,
|
||||
unsigned long length)
|
||||
unsigned long length)
|
||||
{
|
||||
transferType_t transferType = TT_GENERAL;
|
||||
int use_agp = PDEA_pagpxfer_enable;
|
||||
|
||||
CHECK_OVERFLOW(10);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_SECADDRESS, address | transferType);
|
||||
DMAOUTREG(I810REG_SECEND, (address + length) | use_agp);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_DMAPAD, 0);
|
||||
DMAOUTREG(I810REG_DWGSYNC, 0);
|
||||
DMAOUTREG(I810REG_SOFTRAP, 0);
|
||||
/* Needs to write out to PRIMEND */
|
||||
printk(KERN_INFO "i810_dma_dispatch\n");
|
||||
}
|
||||
|
||||
static inline void i810_dma_quiescent(drm_device_t *dev)
|
||||
{
|
||||
#if 0
|
||||
while (GAMMA_READ(GAMMA_DMACOUNT))
|
||||
;
|
||||
while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3)
|
||||
;
|
||||
GAMMA_WRITE(GAMMA_BROADCASTMASK, 3);
|
||||
GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10);
|
||||
GAMMA_WRITE(GAMMA_SYNC, 0);
|
||||
|
||||
/* Read from first MX */
|
||||
do {
|
||||
while (!GAMMA_READ(GAMMA_OUTFIFOWORDS))
|
||||
;
|
||||
} while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG);
|
||||
|
||||
|
||||
/* Read from second MX */
|
||||
do {
|
||||
while (!GAMMA_READ(GAMMA_OUTFIFOWORDS + 0x10000))
|
||||
;
|
||||
} while (GAMMA_READ(GAMMA_OUTPUTFIFO + 0x10000) != GAMMA_SYNC_TAG);
|
||||
#endif
|
||||
printk(KERN_INFO "i810_dma_quiescent\n");
|
||||
}
|
||||
|
||||
static inline void i810_dma_ready(drm_device_t *dev)
|
||||
{
|
||||
#if 0
|
||||
while (GAMMA_READ(GAMMA_DMACOUNT))
|
||||
;
|
||||
#endif
|
||||
i810_dma_quiescent(dev);
|
||||
printk(KERN_INFO "i810_dma_ready\n");
|
||||
}
|
||||
|
||||
static inline int i810_dma_is_ready(drm_device_t *dev)
|
||||
{
|
||||
#if 0
|
||||
return !GAMMA_READ(GAMMA_DMACOUNT);
|
||||
#endif
|
||||
|
||||
i810_dma_quiescent(dev);
|
||||
|
||||
printk(KERN_INFO "i810_dma_is_ready\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
static void i810_dma_service(int irq, void *device, struct pt_regs *regs)
|
||||
{
|
||||
#if 0
|
||||
drm_device_t *dev = (drm_device_t *)device;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
|
||||
atomic_inc(&dev->total_irq);
|
||||
GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */
|
||||
GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8);
|
||||
GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001);
|
||||
if (i810_dma_is_ready(dev)) {
|
||||
/* Free previous buffer */
|
||||
if (test_and_set_bit(0, &dev->dma_flag)) {
|
||||
|
|
@ -175,7 +103,6 @@ static void i810_dma_service(int irq, void *device, struct pt_regs *regs)
|
|||
queue_task(&dev->tq, &tq_immediate);
|
||||
mark_bh(IMMEDIATE_BH);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Only called by i810_dma_schedule. */
|
||||
|
|
@ -206,8 +133,9 @@ static int i810_do_dma(drm_device_t *dev, int locked)
|
|||
}
|
||||
|
||||
buf = dma->next_buffer;
|
||||
address = (unsigned long)buf->address;
|
||||
address = (unsigned long)buf->bus_address;
|
||||
length = buf->used;
|
||||
|
||||
|
||||
DRM_DEBUG("context %d, buffer %d (%ld bytes)\n",
|
||||
buf->context, buf->idx, length);
|
||||
|
|
@ -310,7 +238,6 @@ static void i810_dma_schedule_tq_wrapper(void *dev)
|
|||
|
||||
int i810_dma_schedule(drm_device_t *dev, int locked)
|
||||
{
|
||||
#if 0
|
||||
int next;
|
||||
drm_queue_t *q;
|
||||
drm_buf_t *buf;
|
||||
|
|
@ -391,7 +318,6 @@ again:
|
|||
- schedule_start)]);
|
||||
#endif
|
||||
return retcode;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int i810_dma_priority(drm_device_t *dev, drm_dma_t *d)
|
||||
|
|
@ -507,6 +433,11 @@ static int i810_dma_priority(drm_device_t *dev, drm_dma_t *d)
|
|||
buf->time_dispatched = buf->time_queued;
|
||||
#endif
|
||||
i810_dma_dispatch(dev, address, length);
|
||||
if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
|
||||
DRM_KERNEL_CONTEXT)) {
|
||||
DRM_ERROR("\n");
|
||||
}
|
||||
|
||||
atomic_add(length, &dma->total_bytes);
|
||||
atomic_inc(&dma->total_dmas);
|
||||
|
||||
|
|
@ -599,7 +530,8 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
int retcode = 0;
|
||||
drm_dma_t d;
|
||||
|
||||
copy_from_user_ret(&d, (drm_dma_t *)arg, sizeof(d), -EFAULT);
|
||||
printk("i810_dma start\n");
|
||||
copy_from_user_ret(&d, (drm_dma_t *)arg, sizeof(d), -EFAULT);
|
||||
DRM_DEBUG("%d %d: %d send, %d req\n",
|
||||
current->pid, d.context, d.send_count, d.request_count);
|
||||
|
||||
|
|
@ -608,6 +540,7 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
current->pid, d.context);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (d.send_count < 0 || d.send_count > dma->buf_count) {
|
||||
DRM_ERROR("Process %d trying to send %d buffers (of %d max)\n",
|
||||
current->pid, d.send_count, dma->buf_count);
|
||||
|
|
@ -620,10 +553,15 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
}
|
||||
|
||||
if (d.send_count) {
|
||||
#if 0
|
||||
if (d.flags & _DRM_DMA_PRIORITY)
|
||||
retcode = i810_dma_priority(dev, &d);
|
||||
else
|
||||
retcode = i810_dma_send_buffers(dev, &d);
|
||||
#endif
|
||||
printk("i810_dma priority\n");
|
||||
|
||||
retcode = i810_dma_priority(dev, &d);
|
||||
}
|
||||
|
||||
d.granted_count = 0;
|
||||
|
|
@ -636,6 +574,7 @@ int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
current->pid, d.granted_count);
|
||||
copy_to_user_ret((drm_dma_t *)arg, &d, sizeof(d), -EFAULT);
|
||||
|
||||
printk("i810_dma end (granted)\n");
|
||||
return retcode;
|
||||
}
|
||||
|
||||
|
|
@ -670,8 +609,7 @@ int i810_irq_install(drm_device_t *dev, int irq)
|
|||
|
||||
|
||||
/* Before installing handler */
|
||||
I810_WRITE(I810REG_IEN, 0);
|
||||
|
||||
/* TODO */
|
||||
/* Install handler */
|
||||
if ((retcode = request_irq(dev->irq,
|
||||
i810_dma_service,
|
||||
|
|
@ -685,7 +623,7 @@ int i810_irq_install(drm_device_t *dev, int irq)
|
|||
}
|
||||
|
||||
/* After installing handler */
|
||||
I810_WRITE(I810REG_IEN, 0x00000001);
|
||||
/* TODO */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -702,8 +640,8 @@ int i810_irq_uninstall(drm_device_t *dev)
|
|||
|
||||
DRM_DEBUG("%d\n", irq);
|
||||
|
||||
I810_WRITE(I810REG_IEN, 0);
|
||||
free_irq(irq, dev);
|
||||
/* TODO : Disable interrupts */
|
||||
free_irq(irq, dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -716,7 +654,10 @@ int i810_control(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
drm_device_t *dev = priv->dev;
|
||||
drm_control_t ctl;
|
||||
int retcode;
|
||||
|
||||
|
||||
printk(KERN_INFO "i810_control\n");
|
||||
i810_dma_init(dev);
|
||||
|
||||
copy_from_user_ret(&ctl, (drm_control_t *)arg, sizeof(ctl), -EFAULT);
|
||||
|
||||
switch (ctl.func) {
|
||||
|
|
@ -757,12 +698,17 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
printk("i810_lock\n");
|
||||
printk("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
|
||||
if (lock.context < 0 || lock.context >= dev->queue_count)
|
||||
if (lock.context < 0 || lock.context >= dev->queue_count) {
|
||||
printk("lock.context = %d, dev->queue_count = %d", lock.context,
|
||||
dev->queue_count);
|
||||
printk("return lock.context\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
q = dev->queuelist[lock.context];
|
||||
|
||||
ret = drm_flush_block_and_flush(dev, lock.context, lock.flags);
|
||||
|
|
@ -776,6 +722,7 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
/* Can't take lock if we just had it and
|
||||
there is contention. */
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
printk("schedule_timeout\n");
|
||||
schedule_timeout(j);
|
||||
}
|
||||
}
|
||||
|
|
@ -792,12 +739,14 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
dev->lock.lock_time = jiffies;
|
||||
atomic_inc(&dev->total_locks);
|
||||
atomic_inc(&q->total_locks);
|
||||
printk("Got lock\n");
|
||||
break; /* Got lock */
|
||||
}
|
||||
|
||||
/* Contention */
|
||||
atomic_inc(&dev->total_sleeps);
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
printk("Contention\n");
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -ERESTARTSYS;
|
||||
|
|
@ -816,7 +765,7 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
if (lock.flags & _DRM_LOCK_QUIESCENT)
|
||||
i810_dma_quiescent(dev);
|
||||
}
|
||||
DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
printk("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
|
||||
|
|
|
|||
214
linux/i810_drv.c
214
linux/i810_drv.c
|
|
@ -1,4 +1,4 @@
|
|||
/* i810_drv.c -- i810 driver -*- linux-c -*-
|
||||
/* i810_drv.c -- I810 driver -*- linux-c -*-
|
||||
* Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
|
||||
*
|
||||
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
|
||||
|
|
@ -37,7 +37,7 @@ EXPORT_SYMBOL(i810_init);
|
|||
EXPORT_SYMBOL(i810_cleanup);
|
||||
|
||||
#define I810_NAME "i810"
|
||||
#define I810_DESC "Intel i810"
|
||||
#define I810_DESC "Matrox g200/g400"
|
||||
#define I810_DATE "19991213"
|
||||
#define I810_MAJOR 0
|
||||
#define I810_MINOR 0
|
||||
|
|
@ -63,52 +63,47 @@ static struct miscdevice i810_misc = {
|
|||
};
|
||||
|
||||
static drm_ioctl_desc_t i810_ioctls[] = {
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { i810_version, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { i810_version, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { i810_control, 1, 1 },
|
||||
#endif
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { i810_control, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { i810_addbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { i810_markbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { i810_infobufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { i810_mapbufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { i810_freebufs, 1, 0 },
|
||||
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { i810_addbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { i810_markbufs, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { i810_infobufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { i810_mapbufs, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { i810_freebufs, 1, 0 },
|
||||
#endif
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { drm_addctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { drm_rmctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { drm_modctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { drm_getctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { drm_switchctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { drm_newctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { drm_resctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { i810_addctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { i810_rmctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { i810_modctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { i810_getctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { i810_switchctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { i810_newctx, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { i810_resctx, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { i810_dma, 1, 0 },
|
||||
#endif
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { i810_lock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { i810_unlock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { i810_dma, 1, 0 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = {drm_agp_acquire, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = {drm_agp_release, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = {drm_agp_enable, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = {drm_agp_info, 1, 0},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = {drm_agp_alloc, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = {drm_agp_free, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = {drm_agp_unbind, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = {drm_agp_bind, 1, 1},
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { i810_lock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { i810_unlock, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
|
||||
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
|
||||
};
|
||||
|
||||
#define I810_IOCTL_COUNT DRM_ARRAY_SIZE(i810_ioctls)
|
||||
|
|
@ -119,13 +114,14 @@ void cleanup_module(void);
|
|||
static char *i810 = NULL;
|
||||
|
||||
MODULE_AUTHOR("Precision Insight, Inc., Cedar Park, Texas.");
|
||||
MODULE_DESCRIPTION("Matrox g200/g400");
|
||||
MODULE_DESCRIPTION("Intel I810");
|
||||
MODULE_PARM(i810, "s");
|
||||
|
||||
/* init_module is called when insmod is used to load the module */
|
||||
|
||||
int init_module(void)
|
||||
{
|
||||
printk("doing i810_init()\n");
|
||||
return i810_init();
|
||||
}
|
||||
|
||||
|
|
@ -233,7 +229,7 @@ static int i810_takedown(drm_device_t *dev)
|
|||
|
||||
DRM_DEBUG("\n");
|
||||
|
||||
/* if (dev->irq) i810_irq_uninstall(dev); */
|
||||
if (dev->irq) i810_irq_uninstall(dev);
|
||||
|
||||
down(&dev->struct_sem);
|
||||
del_timer(&dev->timer);
|
||||
|
|
@ -258,19 +254,24 @@ static int i810_takedown(drm_device_t *dev)
|
|||
}
|
||||
/* Clear AGP information */
|
||||
if (dev->agp) {
|
||||
drm_agp_mem_t *temp;
|
||||
drm_agp_mem_t *temp_next;
|
||||
|
||||
temp = dev->agp->memory;
|
||||
while(temp != NULL) {
|
||||
temp_next = temp->next;
|
||||
drm_free_agp(temp->memory, temp->pages);
|
||||
drm_free(temp, sizeof(*temp), DRM_MEM_AGPLISTS);
|
||||
temp = temp_next;
|
||||
drm_agp_mem_t *entry;
|
||||
drm_agp_mem_t *nexte;
|
||||
|
||||
/* Remove AGP resources, but leave dev->agp
|
||||
intact until r128_cleanup is called. */
|
||||
for (entry = dev->agp->memory; entry; entry = nexte) {
|
||||
nexte = entry->next;
|
||||
if (entry->bound) drm_unbind_agp(entry->memory);
|
||||
drm_free_agp(entry->memory, entry->pages);
|
||||
drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
|
||||
}
|
||||
if(dev->agp->acquired) (*drm_agp.release)();
|
||||
drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
|
||||
dev->agp = NULL;
|
||||
dev->agp->memory = NULL;
|
||||
|
||||
if (dev->agp->acquired && drm_agp.release)
|
||||
(*drm_agp.release)();
|
||||
|
||||
dev->agp->acquired = 0;
|
||||
dev->agp->enabled = 0;
|
||||
}
|
||||
/* Clear vma list (only built for debugging) */
|
||||
if (dev->vmalist) {
|
||||
|
|
@ -363,7 +364,7 @@ int i810_init(void)
|
|||
#ifdef MODULE
|
||||
drm_parse_options(i810);
|
||||
#endif
|
||||
|
||||
printk("doing misc_register\n");
|
||||
if ((retcode = misc_register(&i810_misc))) {
|
||||
DRM_ERROR("Cannot register \"%s\"\n", I810_NAME);
|
||||
return retcode;
|
||||
|
|
@ -371,9 +372,13 @@ int i810_init(void)
|
|||
dev->device = MKDEV(MISC_MAJOR, i810_misc.minor);
|
||||
dev->name = I810_NAME;
|
||||
|
||||
printk("doing mem init\n");
|
||||
drm_mem_init();
|
||||
printk("doing proc init\n");
|
||||
drm_proc_init(dev);
|
||||
printk("doing agp init\n");
|
||||
dev->agp = drm_agp_init();
|
||||
printk("doing ctxbitmap init\n");
|
||||
if((retcode = drm_ctxbitmap_init(dev))) {
|
||||
DRM_ERROR("Cannot allocate memory for context bitmap.\n");
|
||||
drm_proc_cleanup();
|
||||
|
|
@ -381,6 +386,10 @@ int i810_init(void)
|
|||
i810_takedown(dev);
|
||||
return retcode;
|
||||
}
|
||||
#if 0
|
||||
printk("doing i810_dma_init\n");
|
||||
i810_dma_init(dev);
|
||||
#endif
|
||||
|
||||
DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
|
||||
I810_NAME,
|
||||
|
|
@ -408,7 +417,12 @@ void i810_cleanup(void)
|
|||
DRM_INFO("Module unloaded\n");
|
||||
}
|
||||
drm_ctxbitmap_cleanup(dev);
|
||||
i810_dma_cleanup(dev);
|
||||
i810_takedown(dev);
|
||||
if (dev->agp) {
|
||||
drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
|
||||
dev->agp = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
int i810_version(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
|
|
@ -531,86 +545,6 @@ int i810_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
return retcode;
|
||||
}
|
||||
|
||||
int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
DECLARE_WAITQUEUE(entry, current);
|
||||
int ret = 0;
|
||||
drm_lock_t lock;
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
cycles_t start;
|
||||
|
||||
dev->lck_start = start = get_cycles();
|
||||
#endif
|
||||
|
||||
copy_from_user_ret(&lock, (drm_lock_t *)arg, sizeof(lock), -EFAULT);
|
||||
|
||||
if (lock.context == DRM_KERNEL_CONTEXT) {
|
||||
DRM_ERROR("Process %d using kernel context %d\n",
|
||||
current->pid, lock.context);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
|
||||
if (!ret) {
|
||||
add_wait_queue(&dev->lock.lock_queue, &entry);
|
||||
for (;;) {
|
||||
if (!dev->lock.hw_lock) {
|
||||
/* Device has been unregistered */
|
||||
ret = -EINTR;
|
||||
break;
|
||||
}
|
||||
if (drm_lock_take(&dev->lock.hw_lock->lock,
|
||||
lock.context)) {
|
||||
dev->lock.pid = current->pid;
|
||||
dev->lock.lock_time = jiffies;
|
||||
atomic_inc(&dev->total_locks);
|
||||
break; /* Got lock */
|
||||
}
|
||||
|
||||
/* Contention */
|
||||
atomic_inc(&dev->total_sleeps);
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
current->policy |= SCHED_YIELD;
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -ERESTARTSYS;
|
||||
break;
|
||||
}
|
||||
}
|
||||
current->state = TASK_RUNNING;
|
||||
remove_wait_queue(&dev->lock.lock_queue, &entry);
|
||||
}
|
||||
|
||||
if (!ret) {
|
||||
if (lock.flags & _DRM_LOCK_READY) {
|
||||
/* Wait for space in DMA/FIFO */
|
||||
}
|
||||
if (lock.flags & _DRM_LOCK_QUIESCENT) {
|
||||
/* Make hardware quiescent */
|
||||
}
|
||||
}
|
||||
|
||||
if (lock.context != i810_res_ctx.handle) {
|
||||
current->counter = 5;
|
||||
current->priority = DEF_PRIORITY/4;
|
||||
}
|
||||
|
||||
DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
|
||||
#if DRM_DMA_HISTOGRAM
|
||||
atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
int i810_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
|
|
@ -633,7 +567,7 @@ int i810_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
|
||||
atomic_inc(&dev->total_contends);
|
||||
drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
|
||||
/* i810_dma_schedule(dev, 1); */
|
||||
i810_dma_schedule(dev, 1);
|
||||
if (!dev->context_flag) {
|
||||
if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
|
||||
DRM_KERNEL_CONTEXT)) {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* i810_drv.h -- Private header for the i810 -*- linux-c -*-
|
||||
/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
|
||||
* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
|
||||
*
|
||||
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
|
||||
|
|
@ -41,8 +41,6 @@ extern int i810_open(struct inode *inode, struct file *filp);
|
|||
extern int i810_release(struct inode *inode, struct file *filp);
|
||||
extern int i810_ioctl(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_lock(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_unlock(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
|
||||
|
|
@ -54,6 +52,11 @@ extern int i810_irq_install(drm_device_t *dev, int irq);
|
|||
extern int i810_irq_uninstall(drm_device_t *dev);
|
||||
extern int i810_control(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_lock(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern void i810_dma_init(drm_device_t *dev);
|
||||
extern void i810_dma_cleanup(drm_device_t *dev);
|
||||
|
||||
|
||||
/* i810_bufs.c */
|
||||
extern int i810_addbufs(struct inode *inode, struct file *filp,
|
||||
|
|
@ -66,25 +69,8 @@ extern int i810_freebufs(struct inode *inode, struct file *filp,
|
|||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_mapbufs(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
|
||||
/* i810_context.c */
|
||||
extern int i810_resctx(struct inode *inode, struct file *filp,
|
||||
extern int i810_addmap(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_addctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_modctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_getctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_switchctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_newctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int i810_rmctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
|
||||
extern int i810_context_switch(drm_device_t *dev, int old, int new);
|
||||
extern int i810_context_switch_complete(drm_device_t *dev, int new);
|
||||
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue