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Adding support for OS dependent probing of IA64 chipsets. Not all IA64
chipsets can be probed without OS support as probing them is only
possible using ACPI. One example of this are the HP ZX1/2 chipsets:
previously the code assumed that these chips were present when no other
of the known chipsets could be probed. This assumption brought SGI
Altrix machines with 64 CPUs to a grinding halt.
This commit is contained in:
parent
9d0102bcf7
commit
5b650fe61d
6 changed files with 50 additions and 32 deletions
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@ -201,32 +201,46 @@ Get460GXBridgeResources(int bus,
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* the chipset scan is to be stopped, or FALSE if the scan is to move on to the
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* next chipset.
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*/
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Bool
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xf86PreScan460GX(void)
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xorgProbe460GX(scanpciWrapperOpt flags)
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{
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pciBusInfo_t *pBusInfo;
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PCITAG tag;
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CARD32 tmp;
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int i, devno;
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/* Bus zero should already be set up */
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if (!(pBusInfo = pciBusInfo[0])) {
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cbn_460gx = -1;
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return FALSE;
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}
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/* First look for a 460GX's primary host bridge */
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tag = PCI_MAKE_TAG(0, 0x10, 0);
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if (pciReadLong(tag, PCI_ID_REG) != DEVID(VENDOR_INTEL, CHIP_460GX_SAC)) {
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cbn_460gx = -1;
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return FALSE;
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if (pciReadLong(tag, PCI_ID_REG) == DEVID(VENDOR_INTEL, CHIP_460GX_SAC)) {
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return TRUE;
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}
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cbn_460gx = -1;
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return FALSE;
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}
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void
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xf86PreScan460GX(void)
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{
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pciBusInfo_t *pBusInfo;
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PCITAG tag;
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CARD32 tmp;
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int i, devno;
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if (!(pBusInfo = pciBusInfo[0]))
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return;
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/* Get CBN (Chipset bus number) */
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tag = PCI_MAKE_TAG(0, 0x10, 0);
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if (!(cbn_460gx = (unsigned int)pciReadByte(tag, CBN))) {
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/* Sanity check failed */
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cbn_460gx = -1;
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return TRUE;
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return;
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}
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if (pciNumBuses <= cbn_460gx)
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@ -242,7 +256,7 @@ xf86PreScan460GX(void)
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if (pciReadLong(tag, PCI_ID_REG) != DEVID(VENDOR_INTEL, CHIP_460GX_SAC)) {
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/* Sanity check failed */
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cbn_460gx = -1;
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return TRUE;
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return;
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}
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/*
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@ -257,7 +271,7 @@ xf86PreScan460GX(void)
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DEVID(VENDOR_INTEL, CHIP_460GX_SAC)) {
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/* Sanity check failed */
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cbn_460gx = -1;
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return TRUE;
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return;
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}
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if (devno == 0x10)
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@ -278,7 +292,7 @@ xf86PreScan460GX(void)
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if (cbdevs_460gx & (1 << devno)) {
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/* Sanity check failed */
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cbn_460gx = -1;
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return TRUE;
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return;
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}
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/*
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@ -294,7 +308,7 @@ xf86PreScan460GX(void)
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if (cbdevs_460gx & (1 << devno)) {
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/* Sanity check failed */
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cbn_460gx = -1;
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return TRUE;
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return;
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}
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/*
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@ -310,7 +324,7 @@ xf86PreScan460GX(void)
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break;
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/* Sanity check failed */
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cbn_460gx = -1;
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return TRUE;
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return;
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}
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}
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@ -337,7 +351,7 @@ xf86PreScan460GX(void)
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break;
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}
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return TRUE;
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return;
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}
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/* This does some 460GX-related processing after the PCI bus scan */
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@ -29,8 +29,10 @@
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#define PCI_460GX_H 1
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#include <X11/Xdefs.h>
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#include <Pci.h>
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Bool xf86PreScan460GX(void);
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Bool xorgProbe460GX(scanpciWrapperOpt flags);
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void xf86PreScan460GX(void);
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void xf86PostScan460GX(void);
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#endif
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@ -34,17 +34,23 @@
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#include "Pci.h"
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Bool
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xf86PreScanE8870(void)
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xorgProbeE8870(scanpciWrapperOpt flags)
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{
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PCITAG tag;
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/* Look for an E8870's Hub interface */
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tag = PCI_MAKE_TAG(0, 0x1E, 0);
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if (pciReadLong(tag, PCI_ID_REG) != DEVID(VENDOR_INTEL, CHIP_82801_P2P))
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return FALSE;
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if (pciReadLong(tag, PCI_ID_REG) == DEVID(VENDOR_INTEL, CHIP_82801_P2P))
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return TRUE;
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return FALSE;
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}
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void
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xf86PreScanE8870(void)
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{
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/* XXX Fill me in... */
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return TRUE;
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return;
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}
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void
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@ -29,8 +29,10 @@
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#define PCI_E8870_H 1
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#include <X11/Xdefs.h>
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#include <Pci.h>
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Bool xf86PreScanE8870(void);
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Bool xorgProbeE8870(scanpciWrapperOpt flags);
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void xf86PreScanE8870(void);
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void xf86PostScanE8870(void);
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#endif
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@ -465,13 +465,7 @@ static pciBusInfo_t zx1FakeBus = {
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NULL, /* bridge -- dynamically set */
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};
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/*
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* This checks for, and validates, the presence of the ZX1 chipset, and sets
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* pZX1mio to a non-NULL pointer accordingly. This function is called before
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* the server's PCI bus scan and returns TRUE if the chipset scan is to be
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* stopped, or FALSE if the scan is to move on to the next chipset.
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*/
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Bool
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void
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xf86PreScanZX1(void)
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{
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resRange range;
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@ -491,7 +485,7 @@ xf86PreScanZX1(void)
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mapSize = MIO_SIZE;
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if (!(pZX1mio = xf86MapVidMem(-1, VIDMEM_MMIO, MIO_BASE, mapSize)))
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return FALSE;
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return;
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/* Look for ZX1's SBA and IOC */ /* XXX What about Dino? */
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if ((MIO_LONG(MIO_FUNCTION0 + PCI_ID_REG) !=
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@ -500,7 +494,7 @@ xf86PreScanZX1(void)
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DEVID(VENDOR_HP, CHIP_ZX1_IOC))) {
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xf86UnMapVidMem(-1, pZX1mio, mapSize);
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pZX1mio = NULL;
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return FALSE;
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return;
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}
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/* Map rope configuration space */
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@ -510,7 +504,7 @@ xf86PreScanZX1(void)
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!(pZX1ioa = xf86MapVidMem(-1, VIDMEM_MMIO, ioaaddr, IOA_SIZE))) {
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xf86UnMapVidMem(-1, pZX1mio, mapSize);
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pZX1mio = NULL;
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return TRUE;
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return;
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}
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for (i = 0; i < 8; i++) {
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@ -924,7 +918,7 @@ xf86PreScanZX1(void)
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nRange = 0;
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return TRUE;
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return;
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}
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/* This is called to finalise the results of a PCI bus scan */
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@ -30,7 +30,7 @@
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#include <X11/Xdefs.h>
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Bool xf86PreScanZX1(void);
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void xf86PreScanZX1(void);
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void xf86PostScanZX1(void);
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#endif
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