Icenowy Zheng 9b44def4e9 pvr: set has_usc_alu_roundingmode_rne for all B-series Rogue cores ... All B-series Rogue cores seem to have USC rounding mode as RTE instead of RTZ. Set the has_usc_alu_roundingmode_rne feature flag for them (currently only BXS-4-64 has it set). Verified via testing on BXM-4-64 (36.52.104.182) by fixing CTS tests dEQP-VK.spirv_assembly.instruction.*.float_controls.fp32.input_args.* , and via proprietary driver vulkaninfo result on BXE-2-32 (36.29.52.182), BXE-4-32 (36.50.54.182) and BXM-4-64 (36.56.104.183) (checking shaderRoundingModeRT?Float32 properties). Fixes: 1db1038a61 ("pvr: add device info for BXM-4-64 (36.56.104.183)") Fixes: e60e0c96ba ("pvr: add device info for BXE-2-32 (36.29.52.182)") Fixes: 2743363a57 ("pvr: add device info for BXM-4-64 (36.52.104.182)") Fixes: ea28791d40 ("pvr: add device info for BXE-4-32 (36.50.54.182)") Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Reviewed-by: Simon Perretta <simon.perretta@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40794>		2026-04-09 12:18:59 +00:00
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ci	pvr, ci: Remove tests from expected failure list	2026-03-23 22:27:02 +00:00
common	pvr: set has_usc_alu_roundingmode_rne for all B-series Rogue cores	2026-04-09 12:18:59 +00:00
csbgen	pvr: add basic volcanic hw-definitions	2026-02-13 09:28:56 +00:00
drm-shim	pvr/drm-shim: avoid trying a random bvnc by default	2026-02-09 09:23:42 +00:00
include	pco: Use vertex input registers in register allocation	2026-02-24 16:27:45 +00:00
pco	pco: Move part of legalization after register allocation	2026-04-09 09:29:21 +00:00
vulkan	pvr: fix pvr_clear_vdm_state_get_size_in_dw() inverted feature condition	2026-04-08 08:24:16 +00:00
.clang-format	pco: Use vertex input registers in register allocation	2026-02-24 16:27:45 +00:00
.dir-locals.el
.editorconfig	pvr: Change indentation from tab to spaces for xml files.	2022-08-31 08:26:17 +00:00
meson.build	pvr: add support for drm-shim	2026-02-02 14:25:18 +00:00