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mesa/src/gallium/drivers
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Nanley Chery f94ba6b6f5 iris: Add fast-clear restriction for 8bpp surfaces 
For 8bpp surfaces on TGL, prevent LOD1+ from being fast-cleared. This
will be relevant once ISL starts allowing CCS for 8bpp surfaces with
more than 2 miplevels. I verified the problem behind this restriction
with a modified version of the fbo-clearmipmap piglit test.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7085>
2020-10-14 18:44:08 +00:00
..
etnaviv etnaviv: stop leaking the dummy texure descriptor BO 2020-10-07 11:17:18 +02:00
freedreno freedreno/a6xx: Support PIPE_FORMAT_R8_G8B8_420_UNORM for texturing 2020-10-08 09:37:14 +00:00
i915 gallium: rename PIPE_TRANSFER_* -> PIPE_MAP_* 2020-09-22 03:20:54 +00:00
iris iris: Add fast-clear restriction for 8bpp surfaces 2020-10-14 18:44:08 +00:00
kmsro kmsro: Extend to include imx-dcss 2020-09-25 09:55:15 +00:00
lima lima/parser: Fix varyings decoding in RSW 2020-10-09 06:51:07 +00:00
llvmpipe llvmpipe/cs: add in shader shared size. 2020-10-02 04:17:46 +10:00
nouveau radv/aco,nir/lower_subgroups: don't lower elect 2020-10-13 12:47:20 +00:00
panfrost panfrost: Temporarily disable FP16 on Bifrost 2020-10-10 17:15:03 -04:00
r300 gallium/util: remove empty file u_half.h 2020-10-06 21:07:11 -04:00
r600 nir/algebraic: always lower idiv to shifts if bitops are allowed 2020-10-07 10:50:53 -04:00
radeon radeonsi: implement GL_INTEL_blackhole_render 2020-10-06 15:59:08 +00:00
radeonsi radv/aco,nir/lower_subgroups: don't lower elect 2020-10-13 12:47:20 +00:00
softpipe gallium: rename PIPE_TRANSFER_* -> PIPE_MAP_* 2020-09-22 03:20:54 +00:00
svga svga: Remove unused printf argument. 2020-10-13 21:00:01 +00:00
swr swr/rasterizer: Remove BuilderGfxMem member mpTrackMemAccessFuncTy. 2020-10-08 22:01:14 +00:00
tegra meson: use gnu_symbol_visibility argument 2020-06-01 18:59:18 +00:00
v3d broadcom/compiler: rename QUNIFORM_GET_BUFFER_SIZE to QUNIFORM_GET_SSBO_SIZE 2020-10-13 21:21:33 +00:00
vc4 vc4: enable lower_isign for VC4 2020-10-11 11:46:43 +02:00
virgl driconf: Stop quoting true/false in boolean option definitions. 2020-10-02 23:59:52 +00:00
zink zink: unify code for emitting named uint-based variable instructions 2020-10-14 15:22:54 +00:00