mesa/src/amd
Marek Olšák 52ca879cdd radeonsi: export non-zero edgeflags for GS and tess
because edge flags are always enabled when polygon mode is enabled

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
..
addrlib amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16 2023-06-01 17:59:39 +00:00
ci amd/ci: run gl(es) cts & piglit on radeonsi on vangogh 2023-06-03 04:40:02 +00:00
common radeonsi: export non-zero edgeflags for GS and tess 2023-06-06 18:01:35 +00:00
compiler aco: fix ds_sub_gs_reg_rtn validation 2023-06-06 16:09:28 +00:00
drm-shim amd/drm-shim: add raven2 2023-05-22 20:14:22 +00:00
llvm amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options 2023-06-06 18:01:35 +00:00
registers ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT 2023-05-24 21:48:19 +00:00
vulkan amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options 2023-06-06 18:01:35 +00:00
meson.build meson: build radeonsi with aco 2023-05-15 02:01:10 +00:00