Iago Toral Quiroga c5fd24a1d4 broadcom/compiler: be more careful with unifa in non-uniform control flow ... If the lane from which the hardware writes the unifa address is disabled, then we may end up with a bogus address and invalid memory accesses from follow-up ldunifa. Instead of always disabling unifa loads in non-uniform control flow we can try to see if the address is prouced from a nir register (which is the only case where we do conditional writes under non-uniform control flow in ntq_store_def), and only disable it in that case. When enabling subgroups for graphics pipelines, this fixes a GMP violation in the simulator with the following test (which has non-uniform control flow writing unifa with lane 0 disabled, which is the lane from which the unifa takes the address): dEQP-VK.subgroups.ballot_broadcast.graphics.subgroupbroadcastfirst_int Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27211> (cherry picked from commit 5b269814fc)		2024-01-31 22:24:25 +00:00
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ci	ci/traces: drop the freedoom-phase2-gl-high.trace	2023-11-15 21:21:24 +00:00
cle	broadcom/cle: update the packet definitions for new generation v71	2023-10-13 22:37:41 +00:00
clif	broadcom(cle,clif,common,simulator): add 7.1 version on the list of versions to build	2023-10-13 22:37:41 +00:00
common	broadcom: add performance counters for V3D 7.x	2023-10-13 22:37:44 +00:00
compiler	broadcom/compiler: be more careful with unifa in non-uniform control flow	2024-01-31 22:24:25 +00:00
drm-shim	v3d/shim: include new ioctl parameters	2023-09-25 10:47:58 +00:00
qpu	broadcom/qpu: Remove duplicate variable opcode	2023-10-17 12:31:33 +00:00
simulator	broadcom/simulator: add per-hw version calls	2023-10-13 22:37:44 +00:00
vulkan	nir: rework and fix rotate lowering	2024-01-23 20:52:01 +00:00
.editorconfig
meson.build	broadcom(cle,clif,common,simulator): add 7.1 version on the list of versions to build	2023-10-13 22:37:41 +00:00