mesa/src
Timothy Arceri f40908f2d1 radeonsi: set IF_THRESHOLD to 4
In 74e39de932 it was set to 3 and it was reported that 4 caused
tesseract to start spilling VGPRs. This no longer seems to be the
case.

Totals:
SGPRS: 2787844 -> 2787764 (-0.00 %)
VGPRS: 1713121 -> 1712717 (-0.02 %)
Spilled SGPRs: 7532 -> 7532 (0.00 %)
Spilled VGPRs: 49 -> 33 (-32.65 %)
Private memory VGPRs: 2060 -> 2060 (0.00 %)
Scratch size: 2200 -> 2180 (-0.91 %) dwords per thread
Code Size: 79265520 -> 79248360 (-0.02 %) bytes
LDS: 436 -> 436 (0.00 %) blocks
Max Waves: 670535 -> 670608 (0.01 %)
Wait states: 0 -> 0 (0.00 %)

Before:
 VGPR SPILLING APPS   Shaders SpillVGPR  PrivVGPR ScratchSize
 EffectsCaveDemo          301         0       256       264
 ReflectionsSubwayDemo    264         0       256       264
 VehicleGame              295         0       128       132
 bioshock-infinite       1140         0       448       516
 dirt-showdown            453        33         0        28
 gang-beasts              364         0       500       496
 kerbal-space-program    1228         0       472       480
 tomb-raider-ultra       1199        16         0        20

After:
 VGPR SPILLING APPS   Shaders SpillVGPR  PrivVGPR ScratchSize
 EffectsCaveDemo          301         0       256       264
 ReflectionsSubwayDemo    264         0       256       264
 VehicleGame              295         0       128       132
 bioshock-infinite       1140         0       448       516
 dirt-showdown            453        33         0        28
 gang-beasts              364         0       500       496
 kerbal-space-program    1228         0       472       480

The only change in VGPR spills is the elimination of all spills
in Tomb Raider at Ultra settings. Closer examination shows that
the shaders go over the limit because they contain three
expressions a mul, rcp and ubo load. The ubo load is actually
used elsewhere and is therefore stored in a temp already in IR
such as tgsi but glsl ir counts it agaist the if cost.

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
2017-08-25 14:09:32 +10:00
..
amd radv: don't crash if we have no framebuffer 2017-08-25 00:52:48 +01:00
broadcom broadcom/genxml: Add V3D 3.3 packet definitions. 2017-08-18 12:54:13 -07:00
compiler glsl: pass shader source keys to the disk cache 2017-08-25 13:20:29 +10:00
egl egl/android: add missing include 2017-08-24 16:02:14 +01:00
gallium radeonsi: set IF_THRESHOLD to 4 2017-08-25 14:09:32 +10:00
gbm loader: rework xmlconfig dependency 2017-08-04 23:54:52 +01:00
getopt Introduce .editorconfig 2016-08-31 17:06:54 -07:00
glx glxcmds: Fix a typo in the __APPLE__ codepath 2017-08-17 15:13:33 -07:00
gtest gtest: Update to 1.8.0. 2017-01-20 11:40:52 -08:00
hgl glapi/hgl: remove the final user of _glapi_check_table() 2016-10-06 15:03:46 +01:00
intel anv,i965: Move CS shared lowering into anv 2017-08-24 16:34:29 -07:00
loader dri3: Move up fourcc utility function 2017-08-21 12:55:54 +01:00
mapi include: Sync Khronos headers for OpenGL 4.6 2017-08-24 13:47:18 -04:00
mesa glsl: pass shader source keys to the disk cache 2017-08-25 13:20:29 +10:00
util util/disk_cache: write cache item metadata to disk 2017-08-25 13:20:29 +10:00
vulkan vulkan: import 1.0.59 headers and xml. 2017-08-22 07:00:50 +10:00
Makefile.am build: Convert git_sha1_gen script to Python (part2). 2017-08-01 16:33:55 +01:00
SConscript build: Convert git_sha1_gen script to Python. 2017-08-01 15:24:39 +01:00